diff mbox series

net/hns3: dump queue head and tail pointer info

Message ID 20240905064803.20184-1-haijie1@huawei.com (mailing list archive)
State Accepted
Delegated to: Ferruh Yigit
Headers
Series net/hns3: dump queue head and tail pointer info |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/github-robot: build success github build: passed
ci/intel-Functional success Functional PASS
ci/iol-marvell-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-compile-arm64-testing success Testing PASS
ci/iol-sample-apps-testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS

Commit Message

Jie Hai Sept. 5, 2024, 6:48 a.m. UTC 
From: Dengdui Huang <huangdengdui@huawei.com>

Add dump the head and tail pointer of RxTx queue.
-- Rx queue head and tail info:
     qid  sw_head  sw_hold  hw_head  hw_tail
      0    288      32       256      320
      1    248      56       192      280
      2    264      72       192      296
      3    256      64       192      292
-- Tx queue head and tail info:
     qid  sw_head  sw_tail  hw_head  hw_tail
      0    0        92       84       92
      1    32       131      128      139
      2    32       128      120      128
      3    96       184      176      184

Signed-off-by: Dengdui Huang <huangdengdui@huawei.com>
---
 drivers/net/hns3/hns3_dump.c | 57 ++++++++++++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)

Comments

Ferruh Yigit Sept. 6, 2024, 7:51 a.m. UTC | #1 
On 9/5/2024 7:48 AM, Jie Hai wrote:
> From: Dengdui Huang <huangdengdui@huawei.com>
> 
> Add dump the head and tail pointer of RxTx queue.
> -- Rx queue head and tail info:
>      qid  sw_head  sw_hold  hw_head  hw_tail
>       0    288      32       256      320
>       1    248      56       192      280
>       2    264      72       192      296
>       3    256      64       192      292
> -- Tx queue head and tail info:
>      qid  sw_head  sw_tail  hw_head  hw_tail
>       0    0        92       84       92
>       1    32       131      128      139
>       2    32       128      120      128
>       3    96       184      176      184
> 
> Signed-off-by: Dengdui Huang <huangdengdui@huawei.com>
>

Applied to dpdk-next-net/main, thanks.
diff mbox series

Patch

diff --git a/drivers/net/hns3/hns3_dump.c b/drivers/net/hns3/hns3_dump.c
index cb369be5beb6..5fee0822304a 100644
--- a/drivers/net/hns3/hns3_dump.c
+++ b/drivers/net/hns3/hns3_dump.c
@@ -436,6 +436,62 @@  hns3_get_rxtx_queue_enable_state(FILE *file, struct rte_eth_dev *dev)
 	rte_free(tx_queue_state);
 }
 
+static void
+hns3_get_rxtx_queue_head_tail_pointer(FILE *file, struct rte_eth_dev *dev)
+{
+	struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	uint32_t reg_offset, queue_id;
+	void **rx_queues, **tx_queues;
+	struct hns3_rx_queue *rxq;
+	struct hns3_tx_queue *txq;
+	uint16_t sw_hold;
+
+	rx_queues = dev->data->rx_queues;
+	if (rx_queues == NULL)
+		return;
+	tx_queues = dev->data->tx_queues;
+	if (tx_queues == NULL)
+		return;
+
+	fprintf(file, "\t  -- Rx queue head and tail info:\n");
+	fprintf(file, "\t       qid  sw_head  sw_hold  hw_head  hw_tail\n");
+	for (queue_id = 0; queue_id < dev->data->nb_rx_queues; queue_id++) {
+		if (rx_queues[queue_id] == NULL)
+			continue;
+		rxq = (struct hns3_rx_queue *)rx_queues[queue_id];
+		if (rxq->rx_deferred_start)
+			continue;
+
+		if (dev->rx_pkt_burst == hns3_recv_pkts_vec ||
+		    dev->rx_pkt_burst == hns3_recv_pkts_vec_sve)
+			sw_hold = rxq->rx_rearm_nb;
+		else
+			sw_hold = rxq->rx_free_hold;
+
+		reg_offset = hns3_get_tqp_reg_offset(queue_id);
+		fprintf(file, "\t        %-5u%-9u%-9u%-9u%u\n", queue_id,
+			rxq->next_to_use, sw_hold,
+			hns3_read_dev(hw, HNS3_RING_RX_HEAD_REG + reg_offset),
+			hns3_read_dev(hw, HNS3_RING_RX_TAIL_REG + reg_offset));
+	}
+
+	fprintf(file, "\t  -- Tx queue head and tail info:\n");
+	fprintf(file, "\t       qid  sw_head  sw_tail  hw_head  hw_tail\n");
+	for (queue_id = 0; queue_id < dev->data->nb_tx_queues; queue_id++) {
+		if (tx_queues[queue_id] == NULL)
+			continue;
+		txq = (struct hns3_tx_queue *)tx_queues[queue_id];
+		if (txq->tx_deferred_start)
+			continue;
+
+		reg_offset = hns3_get_tqp_reg_offset(queue_id);
+		fprintf(file, "\t        %-5u%-9u%-9u%-9u%u\n", queue_id,
+			txq->next_to_clean, txq->next_to_use,
+			hns3_read_dev(hw, HNS3_RING_TX_HEAD_REG + reg_offset),
+			hns3_read_dev(hw, HNS3_RING_TX_TAIL_REG + reg_offset));
+	}
+}
+
 static void
 hns3_get_rxtx_queue_info(FILE *file, struct rte_eth_dev *dev)
 {
@@ -460,6 +516,7 @@  hns3_get_rxtx_queue_info(FILE *file, struct rte_eth_dev *dev)
 
 	hns3_get_rxtx_fake_queue_info(file, dev);
 	hns3_get_rxtx_queue_enable_state(file, dev);
+	hns3_get_rxtx_queue_head_tail_pointer(file, dev);
 }
 
 static int