[3/9] net/mlx5/hws: fix flex item support as tunnel header

Message ID 20240911160458.524732-3-viacheslavo@nvidia.com (mailing list archive)
State Superseded
Delegated to: Raslan Darawsheh
Headers
Series [1/9] net/mlx5: update flex parser arc types support |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Viacheslav Ovsiienko Sept. 11, 2024, 4:04 p.m. UTC
The RTE flex item can represent the tunnel header and
split the inner and outer layer items. HWS did not
support this flex item specifics.

Fixes: 8c0ca7527bc8 ("net/mlx5/hws: support flex item matching")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_definer.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)
  

Patch

diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 51a3f7be4b..2dfcc5eba6 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -3267,8 +3267,17 @@  mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx,
 			break;
 		case RTE_FLOW_ITEM_TYPE_FLEX:
 			ret = mlx5dr_definer_conv_item_flex_parser(&cd, items, i);
-			item_flags |= cd.tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
-						  MLX5_FLOW_ITEM_OUTER_FLEX;
+			if (ret == 0) {
+				enum rte_flow_item_flex_tunnel_mode tunnel_mode =
+								FLEX_TUNNEL_MODE_SINGLE;
+
+				ret = mlx5_flex_get_tunnel_mode(items, &tunnel_mode);
+				if (tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL)
+					item_flags |= MLX5_FLOW_ITEM_FLEX_TUNNEL;
+				else
+					item_flags |= cd.tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
+								  MLX5_FLOW_ITEM_OUTER_FLEX;
+			}
 			break;
 		case RTE_FLOW_ITEM_TYPE_MPLS:
 			ret = mlx5dr_definer_conv_item_mpls(&cd, items, i);