From patchwork Tue Oct 15 16:35:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Kozyrev X-Patchwork-Id: 146022 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8327F45B44; Tue, 15 Oct 2024 18:36:57 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 042594064C; Tue, 15 Oct 2024 18:36:53 +0200 (CEST) Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2073.outbound.protection.outlook.com [40.107.236.73]) by mails.dpdk.org (Postfix) with ESMTP id 3BE1E400D7 for ; Tue, 15 Oct 2024 18:36:50 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Ek7aSi2GSYPGVuLKIGqqDOnuUo0v3y8GsqOolxxs6FlE5rTCif7bgHGlAYzNVacJJruuPxoRCOsRhfORI/rgpWbv6bHdjrUWMWGVOXsdcEhz1FsbOoqT4QRfguvdlp3CJQ+c1CK1LocCnX138QjPXt1sAR4oGPRBTfDTE4KfKXd9vrhe4BZZCQJqwfOS49UFp9mt/nh6ZdPPOeCpnmv7diXHUxWKgbnS4euRoy9g9zcuI57wWyhJfPOcza1EFGQY9tO9u9MnxuozmHDX5j8ZGlXtz5Er2N1kAavDYWJZ/NqFc65703uzjRFRwhJ5Hiw+LVmYBmCZX3A4uP5rTUqIRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8Rq0xRfU6i6YHAnODTrzcKd0hEB8/f8k0Udq5/FrpEo=; b=HzRGaC2sD/l88tdmfc15LF0W49jBvquVX7Usmf8zq0CMPvbTjLPnAjCBhLfj/FvWdea0M/VZBk6609GEHDPuyB1mnFxxCNLsc6Ct8RTFstPtgEPytekkLK3ZzuHUDgyulFfPGqcNe+OCdq0ObfKZzGbKAGKB0IRdiq8Q/IcW4jNA7OV78mX7hE03i7CztXKKuq3muj18pXwYHHVAoLAkGsvuSZl5AERK94p+2uSMV6bm3F6doNLB/e511xkeG6TjCkxTMn9kC2Z9TYZeuq6g7wEV96CPyT7c586jUDC3XXUv00Ak8Y7IzwygcMLoba5zoqb1fGKsRoIl8na31q880g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=8Rq0xRfU6i6YHAnODTrzcKd0hEB8/f8k0Udq5/FrpEo=; b=RwlrLFOVuUToA9H8jzVpdobu3MwOdvNIxxlyBJA5TOh0UXH0UtQDtBllWfV80Lk0q4OukukvTIzEtjFBnRb9Gsq/qxsDNgM6yyDA7pAnPAi1/OlM/YP+bOj65ATQRGk141wrtYbXh06K7jG3KOhDQXANMzuxoz4gOKbjaoA9V9OL7oxP8jvDFZi1Yol/5pIBZ4ZavJliE91CVbSpGlb5DRPJgSJAhcj4/NxcxJVMoL/+rWwi9dunxD8/KsaTSN6vB3Sl8a/dnUZ+uStFlW21y68eaus3Ydzyzx6UD+W7VIbkIf6bFHwipzA9lD2Vby4nqK0J9Il2bL6PpRGnpP/eAQ== Received: from SJ0PR13CA0113.namprd13.prod.outlook.com (2603:10b6:a03:2c5::28) by CH2PR12MB4294.namprd12.prod.outlook.com (2603:10b6:610:a9::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8048.27; Tue, 15 Oct 2024 16:36:44 +0000 Received: from CO1PEPF000042A7.namprd03.prod.outlook.com (2603:10b6:a03:2c5:cafe::e1) by SJ0PR13CA0113.outlook.office365.com (2603:10b6:a03:2c5::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.17 via Frontend Transport; Tue, 15 Oct 2024 16:36:43 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CO1PEPF000042A7.mail.protection.outlook.com (10.167.243.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.17 via Frontend Transport; Tue, 15 Oct 2024 16:36:43 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 15 Oct 2024 09:36:25 -0700 Received: from pegasus01.mtr.labs.mlnx (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 15 Oct 2024 09:36:22 -0700 From: Alexander Kozyrev To: CC: , , , , , , , , Subject: [PATCH 1/5] net/mlx5/hws: introduce new matcher type Date: Tue, 15 Oct 2024 19:35:53 +0300 Message-ID: <20241015163557.581447-1-akozyrev@nvidia.com> X-Mailer: git-send-email 2.18.2 MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042A7:EE_|CH2PR12MB4294:EE_ X-MS-Office365-Filtering-Correlation-Id: 590e2e66-b374-41e4-d099-08dced378dcf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|1800799024|376014|36860700013; X-Microsoft-Antispam-Message-Info: tDqeKysB4BkMF3X+QhSp478b9tiDhSNamEBYwmQ8TguV7lcjwaiJKaLaCuv1wUvh5tMw8xtEbGxA8BkvGbID+nGkmuNttY/5XerYBVPiw5diZ4SgcoOqQH/R2Ir0toWQxV8blFh+GhojCXo5vDGXzPmf9EJLl5pQGA/fsmD6jrTpZZPyv7F0v+bQCKHlUNTRzo4voWSvIsthR1qiHaWvFvO4kCff9ktwhF42kY8KjZ7ZJTCvzB2Pc3cxGlYAAHkKT4YzrfVMxHC348fvSplpYMc5EasVwfM3/07sksJa9HK3dmEP5ndoQFMjjOZLKyan0X6hWUJ3X9mttHMVJnk4kJAgdCNp4TFGTtXEqRaS0LkgiVOLme+LAgo4jOoKKs1S9bszQTrTeDi5+nRxts9Q/ERDkHcZxGOqoHsBbEVKr+jeo+/XyfOlDQ1S/98c4aIUoiQG5AD6FzG42AeFcnWTtjBjMMdsmBvjbrisuGUP1yCOvFYIcZRrBiaYEED3koqaHAH63+9kpO0T8JWfJA93oSZobtTr9bZ16OT68nxB2buogu3OaZfb9/TIHCyemM60idCjXA7wU1Dx5TqaSHHakEtoZOJRp5HMA5CB1vCU5hb6KonIQfGGVaWHFQKJNBpcmMziqRAFyuKX+Wu7lM0QT9q+o1QMm2+PF8o/Pmd2hMheKfvICzT7/YWvOQYwRu5Dn8ZxB0UOs1cSBN1TgGpy1vP0QNMtr54lx7CnL49E706pbUDnv/oQ7YTecHzBn78eqp6DkAopDLI0oUzTuA9ZX1Y8liN+0669zPTYIArgxwd9+hjuLycfbuauIpDkt3EhiuGSCotFC966Xuiz4vnG7hiqvRLx+X/uz1S56Jg+oPVX/pUU8EDEt6coRLGGyJhQAH0RV0Q3u66fwRmlrgRr3gpNt8iGXgA8BCd7T6K/7qUOXqHGV8qDdHtkjKjw5dCra2GJiPz61cHaROFGq52ILsd4qGZPHnu3VbygkRxTaPhiQHWkVjTPlhswdBxLJdWzOO0r2flrBIMIACzs3sy+mpjiuTu6MLns6JZDXEFt9Vm4qaczi7KUszj04J/HDuDL5qVuiatuwcnHoBIlQGXzUIoU/+oIjKrWNkB4PWkR82biNLuFW73Dt/vWjj2sDCLOZR+M2czJz4D6Si++2EU9ktKlHuHy6D0/A2jzwoaGRVghdV5qVnumh9gqZ+l2EbqOTBZBByd+OnSnw+9NQnV62fBZkKAU8wNbqx3ptqS010B31JZzhkPI9Yrr9p00NafJ4f5JM+fSW70h3rqrr4nJqXUGzeieZNfhn5Phe3b8aYus5/SV8wJPKC+SagpimJOPt/hEp3fIiqt/arikCOAVfw9cNX46mvPj2Zqw+DMQ/fVYOQfiyLDZXwIkvvKYky58 X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(82310400026)(1800799024)(376014)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Oct 2024 16:36:43.6708 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 590e2e66-b374-41e4-d099-08dced378dcf X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042A7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4294 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Hamdan Igbaria introduce STE array matcher, where this matcher can only be isolated under a parent table and not chained to the table matchers chain. Signed-off-by: Hamdan Igbaria --- drivers/net/mlx5/hws/mlx5dr.h | 13 +++++- drivers/net/mlx5/hws/mlx5dr_debug.c | 12 +++++- drivers/net/mlx5/hws/mlx5dr_matcher.c | 58 +++++++++++++++++++++++-- drivers/net/mlx5/hws/mlx5dr_matcher.h | 6 +++ drivers/net/mlx5/hws/mlx5dr_rule.c | 2 +- drivers/net/mlx5/hws/mlx5dr_table.c | 61 +++++++++++++++++++-------- drivers/net/mlx5/hws/mlx5dr_table.h | 8 +++- drivers/net/mlx5/mlx5_flow_hw.c | 2 + 8 files changed, 135 insertions(+), 27 deletions(-) diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h index 0fe39e9c76..8a1a389a3f 100644 --- a/drivers/net/mlx5/hws/mlx5dr.h +++ b/drivers/net/mlx5/hws/mlx5dr.h @@ -130,6 +130,14 @@ enum mlx5dr_matcher_distribute_mode { MLX5DR_MATCHER_DISTRIBUTE_BY_LINEAR = 0x1, }; +/* Match mode describes the behavior of the matcher STE's when a packet arrives */ +enum mlx5dr_matcher_match_mode { + /* Packet arriving at this matcher STE's will match according it's tag and match definer */ + MLX5DR_MATCHER_MATCH_MODE_DEFAULT = 0x0, + /* Packet arriving at this matcher STE's will always hit and perform the actions */ + MLX5DR_MATCHER_MATCH_MODE_ALWAYS_HIT = 0x1, +}; + enum mlx5dr_rule_hash_calc_mode { MLX5DR_RULE_HASH_CALC_MODE_RAW, MLX5DR_RULE_HASH_CALC_MODE_IDX, @@ -144,11 +152,14 @@ struct mlx5dr_matcher_attr { enum mlx5dr_matcher_resource_mode mode; /* Optimize insertion in case packet origin is the same for all rules */ enum mlx5dr_matcher_flow_src optimize_flow_src; - /* Define the insertion and distribution modes for this matcher */ + /* Define the insertion, distribution and match modes for this matcher */ enum mlx5dr_matcher_insert_mode insert_mode; enum mlx5dr_matcher_distribute_mode distribute_mode; + enum mlx5dr_matcher_match_mode match_mode; /* Define whether the created matcher supports resizing into a bigger matcher */ bool resizable; + /* This will imply that this matcher is not part of the matchers chain of parent table */ + bool isolated; union { struct { uint8_t sz_row_log; diff --git a/drivers/net/mlx5/hws/mlx5dr_debug.c b/drivers/net/mlx5/hws/mlx5dr_debug.c index 741a725842..f15ad96598 100644 --- a/drivers/net/mlx5/hws/mlx5dr_debug.c +++ b/drivers/net/mlx5/hws/mlx5dr_debug.c @@ -182,7 +182,7 @@ mlx5dr_debug_dump_matcher_attr(FILE *f, struct mlx5dr_matcher *matcher) struct mlx5dr_matcher_attr *attr = &matcher->attr; int ret; - ret = fprintf(f, "%d,0x%" PRIx64 ",%d,%d,%d,%d,%d,%d,%d,%d\n", + ret = fprintf(f, "%d,0x%" PRIx64 ",%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", MLX5DR_DEBUG_RES_TYPE_MATCHER_ATTR, (uint64_t)(uintptr_t)matcher, attr->priority, @@ -192,7 +192,9 @@ mlx5dr_debug_dump_matcher_attr(FILE *f, struct mlx5dr_matcher *matcher) attr->optimize_using_rule_idx, attr->optimize_flow_src, attr->insert_mode, - attr->distribute_mode); + attr->distribute_mode, + attr->match_mode, + attr->isolated); if (ret < 0) { rte_errno = EINVAL; return rte_errno; @@ -377,6 +379,12 @@ static int mlx5dr_debug_dump_table(FILE *f, struct mlx5dr_table *tbl) return ret; } + LIST_FOREACH(matcher, &tbl->isolated_matchers, next) { + ret = mlx5dr_debug_dump_matcher(f, matcher); + if (ret) + return ret; + } + return 0; out_err: diff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.c b/drivers/net/mlx5/hws/mlx5dr_matcher.c index dfa2cd435c..54460cc82b 100644 --- a/drivers/net/mlx5/hws/mlx5dr_matcher.c +++ b/drivers/net/mlx5/hws/mlx5dr_matcher.c @@ -198,6 +198,18 @@ static int mlx5dr_matcher_connect(struct mlx5dr_matcher *matcher) struct mlx5dr_matcher *tmp_matcher; int ret; + if (matcher->attr.isolated) { + LIST_INSERT_HEAD(&tbl->isolated_matchers, matcher, next); + ret = mlx5dr_table_connect_src_ft_to_miss_table(tbl, matcher->end_ft, + tbl->default_miss.miss_tbl); + if (ret) { + DR_LOG(ERR, "Failed to connect the new matcher to the miss_tbl"); + goto remove_from_list; + } + + return 0; + } + /* Find location in matcher list */ if (LIST_EMPTY(&tbl->head)) { LIST_INSERT_HEAD(&tbl->head, matcher, next); @@ -230,7 +242,7 @@ static int mlx5dr_matcher_connect(struct mlx5dr_matcher *matcher) } } else { /* Connect last matcher to next miss_tbl if exists */ - ret = mlx5dr_table_connect_to_miss_table(tbl, tbl->default_miss.miss_tbl); + ret = mlx5dr_table_connect_to_miss_table(tbl, tbl->default_miss.miss_tbl, true); if (ret) { DR_LOG(ERR, "Failed connect new matcher to miss_tbl"); goto remove_from_list; @@ -284,6 +296,11 @@ static int mlx5dr_matcher_disconnect(struct mlx5dr_matcher *matcher) struct mlx5dr_matcher *next; int ret; + if (matcher->attr.isolated) { + LIST_REMOVE(matcher, next); + return 0; + } + prev_ft = tbl->ft; prev_matcher = LIST_FIRST(&tbl->head); LIST_FOREACH(tmp_matcher, &tbl->head, next) { @@ -309,7 +326,7 @@ static int mlx5dr_matcher_disconnect(struct mlx5dr_matcher *matcher) goto matcher_reconnect; } } else { - ret = mlx5dr_table_connect_to_miss_table(tbl, tbl->default_miss.miss_tbl); + ret = mlx5dr_table_connect_to_miss_table(tbl, tbl->default_miss.miss_tbl, true); if (ret) { DR_LOG(ERR, "Failed to disconnect last matcher"); goto matcher_reconnect; @@ -518,14 +535,17 @@ static int mlx5dr_matcher_create_rtc(struct mlx5dr_matcher *matcher, } } else if (attr->insert_mode == MLX5DR_MATCHER_INSERT_BY_INDEX) { rtc_attr.update_index_mode = MLX5_IFC_RTC_STE_UPDATE_MODE_BY_OFFSET; - rtc_attr.num_hash_definer = 1; if (attr->distribute_mode == MLX5DR_MATCHER_DISTRIBUTE_BY_HASH) { /* Hash Split Table */ + if (mlx5dr_matcher_is_always_hit(matcher)) + rtc_attr.num_hash_definer = 1; + rtc_attr.access_index_mode = MLX5_IFC_RTC_STE_ACCESS_MODE_BY_HASH; rtc_attr.match_definer_0 = mlx5dr_definer_get_id(mt->definer); } else if (attr->distribute_mode == MLX5DR_MATCHER_DISTRIBUTE_BY_LINEAR) { /* Linear Lookup Table */ + rtc_attr.num_hash_definer = 1; rtc_attr.access_index_mode = MLX5_IFC_RTC_STE_ACCESS_MODE_LINEAR; rtc_attr.match_definer_0 = ctx->caps->linear_match_definer; } @@ -973,10 +993,17 @@ mlx5dr_matcher_validate_insert_mode(struct mlx5dr_cmd_query_caps *caps, if (attr->distribute_mode == MLX5DR_MATCHER_DISTRIBUTE_BY_HASH) { /* Hash Split Table */ - if (!caps->rtc_hash_split_table) { + if (attr->match_mode == MLX5DR_MATCHER_MATCH_MODE_ALWAYS_HIT && + !caps->rtc_hash_split_table) { DR_LOG(ERR, "FW doesn't support insert by index and hash distribute"); goto not_supported; } + + if (attr->match_mode == MLX5DR_MATCHER_MATCH_MODE_DEFAULT && + !attr->isolated) { + DR_LOG(ERR, "STE array matcher supported only as an isolated matcher"); + goto not_supported; + } } else if (attr->distribute_mode == MLX5DR_MATCHER_DISTRIBUTE_BY_LINEAR) { /* Linear Lookup Table */ if (!caps->rtc_linear_lookup_table || @@ -991,6 +1018,12 @@ mlx5dr_matcher_validate_insert_mode(struct mlx5dr_cmd_query_caps *caps, MLX5_IFC_RTC_LINEAR_LOOKUP_TBL_LOG_MAX); goto not_supported; } + + if (attr->match_mode != MLX5DR_MATCHER_MATCH_MODE_ALWAYS_HIT) { + DR_LOG(ERR, "Linear lookup tables will always hit, given match mode is not supported %d\n", + attr->match_mode); + goto not_supported; + } } else { DR_LOG(ERR, "Matcher has unsupported distribute mode"); goto not_supported; @@ -1032,6 +1065,11 @@ mlx5dr_matcher_process_attr(struct mlx5dr_cmd_query_caps *caps, DR_LOG(ERR, "Root matcher does not support resizing"); goto not_supported; } + if (attr->isolated) { + DR_LOG(ERR, "Root matcher can not be isolated"); + goto not_supported; + } + return 0; } @@ -1045,6 +1083,18 @@ mlx5dr_matcher_process_attr(struct mlx5dr_cmd_query_caps *caps, attr->insert_mode == MLX5DR_MATCHER_INSERT_BY_HASH) attr->table.sz_col_log = mlx5dr_matcher_rules_to_tbl_depth(attr->rule.num_log); + if (attr->isolated) { + if (attr->insert_mode != MLX5DR_MATCHER_INSERT_BY_INDEX || + attr->distribute_mode != MLX5DR_MATCHER_DISTRIBUTE_BY_HASH || + attr->match_mode != MLX5DR_MATCHER_MATCH_MODE_DEFAULT) { + DR_LOG(ERR, "Isolated matcher only supported for STE array matcher"); + goto not_supported; + } + + /* We reach here only in case of STE array */ + matcher->flags |= MLX5DR_MATCHER_FLAGS_STE_ARRAY; + } + matcher->flags |= attr->resizable ? MLX5DR_MATCHER_FLAGS_RESIZABLE : 0; return mlx5dr_matcher_check_attr_sz(caps, attr); diff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.h b/drivers/net/mlx5/hws/mlx5dr_matcher.h index ca6a5298d9..ef42b7de6b 100644 --- a/drivers/net/mlx5/hws/mlx5dr_matcher.h +++ b/drivers/net/mlx5/hws/mlx5dr_matcher.h @@ -28,6 +28,7 @@ enum mlx5dr_matcher_flags { MLX5DR_MATCHER_FLAGS_COLLISION = 1 << 2, MLX5DR_MATCHER_FLAGS_RESIZABLE = 1 << 3, MLX5DR_MATCHER_FLAGS_COMPARE = 1 << 4, + MLX5DR_MATCHER_FLAGS_STE_ARRAY = 1 << 5, }; struct mlx5dr_match_template { @@ -146,6 +147,11 @@ static inline bool mlx5dr_matcher_is_insert_by_idx(struct mlx5dr_matcher *matche return matcher->attr.insert_mode == MLX5DR_MATCHER_INSERT_BY_INDEX; } +static inline bool mlx5dr_matcher_is_always_hit(struct mlx5dr_matcher *matcher) +{ + return matcher->attr.match_mode == MLX5DR_MATCHER_MATCH_MODE_ALWAYS_HIT; +} + int mlx5dr_matcher_free_rtc_pointing(struct mlx5dr_context *ctx, uint32_t fw_ft_type, enum mlx5dr_table_type type, diff --git a/drivers/net/mlx5/hws/mlx5dr_rule.c b/drivers/net/mlx5/hws/mlx5dr_rule.c index 5d66d81ea5..519328ccf3 100644 --- a/drivers/net/mlx5/hws/mlx5dr_rule.c +++ b/drivers/net/mlx5/hws/mlx5dr_rule.c @@ -539,7 +539,7 @@ static int mlx5dr_rule_create_hws(struct mlx5dr_rule *rule, * will always match and perform the specified actions, which * makes the tag irrelevant. */ - if (likely(!mlx5dr_matcher_is_insert_by_idx(matcher) && !is_update)) + if (likely(!mlx5dr_matcher_is_always_hit(matcher) && !is_update)) mlx5dr_definer_create_tag(items, mt->fc, mt->fc_sz, (uint8_t *)dep_wqe->wqe_data.action); else if (unlikely(is_update)) diff --git a/drivers/net/mlx5/hws/mlx5dr_table.c b/drivers/net/mlx5/hws/mlx5dr_table.c index ab73017ade..634b484a94 100644 --- a/drivers/net/mlx5/hws/mlx5dr_table.c +++ b/drivers/net/mlx5/hws/mlx5dr_table.c @@ -429,7 +429,7 @@ int mlx5dr_table_destroy(struct mlx5dr_table *tbl) { struct mlx5dr_context *ctx = tbl->ctx; pthread_spin_lock(&ctx->ctrl_lock); - if (!LIST_EMPTY(&tbl->head)) { + if (!LIST_EMPTY(&tbl->head) || !LIST_EMPTY(&tbl->isolated_matchers)) { DR_LOG(ERR, "Cannot destroy table containing matchers"); rte_errno = EBUSY; goto unlock_err; @@ -531,7 +531,7 @@ int mlx5dr_table_update_connected_miss_tables(struct mlx5dr_table *dst_tbl) return 0; LIST_FOREACH(src_tbl, &dst_tbl->default_miss.head, default_miss.next) { - ret = mlx5dr_table_connect_to_miss_table(src_tbl, dst_tbl); + ret = mlx5dr_table_connect_to_miss_table(src_tbl, dst_tbl, false); if (ret) { DR_LOG(ERR, "Failed to update source miss table, unexpected behavior"); return ret; @@ -541,34 +541,32 @@ int mlx5dr_table_update_connected_miss_tables(struct mlx5dr_table *dst_tbl) return 0; } -int mlx5dr_table_connect_to_miss_table(struct mlx5dr_table *src_tbl, - struct mlx5dr_table *dst_tbl) +int mlx5dr_table_connect_src_ft_to_miss_table(struct mlx5dr_table *src_tbl, + struct mlx5dr_devx_obj *ft, + struct mlx5dr_table *dst_tbl) { - struct mlx5dr_devx_obj *last_ft; struct mlx5dr_matcher *matcher; int ret; - last_ft = mlx5dr_table_get_last_ft(src_tbl); - if (dst_tbl) { if (LIST_EMPTY(&dst_tbl->head)) { - /* Connect src_tbl last_ft to dst_tbl start anchor */ - ret = mlx5dr_table_ft_set_next_ft(last_ft, + /* Connect src_tbl ft to dst_tbl start anchor */ + ret = mlx5dr_table_ft_set_next_ft(ft, src_tbl->fw_ft_type, dst_tbl->ft->id); if (ret) return ret; - /* Reset last_ft RTC to default RTC */ - ret = mlx5dr_table_ft_set_next_rtc(last_ft, + /* Reset ft RTC to default RTC */ + ret = mlx5dr_table_ft_set_next_rtc(ft, src_tbl->fw_ft_type, NULL, NULL); if (ret) return ret; } else { - /* Connect src_tbl last_ft to first matcher RTC */ + /* Connect src_tbl ft to first matcher RTC */ matcher = LIST_FIRST(&dst_tbl->head); - ret = mlx5dr_table_ft_set_next_rtc(last_ft, + ret = mlx5dr_table_ft_set_next_rtc(ft, src_tbl->fw_ft_type, matcher->match_ste.rtc_0, matcher->match_ste.rtc_1); @@ -576,24 +574,51 @@ int mlx5dr_table_connect_to_miss_table(struct mlx5dr_table *src_tbl, return ret; /* Reset next miss FT to default */ - ret = mlx5dr_table_ft_set_default_next_ft(src_tbl, last_ft); + ret = mlx5dr_table_ft_set_default_next_ft(src_tbl, ft); if (ret) return ret; } } else { /* Reset next miss FT to default */ - ret = mlx5dr_table_ft_set_default_next_ft(src_tbl, last_ft); + ret = mlx5dr_table_ft_set_default_next_ft(src_tbl, ft); if (ret) return ret; - /* Reset last_ft RTC to default RTC */ - ret = mlx5dr_table_ft_set_next_rtc(last_ft, + /* Reset ft RTC to default RTC */ + ret = mlx5dr_table_ft_set_next_rtc(ft, src_tbl->fw_ft_type, NULL, NULL); if (ret) return ret; } + return 0; +} + +int mlx5dr_table_connect_to_miss_table(struct mlx5dr_table *src_tbl, + struct mlx5dr_table *dst_tbl, + bool only_update_last_ft) +{ + struct mlx5dr_matcher *matcher; + struct mlx5dr_devx_obj *ft; + int ret; + + /* Connect last FT in the src_tbl matchers chain */ + ft = mlx5dr_table_get_last_ft(src_tbl); + ret = mlx5dr_table_connect_src_ft_to_miss_table(src_tbl, ft, dst_tbl); + if (ret) + return ret; + + if (!only_update_last_ft) { + /* Connect isolated matchers FT */ + LIST_FOREACH(matcher, &src_tbl->isolated_matchers, next) { + ft = matcher->end_ft; + ret = mlx5dr_table_connect_src_ft_to_miss_table(src_tbl, ft, dst_tbl); + if (ret) + return ret; + } + } + src_tbl->default_miss.miss_tbl = dst_tbl; return 0; @@ -633,7 +658,7 @@ int mlx5dr_table_set_default_miss(struct mlx5dr_table *tbl, pthread_spin_lock(&ctx->ctrl_lock); old_miss_tbl = tbl->default_miss.miss_tbl; - ret = mlx5dr_table_connect_to_miss_table(tbl, miss_tbl); + ret = mlx5dr_table_connect_to_miss_table(tbl, miss_tbl, false); if (ret) goto out; diff --git a/drivers/net/mlx5/hws/mlx5dr_table.h b/drivers/net/mlx5/hws/mlx5dr_table.h index b2fbb47416..32f2574a97 100644 --- a/drivers/net/mlx5/hws/mlx5dr_table.h +++ b/drivers/net/mlx5/hws/mlx5dr_table.h @@ -23,6 +23,7 @@ struct mlx5dr_table { uint32_t fw_ft_type; uint32_t level; LIST_HEAD(matcher_head, mlx5dr_matcher) head; + LIST_HEAD(isolated_matchers_head, mlx5dr_matcher) isolated_matchers; LIST_ENTRY(mlx5dr_table) next; struct mlx5dr_default_miss default_miss; }; @@ -54,7 +55,8 @@ void mlx5dr_table_destroy_default_ft(struct mlx5dr_table *tbl, struct mlx5dr_devx_obj *ft_obj); int mlx5dr_table_connect_to_miss_table(struct mlx5dr_table *src_tbl, - struct mlx5dr_table *dst_tbl); + struct mlx5dr_table *dst_tbl, + bool only_update_last_ft); int mlx5dr_table_update_connected_miss_tables(struct mlx5dr_table *dst_tbl); @@ -66,4 +68,8 @@ int mlx5dr_table_ft_set_next_rtc(struct mlx5dr_devx_obj *ft, struct mlx5dr_devx_obj *rtc_0, struct mlx5dr_devx_obj *rtc_1); +int mlx5dr_table_connect_src_ft_to_miss_table(struct mlx5dr_table *src_tbl, + struct mlx5dr_devx_obj *ft, + struct mlx5dr_table *dst_tbl); + #endif /* MLX5DR_TABLE_H_ */ diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index c5ddd1d404..b9807f347d 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -5157,6 +5157,8 @@ flow_hw_table_create(struct rte_eth_dev *dev, matcher_attr.optimize_using_rule_idx = true; matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE; matcher_attr.insert_mode = flow_hw_matcher_insert_mode_get(attr->insertion_type); + if (matcher_attr.insert_mode == MLX5DR_MATCHER_INSERT_BY_INDEX) + matcher_attr.match_mode = MLX5DR_MATCHER_MATCH_MODE_ALWAYS_HIT; if (attr->hash_func == RTE_FLOW_TABLE_HASH_FUNC_CRC16) { DRV_LOG(ERR, "16-bit checksum hash type is not supported"); rte_errno = ENOTSUP;