From patchwork Tue Oct 15 16:35:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Kozyrev X-Patchwork-Id: 146025 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 03A1745B44; Tue, 15 Oct 2024 18:37:20 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A00004068A; Tue, 15 Oct 2024 18:37:02 +0200 (CEST) Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2043.outbound.protection.outlook.com [40.107.92.43]) by mails.dpdk.org (Postfix) with ESMTP id BFEC840663 for ; Tue, 15 Oct 2024 18:36:59 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=eE3nsWqce7Thl80IimbUozC/Sn40yHRar+LTavPDsRjkEzlgahjQoT2LMqMxlacav1Isxm7YyubMKrheSnHF9B2QJfnzdoZNgk053kuW7FItHk4NpnFLw1yOmcenuxlGsvof59aO0Bl3Qah8UH/RLOEMoLsIkF/jh+iWli7WpzjvPm3jM6g9TJP6szZCVxxmobMLMUE3wZUnoi8HOG0w4vxolkm+H+2MAKCPz6Mgxc9n/xnLhfR2x8oSDdIAgAdiJlAfTMZAkq4SP6rRRcQLel9VLgS8ZRZqUGIFZ0aR8bQ4oQUeJNjx8jxwHukMy7BiQoLeJTO3PxmDp+kbZ5JtMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=B3IKqwMqxwr3GYJ8Hww9a49BvL8+LA3RzBMj0XjS0XQ=; b=PYEX+ISFsM+0DGtUg2jZwOrKBtMfWX9K55lsJXh2Du4/B75zm19FnMH5MzgqTDSNci7hVuWLd6OTJvnFo+vyxE/vp3e6FVNGkPLuqk6k5YAIaSg1c2r/R8QF7jM9WBti6eh+EEsn6OmK9VBpUueGyp4nUWRSKR3DFe5gqbpk8uAC4ef6mSxnmFnIB/Z3NCAfKauyI2qjEhMMq+sQQU9Mqp+iCDahCwBZFgFJM6MpptC8736ehUL3Ke6nvkozIDgwuN2lhXbHxbnIvk7HgBwTz443Ey6LjLFHYRTLWr+mBQsHU7xpFCgugfz8bn32U6KPJnsCTa3G/QeObDiGPr2beg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=B3IKqwMqxwr3GYJ8Hww9a49BvL8+LA3RzBMj0XjS0XQ=; b=YtRnq/oLGB+1Jxok8uwFW0Tpf0a3n11THt3fmtnSc0doefRy+oD+JTziYwNuDjD+XLjK8KxLIZe5ksfS8Zx6wUKwWOAHJqKYACgVA+lxmpqQe9MO1QhlkEAOy7+U2Gu27SsegPJon2OvmUOK0nF6vDQbkgOQlL4ZCA3uLSnOzzsMVkPE22/RWupn1GEnUbEnC9ENJH84TF92rCV5D2OdEi/kEAv0le+KTnriVKhuNMAfNN81TGGXo0YL6S3u1o14q6PA0sKbGO5brIFQeLGOfwgbQDvi6y7pHExoPJOzl/jAxfRCGoBG6eXYMieLerqeO3uQMDllN0PpnY/x6nt3sA== Received: from BYAPR06CA0039.namprd06.prod.outlook.com (2603:10b6:a03:14b::16) by DS7PR12MB6312.namprd12.prod.outlook.com (2603:10b6:8:93::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8048.25; Tue, 15 Oct 2024 16:36:55 +0000 Received: from CO1PEPF000042AA.namprd03.prod.outlook.com (2603:10b6:a03:14b:cafe::61) by BYAPR06CA0039.outlook.office365.com (2603:10b6:a03:14b::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8048.27 via Frontend Transport; Tue, 15 Oct 2024 16:36:55 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CO1PEPF000042AA.mail.protection.outlook.com (10.167.243.39) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.17 via Frontend Transport; Tue, 15 Oct 2024 16:36:55 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 15 Oct 2024 09:36:38 -0700 Received: from pegasus01.mtr.labs.mlnx (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 15 Oct 2024 09:36:35 -0700 From: Alexander Kozyrev To: CC: , , , , , , , , Subject: [PATCH 5/5] net/mlx5: implement jump to table index action Date: Tue, 15 Oct 2024 19:35:57 +0300 Message-ID: <20241015163557.581447-5-akozyrev@nvidia.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20241015163557.581447-1-akozyrev@nvidia.com> References: <20241015163557.581447-1-akozyrev@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042AA:EE_|DS7PR12MB6312:EE_ X-MS-Office365-Filtering-Correlation-Id: ad055842-a44a-4b1c-f203-08dced3794a5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|376014|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: 6qx63qo8S5N5Sk/xpny4cIIrQIKmfHYqCKym52ct0l72IM1nEzl1wLu9RM2Dp4i09ilXeR5o/QquD8xZDXKG47rGvWCDGM2xS6AvlAKAKHdek6dAx90soIdDVXiZdwrKe7fAE7pxnPcblCgU7JZxxRjyWKjeYlQRSl1YO7WCvSHsMMZcnSHxhATPrCWT+SNmLAZMLJbyUiuYyGm6Kisu76H93SCTDVIwfD2EkcLMEApY6RO37MedHObJvP4NxpRpVLhv9ToWEBTUU46XMUQahMOt7CwKQh5A9sgYlK6vgn2jDYI8sR+OI9pZNovCdkJqRKxaxNnxnJ/EhZcR8KiBfnpDILYMNlCdMgczHXdZhGRiEt++GB3xSIUbJTqnWf00jp40Z6NwrATYmN0E/h8LatdjGQN1M82JaXmfToIFjdC3okK7iWgrVwPeIYZMw2FYx9NvboMyOzn+TmXySbmCL+pQiFCC5zjj/M8la6906SWPGxsxbk+siI39rZsoZ2XA7XtACWIx4P1X6C9M7OVT2m26/iK2LefdLEDbychNWuW1mcXHfef9iLb+A620ul65gtoK8IbTke0c0RqFy6II1Z+850jmgCtNqRintcWL9poJtNmXwbbH3GI3d8phm4xUKDN4PWWNNydpXkSYG60/AJ1EhwmP5X7xt0lYRTr2U+/2ZCUH6ly8Zcf+JmpZkmp6DC5oK4PrgnTPXtr97nKgTeLjzGJt3qxSe840QboZpfPMQDASnkgLMRv+RClMNPDX+rLOEvdbjrUnG1A1ZVts1zvVc3nezymRDlftGGASwsgHHHMbMKTwRnsJ83dsix11pgKl3pmG24J4DIm9DxwTuXXZ13GrchXB60pd0sDsIWAp5mcknMEglU0WHPeD9xx/kqf1zdAYyWc5KzFxFQe2lQR9WoQjK5xPegp4mpp2iIsbvouAWxsvaCZNqJkl9k8wIT+tK+l1Aj3Z86XnZBGxlcb+1XKyEsVVi3oX8lSy9xo8w2/+Qx8Gbckp0eo0Mp8aEowcBbyY4HrjWNfSTy0deT4/t4LGRXogTJuC1vhhv5cyfjM1A4LQI/IlwRsUwS6kRHDSdetI5tAqU6DcX4Bh/c9Koatrxp75TJbw3YiLPLz29wEnwWRuPGCtvLJkUtyozif/kiQBpevHk58/JFXR+/8MnJeYv6a3Jq8lX1Z0+awsvXIFh8hH2f38oqUtwdM7JYy7vi2HJjQhvfRQsVl9llMI213XWQBk16q1i5sw9MCL40e0z7BXP1F7SVo4ogHBrtsnmjmFBdNyDNSGZ6oL4Xfl6gXQSE/mtF2+hykLiMIpzIUvcVwzMxJ136hW8GkyVo3uhEpoOsPfL6q86JV2OqeLAg+mrtNWD3jna9yW9r0= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(376014)(1800799024)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Oct 2024 16:36:55.1092 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ad055842-a44a-4b1c-f203-08dced3794a5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AA.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6312 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Implement RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX action. Create the hardware steering jump to matcher action, assosiated with the template matcher. Use this action and provided rule index as an offset in the matcher. Note that it is only supported by the isolated matcher, i.e. the table insertion type is by index with pattern. Signed-off-by: Alexander Kozyrev --- drivers/net/mlx5/mlx5_flow.h | 8 +- drivers/net/mlx5/mlx5_flow_hw.c | 145 ++++++++++++++++++++++++++++++++ 2 files changed, 151 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 86a1476879..3708e4d5bf 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -398,6 +398,7 @@ enum mlx5_feature_name { #define MLX5_FLOW_ACTION_IPV6_ROUTING_REMOVE (1ull << 48) #define MLX5_FLOW_ACTION_IPV6_ROUTING_PUSH (1ull << 49) #define MLX5_FLOW_ACTION_NAT64 (1ull << 50) +#define MLX5_FLOW_ACTION_JUMP_TO_TABLE_INDEX (1ull << 51) #define MLX5_FLOW_DROP_INCLUSIVE_ACTIONS \ (MLX5_FLOW_ACTION_COUNT | MLX5_FLOW_ACTION_SAMPLE | MLX5_FLOW_ACTION_AGE) @@ -408,12 +409,14 @@ enum mlx5_feature_name { MLX5_FLOW_ACTION_DEFAULT_MISS | \ MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY | \ MLX5_FLOW_ACTION_SEND_TO_KERNEL | \ - MLX5_FLOW_ACTION_PORT_REPRESENTOR) + MLX5_FLOW_ACTION_PORT_REPRESENTOR | \ + MLX5_FLOW_ACTION_JUMP_TO_TABLE_INDEX) #define MLX5_FLOW_FATE_ESWITCH_ACTIONS \ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \ MLX5_FLOW_ACTION_SEND_TO_KERNEL | \ - MLX5_FLOW_ACTION_JUMP | MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) + MLX5_FLOW_ACTION_JUMP | MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY | \ + MLX5_FLOW_ACTION_JUMP_TO_TABLE_INDEX) #define MLX5_FLOW_MODIFY_HDR_ACTIONS (MLX5_FLOW_ACTION_SET_IPV4_SRC | \ MLX5_FLOW_ACTION_SET_IPV4_DST | \ @@ -1704,6 +1707,7 @@ struct mlx5_flow_template_table_cfg { struct mlx5_matcher_info { struct mlx5dr_matcher *matcher; /* Template matcher. */ + struct mlx5dr_action *jump; /* Jump to matcher action. */ RTE_ATOMIC(uint32_t) refcnt; }; diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 6c8404ee2c..2de89ab58e 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -729,6 +729,9 @@ flow_hw_action_flags_get(const struct rte_flow_action actions[], case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS: action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS; break; + case RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX: + action_flags |= MLX5_FLOW_ACTION_JUMP_TO_TABLE_INDEX; + break; case RTE_FLOW_ACTION_TYPE_VOID: case RTE_FLOW_ACTION_TYPE_END: break; @@ -2925,6 +2928,34 @@ __flow_hw_translate_actions_template(struct rte_eth_dev *dev, src_pos, dr_pos)) goto err; break; + case RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX: + if (masks->conf && + ((const struct rte_flow_action_jump_to_table_index *) + masks->conf)->table) { + struct rte_flow_template_table *jump_table = + ((const struct rte_flow_action_jump_to_table_index *) + actions->conf)->table; + acts->rule_acts[dr_pos].jump_to_matcher.offset = + ((const struct rte_flow_action_jump_to_table_index *) + actions->conf)->index; + if (likely(!rte_flow_template_table_resizable(dev->data->port_id, + &jump_table->cfg.attr))) { + acts->rule_acts[dr_pos].action = + jump_table->matcher_info[0].jump; + } else { + uint32_t selector; + rte_rwlock_read_lock(&jump_table->matcher_replace_rwlk); + selector = jump_table->matcher_selector; + acts->rule_acts[dr_pos].action = + jump_table->matcher_info[selector].jump; + rte_rwlock_read_unlock(&jump_table->matcher_replace_rwlk); + } + } else if (__flow_hw_act_data_general_append + (priv, acts, actions->type, + src_pos, dr_pos)){ + goto err; + } + break; case RTE_FLOW_ACTION_TYPE_END: actions_end = true; break; @@ -3527,6 +3558,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev, cnt_id_t cnt_id; uint32_t *cnt_queue; uint32_t mtr_id; + struct rte_flow_template_table *jump_table; action = &actions[act_data->action_src]; /* @@ -3759,6 +3791,25 @@ flow_hw_actions_construct(struct rte_eth_dev *dev, rule_acts[act_data->action_dst].action = priv->action_nat64[table->type][nat64_c->type]; break; + case RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX: + jump_table = ((const struct rte_flow_action_jump_to_table_index *) + action->conf)->table; + if (likely(!rte_flow_template_table_resizable(dev->data->port_id, + &table->cfg.attr))) { + rule_acts[act_data->action_dst].action = + jump_table->matcher_info[0].jump; + } else { + uint32_t selector; + rte_rwlock_read_lock(&table->matcher_replace_rwlk); + selector = table->matcher_selector; + rule_acts[act_data->action_dst].action = + jump_table->matcher_info[selector].jump; + rte_rwlock_read_unlock(&table->matcher_replace_rwlk); + } + rule_acts[act_data->action_dst].jump_to_matcher.offset = + ((const struct rte_flow_action_jump_to_table_index *) + action->conf)->index; + break; default: break; } @@ -4963,6 +5014,10 @@ flow_hw_table_create(struct rte_eth_dev *dev, }; struct mlx5_priv *priv = dev->data->dev_private; struct mlx5dr_matcher_attr matcher_attr = {0}; + struct mlx5dr_action_jump_to_matcher_attr jump_attr = { + .type = MLX5DR_ACTION_JUMP_TO_MATCHER_BY_INDEX, + .matcher = NULL, + }; struct rte_flow_template_table *tbl = NULL; struct mlx5_flow_group *grp; struct mlx5dr_match_template *mt[MLX5_HW_TBL_MAX_ITEM_TEMPLATE]; @@ -5153,6 +5208,13 @@ flow_hw_table_create(struct rte_eth_dev *dev, tbl->type = attr->flow_attr.transfer ? MLX5DR_TABLE_TYPE_FDB : (attr->flow_attr.egress ? MLX5DR_TABLE_TYPE_NIC_TX : MLX5DR_TABLE_TYPE_NIC_RX); + if (matcher_attr.isolated) { + jump_attr.matcher = tbl->matcher_info[0].matcher; + tbl->matcher_info[0].jump = mlx5dr_action_create_jump_to_matcher(priv->dr_ctx, + &jump_attr, mlx5_hw_act_flag[!!attr->flow_attr.group][tbl->type]); + if (!tbl->matcher_info[0].jump) + goto jtm_error; + } /* * Only the matcher supports update and needs more than 1 WQE, an additional * index is needed. Or else the flow index can be reused. @@ -5175,6 +5237,9 @@ flow_hw_table_create(struct rte_eth_dev *dev, rte_rwlock_init(&tbl->matcher_replace_rwlk); return tbl; res_error: + if (tbl->matcher_info[0].jump) + mlx5dr_action_destroy(tbl->matcher_info[0].jump); +jtm_error: if (tbl->matcher_info[0].matcher) (void)mlx5dr_matcher_destroy(tbl->matcher_info[0].matcher); at_error: @@ -5439,8 +5504,12 @@ flow_hw_table_destroy(struct rte_eth_dev *dev, 1, rte_memory_order_relaxed); } flow_hw_destroy_table_multi_pattern_ctx(table); + if (table->matcher_info[0].jump) + mlx5dr_action_destroy(table->matcher_info[0].jump); if (table->matcher_info[0].matcher) mlx5dr_matcher_destroy(table->matcher_info[0].matcher); + if (table->matcher_info[1].jump) + mlx5dr_action_destroy(table->matcher_info[1].jump); if (table->matcher_info[1].matcher) mlx5dr_matcher_destroy(table->matcher_info[1].matcher); mlx5_hlist_unregister(priv->sh->groups, &table->grp->entry); @@ -6545,6 +6614,7 @@ flow_hw_template_expand_modify_field(struct rte_flow_action actions[], case RTE_FLOW_ACTION_TYPE_DROP: case RTE_FLOW_ACTION_TYPE_SEND_TO_KERNEL: case RTE_FLOW_ACTION_TYPE_JUMP: + case RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX: case RTE_FLOW_ACTION_TYPE_QUEUE: case RTE_FLOW_ACTION_TYPE_RSS: case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: @@ -6761,6 +6831,43 @@ flow_hw_validate_action_jump(struct rte_eth_dev *dev, return 0; } +static int +mlx5_flow_validate_action_jump_to_table_index(const struct rte_flow_action *action, + const struct rte_flow_action *mask, + struct rte_flow_error *error) +{ + const struct rte_flow_action_jump_to_table_index *m = mask->conf; + const struct rte_flow_action_jump_to_table_index *v = action->conf; + struct mlx5dr_action *jump_action; + uint32_t t_group = 0; + + if (!m || !m->table) + return 0; + if (!v) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "Invalid jump to matcher action configuration"); + t_group = v->table->grp->group_id; + if (t_group == 0) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "Unsupported action - jump to root table"); + if (likely(!rte_flow_template_table_resizable(0, &v->table->cfg.attr))) { + jump_action = v->table->matcher_info[0].jump; + } else { + uint32_t selector; + rte_rwlock_read_lock(&v->table->matcher_replace_rwlk); + selector = v->table->matcher_selector; + jump_action = v->table->matcher_info[selector].jump; + rte_rwlock_read_unlock(&v->table->matcher_replace_rwlk); + } + if (jump_action == NULL) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "Unsupported action - table is not an rule array"); + return 0; +} + static int mlx5_hw_validate_action_mark(struct rte_eth_dev *dev, const struct rte_flow_action *template_action, @@ -7242,6 +7349,12 @@ mlx5_flow_hw_actions_validate(struct rte_eth_dev *dev, return ret; action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS; break; + case RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX: + ret = mlx5_flow_validate_action_jump_to_table_index(action, mask, error); + if (ret < 0) + return ret; + action_flags |= MLX5_FLOW_ACTION_JUMP_TO_TABLE_INDEX; + break; default: return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, @@ -7286,6 +7399,7 @@ static enum mlx5dr_action_type mlx5_hw_dr_action_types[] = { [RTE_FLOW_ACTION_TYPE_IPV6_EXT_PUSH] = MLX5DR_ACTION_TYP_PUSH_IPV6_ROUTE_EXT, [RTE_FLOW_ACTION_TYPE_IPV6_EXT_REMOVE] = MLX5DR_ACTION_TYP_POP_IPV6_ROUTE_EXT, [RTE_FLOW_ACTION_TYPE_NAT64] = MLX5DR_ACTION_TYP_NAT64, + [RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX] = MLX5DR_ACTION_TYP_JUMP_TO_MATCHER, }; static inline void @@ -7513,6 +7627,11 @@ flow_hw_parse_flow_actions_to_dr_actions(struct rte_eth_dev *dev, at->dr_off[i] = curr_off; action_types[curr_off++] = MLX5DR_ACTION_TYP_MISS; break; + case RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX: + *tmpl_flags |= MLX5DR_ACTION_TEMPLATE_FLAG_RELAXED_ORDER; + at->dr_off[i] = curr_off; + action_types[curr_off++] = MLX5DR_ACTION_TYP_JUMP_TO_MATCHER; + break; default: type = mlx5_hw_dr_action_types[at->actions[i].type]; at->dr_off[i] = curr_off; @@ -13949,6 +14068,7 @@ mlx5_mirror_destroy_clone(struct rte_eth_dev *dev, case RTE_FLOW_ACTION_TYPE_JUMP: flow_hw_jump_release(dev, clone->action_ctx); break; + case RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX: case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: case RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR: case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: @@ -13982,6 +14102,7 @@ mlx5_mirror_terminal_action(const struct rte_flow_action *action) case RTE_FLOW_ACTION_TYPE_QUEUE: case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: case RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR: + case RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX: return true; default: break; @@ -14024,6 +14145,8 @@ mlx5_mirror_validate_sample_action(struct rte_eth_dev *dev, action[1].type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) return false; break; + case RTE_FLOW_ACTION_TYPE_JUMP_TO_TABLE_INDEX: + break; default: return false; } @@ -14758,8 +14881,14 @@ flow_hw_table_resize(struct rte_eth_dev *dev, struct mlx5dr_action_template *at[MLX5_HW_TBL_MAX_ACTION_TEMPLATE]; struct mlx5dr_match_template *mt[MLX5_HW_TBL_MAX_ITEM_TEMPLATE]; struct mlx5dr_matcher_attr matcher_attr = table->matcher_attr; + struct mlx5dr_action_jump_to_matcher_attr jump_attr = { + .type = MLX5DR_ACTION_JUMP_TO_MATCHER_BY_INDEX, + .matcher = NULL, + }; struct mlx5_multi_pattern_segment *segment = NULL; struct mlx5dr_matcher *matcher = NULL; + struct mlx5dr_action *jump = NULL; + struct mlx5_priv *priv = dev->data->dev_private; uint32_t i, selector = table->matcher_selector; uint32_t other_selector = (selector + 1) & 1; int ret; @@ -14807,6 +14936,17 @@ flow_hw_table_resize(struct rte_eth_dev *dev, table, "failed to create new matcher"); goto error; } + if (matcher_attr.isolated) { + jump_attr.matcher = matcher; + jump = mlx5dr_action_create_jump_to_matcher(priv->dr_ctx, &jump_attr, + mlx5_hw_act_flag[!!table->cfg.attr.flow_attr.group][table->type]); + if (!jump) { + ret = rte_flow_error_set(error, rte_errno, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + table, "failed to create jump to matcher action"); + goto error; + } + } rte_rwlock_write_lock(&table->matcher_replace_rwlk); ret = mlx5dr_matcher_resize_set_target (table->matcher_info[selector].matcher, matcher); @@ -14819,6 +14959,7 @@ flow_hw_table_resize(struct rte_eth_dev *dev, } table->cfg.attr.nb_flows = nb_flows; table->matcher_info[other_selector].matcher = matcher; + table->matcher_info[other_selector].jump = jump; table->matcher_selector = other_selector; rte_atomic_store_explicit(&table->matcher_info[other_selector].refcnt, 0, rte_memory_order_relaxed); @@ -14827,6 +14968,8 @@ flow_hw_table_resize(struct rte_eth_dev *dev, error: if (segment) mlx5_destroy_multi_pattern_segment(segment); + if (jump) + mlx5dr_action_destroy(jump); if (matcher) { ret = mlx5dr_matcher_destroy(matcher); return rte_flow_error_set(error, rte_errno, @@ -14857,6 +15000,8 @@ flow_hw_table_resize_complete(__rte_unused struct rte_eth_dev *dev, return rte_flow_error_set(error, EBUSY, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, table, "cannot complete table resize"); + if (matcher_info->jump) + mlx5dr_action_destroy(matcher_info->jump); ret = mlx5dr_matcher_destroy(matcher_info->matcher); if (ret) return rte_flow_error_set(error, rte_errno,