diff mbox series

[v2,3/5] net/mlx5: create array ste matcher

Message ID 20241015164718.607858-3-akozyrev@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers
Series [v2,1/5] net/mlx5/hws: introduce new matcher type |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Alexander Kozyrev Oct. 15, 2024, 4:47 p.m. UTC 
Create an array STE matcher for a template table
in case of insertion by index with pattern is selected.
Packets will be matched on a pattern at the index.
This table is isolated from any other tables in a group.
That means packets missed the rule won't go to a lower
priority tables, but proceed with the default miss instead.

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_hw.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

Comments

Dariusz Sosnowski Oct. 22, 2024, 3:01 p.m. UTC | #1 
> -----Original Message-----
> From: Alexander Kozyrev <akozyrev@nvidia.com>
> Sent: Tuesday, October 15, 2024 18:47
> To: dev@dpdk.org
> Cc: Raslan Darawsheh <rasland@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Matan Azrad <matan@nvidia.com>; Hamdan
> Agbariya <hamdani@nvidia.com>; Alex Vesker <valex@nvidia.com>; Dariusz
> Sosnowski <dsosnowski@nvidia.com>; Ori Kam <orika@nvidia.com>; Bing Zhao
> <bingz@nvidia.com>; Suanming Mou <suanmingm@nvidia.com>
> Subject: [PATCH v2 3/5] net/mlx5: create array ste matcher
> 
> Create an array STE matcher for a template table in case of insertion by index
> with pattern is selected.
> Packets will be matched on a pattern at the index.
> This table is isolated from any other tables in a group.
> That means packets missed the rule won't go to a lower priority tables, but
> proceed with the default miss instead.
> 
> Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>

Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>

Best regards,
Dariusz Sosnowski
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index b9807f347d..6434937562 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -5157,8 +5157,15 @@  flow_hw_table_create(struct rte_eth_dev *dev,
 	matcher_attr.optimize_using_rule_idx = true;
 	matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE;
 	matcher_attr.insert_mode = flow_hw_matcher_insert_mode_get(attr->insertion_type);
-	if (matcher_attr.insert_mode == MLX5DR_MATCHER_INSERT_BY_INDEX)
-		matcher_attr.match_mode = MLX5DR_MATCHER_MATCH_MODE_ALWAYS_HIT;
+	if (matcher_attr.insert_mode == MLX5DR_MATCHER_INSERT_BY_INDEX) {
+		if (attr->insertion_type == RTE_FLOW_TABLE_INSERTION_TYPE_INDEX_WITH_PATTERN) {
+			matcher_attr.isolated = true;
+			matcher_attr.match_mode = MLX5DR_MATCHER_MATCH_MODE_DEFAULT;
+		} else {
+			matcher_attr.isolated = false;
+			matcher_attr.match_mode = MLX5DR_MATCHER_MATCH_MODE_ALWAYS_HIT;
+		}
+	}
 	if (attr->hash_func == RTE_FLOW_TABLE_HASH_FUNC_CRC16) {
 		DRV_LOG(ERR, "16-bit checksum hash type is not supported");
 		rte_errno = ENOTSUP;