diff mbox series

[v3,11/13] net/ngbe: reconfigure more MAC Rx registers

Message ID 20241104023007.782475-12-jiawenwu@trustnetic.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series Wangxun fixes |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Jiawen Wu Nov. 4, 2024, 2:30 a.m. UTC 
When link status changes, there is a probability that no more packets
can be received on the port, due to hardware defects. These MAC Rx
registers should be reconfigured to fix this problem.

Fixes: b9246b8fa280 ("net/ngbe: support link update")
Fixes: a7c5f95ed9c2 ("net/ngbe: reconfigure MAC Rx when link update")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/base/ngbe_regs.h | 2 ++
 drivers/net/ngbe/ngbe_ethdev.c    | 6 ++++++
 2 files changed, 8 insertions(+)
diff mbox series

Patch

diff --git a/drivers/net/ngbe/base/ngbe_regs.h b/drivers/net/ngbe/base/ngbe_regs.h
index 8a6776b0e6..b1295280a7 100644
--- a/drivers/net/ngbe/base/ngbe_regs.h
+++ b/drivers/net/ngbe/base/ngbe_regs.h
@@ -712,6 +712,8 @@  enum ngbe_5tuple_protocol {
 #define   NGBE_MACRXFLT_CTL_PASS       LS(3, 6, 0x3)
 #define   NGBE_MACRXFLT_RXALL          MS(31, 0x1)
 
+#define NGBE_MAC_WDG_TIMEOUT           0x01100C
+
 /******************************************************************************
  * Statistic Registers
  ******************************************************************************/
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 238533f2b8..c372fd928c 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -1941,6 +1941,7 @@  ngbe_dev_link_update_share(struct rte_eth_dev *dev,
 	bool link_up;
 	int err;
 	int wait = 1;
+	u32 reg;
 
 	memset(&link, 0, sizeof(link));
 	link.link_status = RTE_ETH_LINK_DOWN;
@@ -1998,8 +1999,13 @@  ngbe_dev_link_update_share(struct rte_eth_dev *dev,
 			wr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_SPEED_MASK,
 				NGBE_MACTXCFG_SPEED_1G | NGBE_MACTXCFG_TE);
 		}
+		/* Re configure MAC RX */
+		reg = rd32(hw, NGBE_MACRXCFG);
+		wr32(hw, NGBE_MACRXCFG, reg);
 		wr32m(hw, NGBE_MACRXFLT, NGBE_MACRXFLT_PROMISC,
 			NGBE_MACRXFLT_PROMISC);
+		reg = rd32(hw, NGBE_MAC_WDG_TIMEOUT);
+		wr32(hw, NGBE_MAC_WDG_TIMEOUT, reg);
 	}
 
 	return rte_eth_linkstatus_set(dev, &link);