[v2,1/2] net/intel: add E830 ETF offload timestamp resolution

Message ID 20250212214711.1046777-2-soumyadeep.hore@intel.com (mailing list archive)
State Changes Requested
Delegated to: Bruce Richardson
Headers
Series Implement TXPP Support in ICE PMD |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Hore, Soumyadeep Feb. 12, 2025, 9:47 p.m. UTC
From: Paul Greenwalt <paul.greenwalt@intel.com>

Update E830 ETF offload time stamp resolution to 128ns along
with certain HW defines for TXTIME_PROFILE register.

Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
---
 drivers/net/intel/ice/base/ice_lan_tx_rx.h | 4 ++++
 1 file changed, 4 insertions(+)
  

Comments

Bruce Richardson Feb. 18, 2025, 4:01 p.m. UTC | #1
On Wed, Feb 12, 2025 at 09:47:10PM +0000, Soumyadeep Hore wrote:
> From: Paul Greenwalt <paul.greenwalt@intel.com>
> 
> Update E830 ETF offload time stamp resolution to 128ns along

I'm not sure the word "update" is applicable here, since I just see a
single new define being added. The timestamp resolution wasn't previously
being set in the code, was it, or am I missing something?

> with certain HW defines for TXTIME_PROFILE register.

This commit title and log message should probably just be "add defines for
Tx time stamping" or something similar to that.

> 
> Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
> Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
> ---
>  drivers/net/intel/ice/base/ice_lan_tx_rx.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/net/intel/ice/base/ice_lan_tx_rx.h b/drivers/net/intel/ice/base/ice_lan_tx_rx.h
> index f92382346f..940c6843d9 100644
> --- a/drivers/net/intel/ice/base/ice_lan_tx_rx.h
> +++ b/drivers/net/intel/ice/base/ice_lan_tx_rx.h
> @@ -1278,6 +1278,8 @@ struct ice_ts_desc {
>  #define ICE_TXTIME_MAX_QUEUE		2047
>  #define ICE_SET_TXTIME_MAX_Q_AMOUNT	127
>  #define ICE_OP_TXTIME_MAX_Q_AMOUNT	2047
> +#define ICE_TXTIME_FETCH_TS_DESC_DFLT	8
> +
>  /* Tx Time queue context data
>   *
>   * The sizes of the variables may be larger than needed due to crossing byte
> @@ -1303,6 +1305,8 @@ struct ice_txtime_ctx {
>  	u8 drbell_mode_32;
>  #define ICE_TXTIME_CTX_DRBELL_MODE_32	1
>  	u8 ts_res;
> +#define ICE_TXTIME_CTX_FETCH_PROF_ID_0 0
> +#define ICE_TXTIME_CTX_RESOLUTION_128NS 7
>  	u8 ts_round_type;
>  	u8 ts_pacing_slot;
>  	u8 merging_ena;
> -- 
> 2.43.0
>
  

Patch

diff --git a/drivers/net/intel/ice/base/ice_lan_tx_rx.h b/drivers/net/intel/ice/base/ice_lan_tx_rx.h
index f92382346f..940c6843d9 100644
--- a/drivers/net/intel/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/intel/ice/base/ice_lan_tx_rx.h
@@ -1278,6 +1278,8 @@  struct ice_ts_desc {
 #define ICE_TXTIME_MAX_QUEUE		2047
 #define ICE_SET_TXTIME_MAX_Q_AMOUNT	127
 #define ICE_OP_TXTIME_MAX_Q_AMOUNT	2047
+#define ICE_TXTIME_FETCH_TS_DESC_DFLT	8
+
 /* Tx Time queue context data
  *
  * The sizes of the variables may be larger than needed due to crossing byte
@@ -1303,6 +1305,8 @@  struct ice_txtime_ctx {
 	u8 drbell_mode_32;
 #define ICE_TXTIME_CTX_DRBELL_MODE_32	1
 	u8 ts_res;
+#define ICE_TXTIME_CTX_FETCH_PROF_ID_0 0
+#define ICE_TXTIME_CTX_RESOLUTION_128NS 7
 	u8 ts_round_type;
 	u8 ts_pacing_slot;
 	u8 merging_ena;