[v1,29/30] net/i40e/base: add Shadow RAM pointer definition

Message ID 452cdc85bfde0919543009f7f4b3f9c110e0ff3e.1725270827.git.anatoly.burakov@intel.com (mailing list archive)
State Accepted
Delegated to: Bruce Richardson
Headers
Series Update net/i40e base driver |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Burakov, Anatoly Sept. 2, 2024, 9:54 a.m. UTC
From: Bartosz Jakub Rosadzinski <bartosz.jakub.rosadzinski@intel.com>

This commit introduces a definition of the 5th Free Provisioning Area
pointer in Shadow RAM. 5th PFA is used during NVM update for storing
X710-T2L/X710-T4L's Phy Firmware.

Signed-off-by: Bartosz Jakub Rosadzinski <bartosz.jakub.rosadzinski@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 drivers/net/i40e/base/i40e_type.h | 1 +
 1 file changed, 1 insertion(+)
  

Patch

diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 5d59446d96..7cc746f82f 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -1554,6 +1554,7 @@  struct i40e_hw_port_stats {
 #define I40E_SR_FEATURE_CONFIGURATION_PTR	0x49
 #define I40E_SR_CONFIGURATION_METADATA_PTR	0x4D
 #define I40E_SR_IMMEDIATE_VALUES_PTR		0x4E
+#define I40E_SR_5TH_FREE_PROVISION_AREA_PTR	0x50
 #define I40E_SR_PRESERVATION_RULES_PTR		0x70
 #define I40E_X722_SR_5TH_FREE_PROVISION_AREA_PTR	0x71
 #define I40E_SR_6TH_FREE_PROVISION_AREA_PTR	0x71