From patchwork Fri May 3 13:57:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Burakov, Anatoly" X-Patchwork-Id: 139839 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4F95043F76; Fri, 3 May 2024 15:59:37 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 87C7D40A7D; Fri, 3 May 2024 15:58:45 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) by mails.dpdk.org (Postfix) with ESMTP id 7415940A72 for ; Fri, 3 May 2024 15:58:43 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714744723; x=1746280723; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TtwpR2fF2mh/hl/L3hZxCjAqYlr8MD5kx5h7Q1JadU4=; b=lvqYh6F7+KsrHGiKPVxwC5VRKM5xN5hLcMJJhw9IQKvxK24LmmetS9n0 GdYs4nmD3TEB+UyHZ49aNmJh/yzzvcTnBF/wA0pImikO85rTzUz5jW8bn gQlnL1lHRwLMbeJVAX0VX/KvumWWTBz5vm0ElbVe+x1TemIdhSVRymN6Z ucUTm+PnRHLVOe9SLQnTJ7lIH8hx2JsRoWXqs7JZraatFuOLB61I3v5pV MZmnsXrEk+m7xbt7+77qA0yLKOT31Y0Pw7wG4p9oKprXHtAJ+QbFNlZSz aRx5OCJR/gKOM4DCA0z5bcJyf6p0nGTNmXbZY9VxJzNIgvPLEWbbmwW6S w==; X-CSE-ConnectionGUID: zvYQ6k5aTpiU1rCrX/D43Q== X-CSE-MsgGUID: Klo4WJUnSzSy/ZX8mosH2A== X-IronPort-AV: E=McAfee;i="6600,9927,11063"; a="10714939" X-IronPort-AV: E=Sophos;i="6.07,251,1708416000"; d="scan'208";a="10714939" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2024 06:58:43 -0700 X-CSE-ConnectionGUID: aLYEr+S3SXK3LJuxCRYgLA== X-CSE-MsgGUID: wBIbJshNRt6tXeFqIzfpnw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,251,1708416000"; d="scan'208";a="50642000" Received: from silpixa00401119.ir.intel.com ([10.55.129.167]) by fmviesa002.fm.intel.com with ESMTP; 03 May 2024 06:58:41 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: Mical MarekX , bruce.richardson@intel.com, vladimir.medvedkin@intel.com, Galazka@dpdk.org, Krzysztof , Eryk Rybak , Racicot@dpdk.org, Francis , Michael@dpdk.org, Alice Subject: [PATCH v2 11/27] net/ixgbe/base: replace HIC with direct register access Date: Fri, 3 May 2024 14:57:42 +0100 Message-ID: <526ee4c62c4ced13ce04527fd2ade76d8b3f57bb.1714744628.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Mical MarekX Unifying FW access method to direct register read/writes across all Atom(R) C3000 products. Atom(R) C3000 fiber exhibited an issue with the Host Interface Command execution being locked when another LAN function attempted to acquire the SWFW sync on Manageability Host. This resulted in HIC atomicity break and bogus data being read since the other LAN function cleared all semaphores on timeout whereas HIC execution continued after unlock. Direct register IOSF access showed higher stability and reliability. Signed-off-by: Mical MarekX Reviewed-by: Galazka, Krzysztof Reviewed-by: Eryk Rybak Reviewed-by: Racicot, Francis Reviewed-by: Michael, Alice --- drivers/net/ixgbe/base/ixgbe_x550.c | 76 +---------------------------- drivers/net/ixgbe/base/ixgbe_x550.h | 4 -- 2 files changed, 2 insertions(+), 78 deletions(-) diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c index 844c06cc08..ebfc78235e 100644 --- a/drivers/net/ixgbe/base/ixgbe_x550.c +++ b/drivers/net/ixgbe/base/ixgbe_x550.c @@ -764,14 +764,8 @@ s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw) /* Start with generic X550EM init */ ret_val = ixgbe_init_ops_X550EM(hw); - if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SGMII || - hw->device_id == IXGBE_DEV_ID_X550EM_A_SGMII_L) { - mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550; - mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550; - } else { - mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550a; - mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550a; - } + mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550; + mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550; mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X550a; mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X550a; @@ -1252,72 +1246,6 @@ s32 ixgbe_put_phy_token(struct ixgbe_hw *hw) return IXGBE_ERR_FW_RESP_INVALID; } -/** - * ixgbe_write_iosf_sb_reg_x550a - Writes a value to specified register - * of the IOSF device - * @hw: pointer to hardware structure - * @reg_addr: 32 bit PHY register to write - * @device_type: 3 bit device type - * @data: Data to write to the register - **/ -s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, - u32 device_type, u32 data) -{ - struct ixgbe_hic_internal_phy_req write_cmd; - s32 status; - UNREFERENCED_1PARAMETER(device_type); - - memset(&write_cmd, 0, sizeof(write_cmd)); - write_cmd.hdr.cmd = FW_INT_PHY_REQ_CMD; - write_cmd.hdr.buf_len = FW_INT_PHY_REQ_LEN; - write_cmd.hdr.checksum = FW_DEFAULT_CHECKSUM; - write_cmd.port_number = hw->bus.lan_id; - write_cmd.command_type = FW_INT_PHY_REQ_WRITE; - write_cmd.address = IXGBE_CPU_TO_BE16(reg_addr); - write_cmd.write_data = IXGBE_CPU_TO_BE32(data); - - status = ixgbe_host_interface_command(hw, (u32 *)&write_cmd, - sizeof(write_cmd), - IXGBE_HI_COMMAND_TIMEOUT, false); - - return status; -} - -/** - * ixgbe_read_iosf_sb_reg_x550a - Reads specified register of the IOSF device - * @hw: pointer to hardware structure - * @reg_addr: 32 bit PHY register to write - * @device_type: 3 bit device type - * @data: Pointer to read data from the register - **/ -s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, - u32 device_type, u32 *data) -{ - union { - struct ixgbe_hic_internal_phy_req cmd; - struct ixgbe_hic_internal_phy_resp rsp; - } hic; - s32 status; - UNREFERENCED_1PARAMETER(device_type); - - memset(&hic, 0, sizeof(hic)); - hic.cmd.hdr.cmd = FW_INT_PHY_REQ_CMD; - hic.cmd.hdr.buf_len = FW_INT_PHY_REQ_LEN; - hic.cmd.hdr.checksum = FW_DEFAULT_CHECKSUM; - hic.cmd.port_number = hw->bus.lan_id; - hic.cmd.command_type = FW_INT_PHY_REQ_READ; - hic.cmd.address = IXGBE_CPU_TO_BE16(reg_addr); - - status = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd, - sizeof(hic.cmd), - IXGBE_HI_COMMAND_TIMEOUT, true); - - /* Extract the register value from the response. */ - *data = IXGBE_BE32_TO_CPU(hic.rsp.read_data); - - return status; -} - /** * ixgbe_disable_mdd_X550 * @hw: pointer to hardware structure diff --git a/drivers/net/ixgbe/base/ixgbe_x550.h b/drivers/net/ixgbe/base/ixgbe_x550.h index 10086ab423..cff107e2ab 100644 --- a/drivers/net/ixgbe/base/ixgbe_x550.h +++ b/drivers/net/ixgbe/base/ixgbe_x550.h @@ -40,10 +40,6 @@ s32 ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, u8 ver, u16 len, const char *str); s32 ixgbe_get_phy_token(struct ixgbe_hw *); s32 ixgbe_put_phy_token(struct ixgbe_hw *); -s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, - u32 device_type, u32 data); -s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, - u32 device_type, u32 *data); void ixgbe_disable_mdd_X550(struct ixgbe_hw *hw); void ixgbe_enable_mdd_X550(struct ixgbe_hw *hw); void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap);