Message ID | 5919b346b947e8a9968e974dfdede7d3ae8c0eff.1640273981.git.sthotton@marvell.com (mailing list archive) |
---|---|
State | Accepted, archived |
Delegated to: | Jerin Jacob |
Headers | show |
Series | event/cnxk: add timer adapter periodic mode support | expand |
Context | Check | Description |
---|---|---|
ci/Intel-compilation | warning | apply issues |
ci/iol-testing | warning | apply patch failure |
ci/checkpatch | warning | coding style issues |
On Thu, Dec 23, 2021 at 9:36 PM Shijith Thotton <sthotton@marvell.com> wrote: > > Add support for event timer adapter periodic mode capability. > > Signed-off-by: Shijith Thotton <sthotton@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com> Applied to dpdk-next-net-eventdev/for-main. Thanks > --- > Depends-on: series-20928 (event/cnxk: update min interval calculation) > > drivers/event/cnxk/cnxk_tim_evdev.c | 21 +++++++++++++++++---- > drivers/event/cnxk/cnxk_tim_evdev.h | 1 + > 2 files changed, 18 insertions(+), 4 deletions(-) > > diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c > index 5d52a39752..4d22ac6ac3 100644 > --- a/drivers/event/cnxk/cnxk_tim_evdev.c > +++ b/drivers/event/cnxk/cnxk_tim_evdev.c > @@ -58,7 +58,7 @@ cnxk_tim_chnk_pool_create(struct cnxk_tim_ring *tim_ring, > } > tim_ring->aura = roc_npa_aura_handle_to_aura( > tim_ring->chunk_pool->pool_id); > - tim_ring->ena_dfb = 0; > + tim_ring->ena_dfb = tim_ring->ena_periodic ? 1 : 0; > } else { > tim_ring->chunk_pool = rte_mempool_create( > pool_name, tim_ring->nb_chunks, tim_ring->chunk_sz, > @@ -112,7 +112,9 @@ cnxk_tim_ring_info_get(const struct rte_event_timer_adapter *adptr, > struct cnxk_tim_ring *tim_ring = adptr->data->adapter_priv; > > adptr_info->max_tmo_ns = tim_ring->max_tout; > - adptr_info->min_resolution_ns = tim_ring->tck_nsec; > + adptr_info->min_resolution_ns = tim_ring->ena_periodic ? > + tim_ring->max_tout : > + tim_ring->tck_nsec; > rte_memcpy(&adptr_info->conf, &adptr->data->conf, > sizeof(struct rte_event_timer_adapter_conf)); > } > @@ -237,6 +239,12 @@ cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr) > goto tim_hw_free; > } > > + if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_PERIODIC) { > + /* Use 2 buckets to avoid contention */ > + rcfg->timer_tick_ns /= 2; > + tim_ring->ena_periodic = 1; > + } > + > if (rcfg->timer_tick_ns < min_intvl_ns) { > if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES) { > rcfg->timer_tick_ns = min_intvl_ns; > @@ -246,6 +254,9 @@ cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr) > } > } > > + if (tim_ring->ena_periodic) > + rcfg->max_tmo_ns = rcfg->timer_tick_ns * 2; > + > if (rcfg->timer_tick_ns > rcfg->max_tmo_ns) { > plt_err("Max timeout to too high"); > rc = -ERANGE; > @@ -322,7 +333,8 @@ cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr) > if (rc < 0) > goto tim_bkt_free; > > - rc = roc_tim_lf_config(&dev->tim, tim_ring->ring_id, clk_src, 0, 0, > + rc = roc_tim_lf_config(&dev->tim, tim_ring->ring_id, clk_src, > + tim_ring->ena_periodic, tim_ring->ena_dfb, > tim_ring->nb_bkts, tim_ring->chunk_sz, > tim_ring->tck_int, tim_ring->tck_nsec, clk_freq); > if (rc < 0) { > @@ -493,7 +505,8 @@ cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags, > > /* Store evdev pointer for later use. */ > dev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev; > - *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT; > + *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT | > + RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC; > *ops = &cnxk_tim_ops; > > return 0; > diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h > index 6b5342cc34..91a90ee2ce 100644 > --- a/drivers/event/cnxk/cnxk_tim_evdev.h > +++ b/drivers/event/cnxk/cnxk_tim_evdev.h > @@ -135,6 +135,7 @@ struct cnxk_tim_ring { > uint8_t enable_stats; > uint8_t disable_npa; > uint8_t ena_dfb; > + uint8_t ena_periodic; > uint16_t ring_id; > uint32_t aura; > uint64_t nb_timers; > -- > 2.25.1 >
diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c index 5d52a39752..4d22ac6ac3 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.c +++ b/drivers/event/cnxk/cnxk_tim_evdev.c @@ -58,7 +58,7 @@ cnxk_tim_chnk_pool_create(struct cnxk_tim_ring *tim_ring, } tim_ring->aura = roc_npa_aura_handle_to_aura( tim_ring->chunk_pool->pool_id); - tim_ring->ena_dfb = 0; + tim_ring->ena_dfb = tim_ring->ena_periodic ? 1 : 0; } else { tim_ring->chunk_pool = rte_mempool_create( pool_name, tim_ring->nb_chunks, tim_ring->chunk_sz, @@ -112,7 +112,9 @@ cnxk_tim_ring_info_get(const struct rte_event_timer_adapter *adptr, struct cnxk_tim_ring *tim_ring = adptr->data->adapter_priv; adptr_info->max_tmo_ns = tim_ring->max_tout; - adptr_info->min_resolution_ns = tim_ring->tck_nsec; + adptr_info->min_resolution_ns = tim_ring->ena_periodic ? + tim_ring->max_tout : + tim_ring->tck_nsec; rte_memcpy(&adptr_info->conf, &adptr->data->conf, sizeof(struct rte_event_timer_adapter_conf)); } @@ -237,6 +239,12 @@ cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr) goto tim_hw_free; } + if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_PERIODIC) { + /* Use 2 buckets to avoid contention */ + rcfg->timer_tick_ns /= 2; + tim_ring->ena_periodic = 1; + } + if (rcfg->timer_tick_ns < min_intvl_ns) { if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES) { rcfg->timer_tick_ns = min_intvl_ns; @@ -246,6 +254,9 @@ cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr) } } + if (tim_ring->ena_periodic) + rcfg->max_tmo_ns = rcfg->timer_tick_ns * 2; + if (rcfg->timer_tick_ns > rcfg->max_tmo_ns) { plt_err("Max timeout to too high"); rc = -ERANGE; @@ -322,7 +333,8 @@ cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr) if (rc < 0) goto tim_bkt_free; - rc = roc_tim_lf_config(&dev->tim, tim_ring->ring_id, clk_src, 0, 0, + rc = roc_tim_lf_config(&dev->tim, tim_ring->ring_id, clk_src, + tim_ring->ena_periodic, tim_ring->ena_dfb, tim_ring->nb_bkts, tim_ring->chunk_sz, tim_ring->tck_int, tim_ring->tck_nsec, clk_freq); if (rc < 0) { @@ -493,7 +505,8 @@ cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags, /* Store evdev pointer for later use. */ dev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev; - *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT; + *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT | + RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC; *ops = &cnxk_tim_ops; return 0; diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h index 6b5342cc34..91a90ee2ce 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.h +++ b/drivers/event/cnxk/cnxk_tim_evdev.h @@ -135,6 +135,7 @@ struct cnxk_tim_ring { uint8_t enable_stats; uint8_t disable_npa; uint8_t ena_dfb; + uint8_t ena_periodic; uint16_t ring_id; uint32_t aura; uint64_t nb_timers;
Add support for event timer adapter periodic mode capability. Signed-off-by: Shijith Thotton <sthotton@marvell.com> --- Depends-on: series-20928 (event/cnxk: update min interval calculation) drivers/event/cnxk/cnxk_tim_evdev.c | 21 +++++++++++++++++---- drivers/event/cnxk/cnxk_tim_evdev.h | 1 + 2 files changed, 18 insertions(+), 4 deletions(-)