From patchwork Fri Sep 1 08:06:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Adrien Mazarguil X-Patchwork-Id: 28202 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 42BC67CDB; Fri, 1 Sep 2017 10:07:30 +0200 (CEST) Received: from mail-wr0-f177.google.com (mail-wr0-f177.google.com [209.85.128.177]) by dpdk.org (Postfix) with ESMTP id AED677CE2 for ; Fri, 1 Sep 2017 10:07:28 +0200 (CEST) Received: by mail-wr0-f177.google.com with SMTP id p14so4466538wrg.3 for ; Fri, 01 Sep 2017 01:07:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=woJ6iR/7qhMwbnsdUEA0GbYiLzuJbWdlMXie5ZCgsEc=; b=JI9iuGXPp1DT6GqGy1R+jQ/p6WNyvaX+JYQyf7y8HSe7xY7r/I/RuwPffFQ4M1Im0u j0Fy/rroB6LalJgOxtJb77fQ9MWvwpXhrZOZXOxXATii6Pe8N8qt2SNvnKHGgk3l2CEn hRVKhDZnE+WA2U34NGoc88VwsmsfqawjWiAznle4cZnNDLlwFVxv++YUsoE3KhYFoDZK DAr4kprJYK2W4zjgcyZ+gS4Xwe4MeLkGPfsZL7vsZvmcqXBMbkNQZs7Q56I5Zl6yctLB xz9gGuKvGeUAphVaKtgL7iKniT/sJMkQPyepqSidsdEbaQ2NuDr8Pa7Iiy2xwBhH0rnr gTew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=woJ6iR/7qhMwbnsdUEA0GbYiLzuJbWdlMXie5ZCgsEc=; b=odMQQkKmM+ChmHB1W5fhmoVslSQ6X8xGtdMg8JhPDCaPY/UNsTRz0/HDIv9RXuNREb 1LTQ6tT4qm+q1iv1GOxE5Tm9RLwwIc5nGPtVQGOXcVfMOOWRviTV/RUlBWt4hx2qIsKT 7FxmuKqFhxlCyklrG9P+OmtlYb6apaKZik5zwc2LgtdyyMegO3nHKNFUg6FlxFDMj/0b PrmrJCmgUFVBR6d3XEtYv8NjrVhhemRqsrQFPMUZbhkqn33X2ayV3ZvmXC8DqyRa3Zv+ ZQLJnMpxhXUKMRrRXURZPmBJswnsYlaTceZVzJpIHhDAylKKDwPgY90dGWuxLxLG+4ju CJYQ== X-Gm-Message-State: AHPjjUjdCtibvjpTy98LymcJJ3DJgJ//gyjakxYzY1VUddBT4okbJ0Tj 2B5+oziWhGRpDVfrWXA= X-Google-Smtp-Source: ADKCNb4JJyijEkHQBLYJBwWgAPUi2tpyvOSjTc/VyoNO72mP2ZejWmkfuh3RddjRMErw2sXEWp6dvw== X-Received: by 10.223.188.84 with SMTP id a20mr685658wrh.288.1504253247941; Fri, 01 Sep 2017 01:07:27 -0700 (PDT) Received: from 6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id m11sm1963815wmi.47.2017.09.01.01.07.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Sep 2017 01:07:26 -0700 (PDT) From: Adrien Mazarguil To: dev@dpdk.org Cc: =?utf-8?q?Ga=C3=ABtan_Rivet?= , Allain Legacy Date: Fri, 1 Sep 2017 10:06:18 +0200 Message-Id: <674cc1c4170226270a1e6e0a1c7d0506defce6d7.1504252977.git.adrien.mazarguil@6wind.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: References: MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 03/51] net/mlx4: check max number of ports dynamically X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Use maximum number reported by hardware capabilities as replacement for the static check on MLX4_PMD_MAX_PHYS_PORTS. Cc: Gaƫtan Rivet Cc: Allain Legacy Signed-off-by: Adrien Mazarguil Acked-by: Allain Legacy --- drivers/net/mlx4/mlx4.c | 49 ++++++++++++++++++++++++++++---------------- drivers/net/mlx4/mlx4.h | 3 --- 2 files changed, 31 insertions(+), 21 deletions(-) diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index 0ae78e0..7a93462 100644 --- a/drivers/net/mlx4/mlx4.c +++ b/drivers/net/mlx4/mlx4.c @@ -118,8 +118,12 @@ struct mlx4_secondary_data { rte_spinlock_t lock; /* Port configuration lock. */ } mlx4_secondary_data[RTE_MAX_ETHPORTS]; +/** Configuration structure for device arguments. */ struct mlx4_conf { - uint8_t active_ports; + struct { + uint32_t present; /**< Bit-field for existing ports. */ + uint32_t enabled; /**< Bit-field for user-enabled ports. */ + } ports; }; /* Available parameters list. */ @@ -5927,16 +5931,15 @@ mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx) * Key argument to verify. * @param[in] val * Value associated with key. - * @param out - * User data. + * @param[in, out] conf + * Shared configuration data. * * @return * 0 on success, negative errno value on failure. */ static int -mlx4_arg_parse(const char *key, const char *val, void *out) +mlx4_arg_parse(const char *key, const char *val, struct mlx4_conf *conf) { - struct mlx4_conf *conf = out; unsigned long tmp; errno = 0; @@ -5946,12 +5949,18 @@ mlx4_arg_parse(const char *key, const char *val, void *out) return -errno; } if (strcmp(MLX4_PMD_PORT_KVARG, key) == 0) { - if (tmp >= MLX4_PMD_MAX_PHYS_PORTS) { - ERROR("invalid port index %lu (max: %u)", - tmp, MLX4_PMD_MAX_PHYS_PORTS - 1); + uint32_t ports = rte_log2_u32(conf->ports.present); + + if (tmp >= ports) { + ERROR("port index %lu outside range [0,%" PRIu32 ")", + tmp, ports); return -EINVAL; } - conf->active_ports |= 1 << tmp; + if (!(conf->ports.present & (1 << tmp))) { + ERROR("invalid port index %lu", tmp); + return -EINVAL; + } + conf->ports.enabled |= 1 << tmp; } else { WARN("%s: unknown parameter", key); return -EINVAL; @@ -5987,8 +5996,13 @@ mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf) for (i = 0; pmd_mlx4_init_params[i]; ++i) { arg_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG); while (arg_count-- > 0) { - ret = rte_kvargs_process(kvlist, MLX4_PMD_PORT_KVARG, - mlx4_arg_parse, conf); + ret = rte_kvargs_process(kvlist, + MLX4_PMD_PORT_KVARG, + (int (*)(const char *, + const char *, + void *)) + mlx4_arg_parse, + conf); if (ret != 0) goto free_kvlist; } @@ -6023,7 +6037,7 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) struct ibv_context *attr_ctx = NULL; struct ibv_device_attr device_attr; struct mlx4_conf conf = { - .active_ports = 0, + .ports.present = 0, }; unsigned int vf; int i; @@ -6085,16 +6099,15 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) } INFO("%u port(s) detected", device_attr.phys_port_cnt); + conf.ports.present |= (UINT64_C(1) << device_attr.phys_port_cnt) - 1; if (mlx4_args(pci_dev->device.devargs, &conf)) { ERROR("failed to process device arguments"); err = EINVAL; goto error; } /* Use all ports when none are defined */ - if (conf.active_ports == 0) { - for (i = 0; i < MLX4_PMD_MAX_PHYS_PORTS; i++) - conf.active_ports |= 1 << i; - } + if (!conf.ports.enabled) + conf.ports.enabled = conf.ports.present; for (i = 0; i < device_attr.phys_port_cnt; i++) { uint32_t port = i + 1; /* ports are indexed from one */ struct ibv_context *ctx = NULL; @@ -6107,8 +6120,8 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) #endif /* HAVE_EXP_QUERY_DEVICE */ struct ether_addr mac; - /* If port is not active, skip. */ - if (!(conf.active_ports & (1 << i))) + /* If port is not enabled, skip. */ + if (!(conf.ports.enabled & (1 << i))) continue; #ifdef HAVE_EXP_QUERY_DEVICE exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS; diff --git a/drivers/net/mlx4/mlx4.h b/drivers/net/mlx4/mlx4.h index 5fd1454..109cd1b 100644 --- a/drivers/net/mlx4/mlx4.h +++ b/drivers/net/mlx4/mlx4.h @@ -81,9 +81,6 @@ /* Request send completion once in every 64 sends, might be less. */ #define MLX4_PMD_TX_PER_COMP_REQ 64 -/* Maximum number of physical ports. */ -#define MLX4_PMD_MAX_PHYS_PORTS 2 - /* Maximum number of Scatter/Gather Elements per Work Request. */ #ifndef MLX4_PMD_SGE_WR_N #define MLX4_PMD_SGE_WR_N 4