From patchwork Thu Sep 2 14:41:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 97827 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EF507A0C4C; Thu, 2 Sep 2021 16:43:11 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DA25A40142; Thu, 2 Sep 2021 16:43:11 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id DFCC440142 for ; Thu, 2 Sep 2021 16:43:09 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 18280qPh010845 for ; Thu, 2 Sep 2021 07:43:09 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=jv3GvE5GZCGAJjhcDlBbpynn3epMBmdmkWmj7vozTFI=; b=eNLXqhmUdPObzAfcEEkXyOmcDwRZGNixItB8tXG/5FmZEBhV8rmmPZXX5X5A6Bw90DNu UxoW/UeIKgkaieqsDGq4cXZTGTL5/Ac7G8kS62yPvc2UoNMiEZI3dSzI092beQJyapoy 1QEjO2yQF7S1aEp5fOulHr5UzfMQT2THuoxhFshw9PU1O5Ypaeb/ZgQYEDSAUY6mJrSt uy1qHFMUeSHl8X1HQ1od6cs4w+qT3EdCKhPgLk4xz0+zSAUf5RWikrk6Js02UJTZdzak 48IU2Q7HA39qHfj52xyDlKtxxbkESzFwkBkr8ggT+V2Vf+0JpVOIMbyyVq+xnRKvSdaA 4Q== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3attqmhc70-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 02 Sep 2021 07:43:09 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 2 Sep 2021 07:43:06 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 2 Sep 2021 07:43:07 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id 0B97E3F705E; Thu, 2 Sep 2021 07:43:04 -0700 (PDT) From: Shijith Thotton To: CC: Shijith Thotton , , , , , Date: Thu, 2 Sep 2021 20:11:50 +0530 Message-ID: <82d036afcaab2c72a4009794533c564409483f5b.1630593512.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-GUID: bydgXeb7jIbnWBIhJUJz-z9RAEho1kK7 X-Proofpoint-ORIG-GUID: bydgXeb7jIbnWBIhJUJz-z9RAEho1kK7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-02_04,2021-09-02_03,2020-04-07_01 Subject: [dpdk-dev] [PATCH v3 2/8] event/cnxk: add macro to set eventdev ops X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Added a common macro to set eventdev enqueue and dequeue operations to reduce code. Signed-off-by: Shijith Thotton Signed-off-by: Nithin Dabilpuram --- drivers/event/cnxk/cn10k_eventdev.c | 134 +++++--------- drivers/event/cnxk/cn9k_eventdev.c | 268 +++++++--------------------- 2 files changed, 104 insertions(+), 298 deletions(-) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index 6f37c5bd23..f14a3edd34 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -6,6 +6,23 @@ #include "cnxk_eventdev.h" #include "cnxk_worker.h" +#define CN10K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \ + (deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]) + +#define CN10K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops) \ + (enq_op = \ + enq_ops[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)]) + static uint32_t cn10k_sso_gw_mode_wdata(struct cnxk_sso_evdev *dev) { @@ -285,14 +302,14 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) #undef R }; - const event_dequeue_t sso_hws_tmo_deq[2][2][2][2][2][2] = { + const event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_burst_t sso_hws_tmo_deq_burst[2][2][2][2][2][2] = { + const event_dequeue_burst_t sso_hws_deq_tmo_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_burst_##name, NIX_RX_FASTPATH_MODES @@ -313,7 +330,7 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) #undef R }; - const event_dequeue_t sso_hws_tmo_deq_seg[2][2][2][2][2][2] = { + const event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_##name, NIX_RX_FASTPATH_MODES @@ -321,7 +338,7 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) }; const event_dequeue_burst_t - sso_hws_tmo_deq_seg_burst[2][2][2][2][2][2] = { + sso_hws_deq_tmo_seg_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_burst_##name, NIX_RX_FASTPATH_MODES @@ -350,99 +367,34 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) event_dev->enqueue_new_burst = cn10k_sso_hws_enq_new_burst; event_dev->enqueue_forward_burst = cn10k_sso_hws_enq_fwd_burst; if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) { - event_dev->dequeue = sso_hws_deq_seg - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = sso_hws_deq_seg_burst - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, + sso_hws_deq_seg); + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, + sso_hws_deq_seg_burst); if (dev->is_timeout_deq) { - event_dev->dequeue = sso_hws_tmo_deq_seg - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = sso_hws_tmo_deq_seg_burst - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, + sso_hws_deq_tmo_seg); + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, + sso_hws_deq_tmo_seg_burst); } } else { - event_dev->dequeue = sso_hws_deq - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = sso_hws_deq_burst - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq); + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, + sso_hws_deq_burst); if (dev->is_timeout_deq) { - event_dev->dequeue = sso_hws_tmo_deq - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = sso_hws_tmo_deq_burst - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, + sso_hws_deq_tmo); + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, + sso_hws_deq_tmo_burst); } } - if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) { - /* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */ - event_dev->txa_enqueue = sso_hws_tx_adptr_enq_seg - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)]; - } else { - event_dev->txa_enqueue = sso_hws_tx_adptr_enq - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)]; - } + if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) + CN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, + sso_hws_tx_adptr_enq_seg); + else + CN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, + sso_hws_tx_adptr_enq); event_dev->txa_enqueue_same_dest = event_dev->txa_enqueue; } @@ -864,7 +816,7 @@ cn10k_sso_init(struct rte_eventdev *event_dev) int rc; if (RTE_CACHE_LINE_SIZE != 64) { - plt_err("Driver not compiled for CN9K"); + plt_err("Driver not compiled for CN10K"); return -EFAULT; } diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c index a69edff195..7dea241fbc 100644 --- a/drivers/event/cnxk/cn9k_eventdev.c +++ b/drivers/event/cnxk/cn9k_eventdev.c @@ -9,6 +9,23 @@ #define CN9K_DUAL_WS_NB_WS 2 #define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id) +#define CN9K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \ + (deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]) + +#define CN9K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops) \ + (enq_op = \ + enq_ops[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)]) + static void cn9k_init_hws_ops(struct cn9k_sso_hws_state *ws, uintptr_t base) { @@ -468,99 +485,33 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev) event_dev->enqueue_new_burst = cn9k_sso_hws_enq_new_burst; event_dev->enqueue_forward_burst = cn9k_sso_hws_enq_fwd_burst; if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) { - event_dev->dequeue = sso_hws_deq_seg - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = sso_hws_deq_seg_burst - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_seg); + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, + sso_hws_deq_seg_burst); if (dev->is_timeout_deq) { - event_dev->dequeue = sso_hws_deq_tmo_seg - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = sso_hws_deq_tmo_seg_burst - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, + sso_hws_deq_tmo_seg); + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, + sso_hws_deq_tmo_seg_burst); } } else { - event_dev->dequeue = sso_hws_deq - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = sso_hws_deq_burst - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq); + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, + sso_hws_deq_burst); if (dev->is_timeout_deq) { - event_dev->dequeue = sso_hws_deq_tmo - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = sso_hws_deq_tmo_burst - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, + sso_hws_deq_tmo); + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, + sso_hws_deq_tmo_burst); } } - if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) { - /* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */ - event_dev->txa_enqueue = sso_hws_tx_adptr_enq_seg - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)]; - } else { - event_dev->txa_enqueue = sso_hws_tx_adptr_enq - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)]; - } + if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) + CN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, + sso_hws_tx_adptr_enq_seg); + else + CN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, + sso_hws_tx_adptr_enq); if (dev->dual_ws) { event_dev->enqueue = cn9k_sso_hws_dual_enq; @@ -570,134 +521,37 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev) cn9k_sso_hws_dual_enq_fwd_burst; if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) { - event_dev->dequeue = sso_hws_dual_deq_seg - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = sso_hws_dual_deq_seg_burst - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, + sso_hws_dual_deq_seg); + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, + sso_hws_dual_deq_seg_burst); if (dev->is_timeout_deq) { - event_dev->dequeue = sso_hws_dual_deq_tmo_seg - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = - sso_hws_dual_deq_tmo_seg_burst - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_RSS_F)]; + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, + sso_hws_dual_deq_tmo_seg); + CN9K_SET_EVDEV_DEQ_OP( + dev, event_dev->dequeue_burst, + sso_hws_dual_deq_tmo_seg_burst); } } else { - event_dev->dequeue = sso_hws_dual_deq - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = sso_hws_dual_deq_burst - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)]; + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, + sso_hws_dual_deq); + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, + sso_hws_dual_deq_burst); if (dev->is_timeout_deq) { - event_dev->dequeue = sso_hws_dual_deq_tmo - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_RSS_F)]; - event_dev->dequeue_burst = - sso_hws_dual_deq_tmo_burst - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_VLAN_STRIP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_TSTAMP_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_MARK_UPDATE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_CHECKSUM_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_PTYPE_F)] - [!!(dev->rx_offloads & - NIX_RX_OFFLOAD_RSS_F)]; + CN9K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, + sso_hws_dual_deq_tmo); + CN9K_SET_EVDEV_DEQ_OP( + dev, event_dev->dequeue_burst, + sso_hws_dual_deq_tmo_burst); } } - if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) { - /* [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] - */ - event_dev->txa_enqueue = sso_hws_dual_tx_adptr_enq_seg - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] - [!!(dev->tx_offloads & - NIX_TX_OFFLOAD_MBUF_NOFF_F)] - [!!(dev->tx_offloads & - NIX_TX_OFFLOAD_VLAN_QINQ_F)] - [!!(dev->tx_offloads & - NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] - [!!(dev->tx_offloads & - NIX_TX_OFFLOAD_L3_L4_CSUM_F)]; - } else { - event_dev->txa_enqueue = sso_hws_dual_tx_adptr_enq - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] - [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] - [!!(dev->tx_offloads & - NIX_TX_OFFLOAD_MBUF_NOFF_F)] - [!!(dev->tx_offloads & - NIX_TX_OFFLOAD_VLAN_QINQ_F)] - [!!(dev->tx_offloads & - NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] - [!!(dev->tx_offloads & - NIX_TX_OFFLOAD_L3_L4_CSUM_F)]; - } + if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) + CN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, + sso_hws_dual_tx_adptr_enq_seg); + else + CN9K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, + sso_hws_dual_tx_adptr_enq); } event_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;