From patchwork Mon Jul 13 11:11:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Medvedkin X-Patchwork-Id: 73907 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 280C6A0540; Mon, 13 Jul 2020 13:11:44 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 531531D614; Mon, 13 Jul 2020 13:11:37 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 695881D5B2 for ; Mon, 13 Jul 2020 13:11:34 +0200 (CEST) IronPort-SDR: WmFuTtU1GmJJbfggg+Dq5CPqZ8Y7NjJgOkQKqbiDzlmjIE/XCKvDA7vqKcZnQ8wtQDuvUvjIS9 pBOflLvsKRGg== X-IronPort-AV: E=McAfee;i="6000,8403,9680"; a="136062709" X-IronPort-AV: E=Sophos;i="5.75,347,1589266800"; d="scan'208";a="136062709" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jul 2020 04:11:34 -0700 IronPort-SDR: 2DH4ajZ49IrXlg9jk5IGmrE7SPr/2Vi4fUtWiKN1fWt1tf7wFO+64knxaWinwXNxs5vhSibCHo VFmkSTjtOukg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,347,1589266800"; d="scan'208";a="307424858" Received: from silpixa00400322.ir.intel.com ([10.237.214.86]) by fmsmga004.fm.intel.com with ESMTP; 13 Jul 2020 04:11:32 -0700 From: Vladimir Medvedkin To: dev@dpdk.org Cc: david.marchand@redhat.com, jerinj@marvell.com, mdr@ashroe.eu, thomas@monjalon.net, konstantin.ananyev@intel.com, bruce.richardson@intel.com Date: Mon, 13 Jul 2020 12:11:20 +0100 Message-Id: <869034e585604e3cc2f1131219478e634a1d3f64.1594638050.git.vladimir.medvedkin@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH v6 1/8] eal/x86: introduce AVX 512-bit type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" New data type to manipulate 512 bit AVX values. Signed-off-by: Vladimir Medvedkin Acked-by: Konstantin Ananyev --- lib/librte_eal/x86/include/rte_vect.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h index df5a60762..30dcfd5e7 100644 --- a/lib/librte_eal/x86/include/rte_vect.h +++ b/lib/librte_eal/x86/include/rte_vect.h @@ -13,6 +13,7 @@ #include #include +#include #include "generic/rte_vect.h" #if (defined(__ICC) || \ @@ -90,6 +91,24 @@ __extension__ ({ \ }) #endif /* (defined(__ICC) && __ICC < 1210) */ +#ifdef __AVX512F__ + +#define RTE_X86_ZMM_SIZE (sizeof(__m512i)) +#define RTE_X86_ZMM_MASK (ZMM_SIZE - 1) + +typedef union __rte_x86_zmm { + __m512i z; + ymm_t y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)]; + xmm_t x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)]; + uint8_t u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)]; + uint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)]; + uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)]; + uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)]; + double pd[RTE_X86_ZMM_SIZE / sizeof(double)]; +} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t; + +#endif /* __AVX512F__ */ + #ifdef __cplusplus } #endif