From patchwork Tue Aug 1 16:54:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrien Mazarguil X-Patchwork-Id: 27334 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 5471AA2D1; Tue, 1 Aug 2017 18:56:18 +0200 (CEST) Received: from mail-wm0-f53.google.com (mail-wm0-f53.google.com [74.125.82.53]) by dpdk.org (Postfix) with ESMTP id E3ECBA12C for ; Tue, 1 Aug 2017 18:55:47 +0200 (CEST) Received: by mail-wm0-f53.google.com with SMTP id m85so20353664wma.0 for ; Tue, 01 Aug 2017 09:55:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:subject:date:message-id:in-reply-to:references; bh=QLwy0bkfRSdwKBqNRWxhHMSl9ndqDVJDJ4Ee/sxWARI=; b=VCsBakw98+POT1L3jMqQ8WgyJr77nGIpYcelPca3rkLlcawS06i/Nl9jNmuwBqi4Qv JQj6EORtZ5Kz4U9VndI0nxsGn3BLA41R9zYP6vdVbjSJ99sDhCvoq6CQrqBXjEcMgTe4 LnQaY++nh9aexd1WWrBQ68HCaZToX5/CeOn8qe2YDLFtlYg6PcJ9U7p0AR+oThXrmohH uwvCa1EOEQTGpidBTT37s8vLekOWMq9XAxElYjBZ7q81o/xg7ShCSuVUmg55IacYEnhc n2hlP7OqkdQtGMJm16pmg7eaThnIpWmAHi3YnVp0qPf9V6HNUeJ7vr/FbIDzAesfgUzY kQjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=QLwy0bkfRSdwKBqNRWxhHMSl9ndqDVJDJ4Ee/sxWARI=; b=NxrXAiLIDVynq7yl8ODPD25N/RSIRKK5kf9mDH5sOQnYxO3rR4iL9shW4tTHVK0sJn Nu4ucfCMX/3c4xELdW3UwCg/X6+8vN2m83My03SUYXr6huh+sMGQ6gqJjLkheqrp7M08 2Pb+OeyMJumoFi/Qi9shS95/93vlcHe1rQ5V5l2gbHRj46o4D8g4pvix8gtlVIfWDA4k HZD5LiMMjkWMe0rQWgk+n8rkYsvgQ3b+/AHvBcslPlgIpPruC0QWtowhbvCQhKpc/pOZ zqZaVKA+ERtnzq41EM08FpBtUTlOl1BMsl844GuplHJH8BtGwzkmDr5qZAhABgp/qqXj VMLQ== X-Gm-Message-State: AIVw1106IeSFXNCPo09pJs7soiepSYDTaIc/GrxeENHSwmKI+XqdfTSc 0CXPdtG7SVd0jNU4gBU= X-Received: by 10.28.126.87 with SMTP id z84mr1844662wmc.65.1501606547136; Tue, 01 Aug 2017 09:55:47 -0700 (PDT) Received: from 6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t2sm1534138wmt.23.2017.08.01.09.55.46 for (version=TLS1_2 cipher=AES128-SHA bits=128/128); Tue, 01 Aug 2017 09:55:46 -0700 (PDT) From: Adrien Mazarguil To: dev@dpdk.org Date: Tue, 1 Aug 2017 18:54:27 +0200 Message-Id: X-Mailer: git-send-email 2.1.4 In-Reply-To: References: Subject: [dpdk-dev] [PATCH v1 40/48] net/mlx4: separate Rx/Tx definitions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Except for a minor documentation update on internal structure definitions to make them more Doxygen-friendly, there is no impact on functionality. Signed-off-by: Adrien Mazarguil --- drivers/net/mlx4/mlx4.c | 13 +--- drivers/net/mlx4/mlx4.h | 69 +------------------- drivers/net/mlx4/mlx4_flow.c | 1 + drivers/net/mlx4/mlx4_intr.c | 1 + drivers/net/mlx4/mlx4_rxtx.h | 132 ++++++++++++++++++++++++++++++++++++++ 5 files changed, 137 insertions(+), 79 deletions(-) diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index 284575c..21f0664 100644 --- a/drivers/net/mlx4/mlx4.c +++ b/drivers/net/mlx4/mlx4.c @@ -71,19 +71,9 @@ /* PMD headers. */ #include "mlx4.h" #include "mlx4_flow.h" +#include "mlx4_rxtx.h" #include "mlx4_utils.h" -/* Work Request ID data type (64 bit). */ -typedef union { - struct { - uint32_t id; - uint16_t offset; - } data; - uint64_t raw; -} wr_id_t; - -#define WR_ID(o) (((wr_id_t *)&(o))->data) - /** Configuration structure for device arguments. */ struct mlx4_conf { struct { @@ -3083,7 +3073,6 @@ RTE_INIT(rte_mlx4_pmd_init); static void rte_mlx4_pmd_init(void) { - RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t)); /* * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use * huge pages. Calling ibv_fork_init() during init allows diff --git a/drivers/net/mlx4/mlx4.h b/drivers/net/mlx4/mlx4.h index f815dd8..edbece6 100644 --- a/drivers/net/mlx4/mlx4.h +++ b/drivers/net/mlx4/mlx4.h @@ -85,73 +85,8 @@ enum { #define MLX4_DRIVER_NAME "net_mlx4" -struct mlx4_rxq_stats { - unsigned int idx; /**< Mapping index. */ - uint64_t ipackets; /**< Total of successfully received packets. */ - uint64_t ibytes; /**< Total of successfully received bytes. */ - uint64_t idropped; /**< Total of packets dropped when RX ring full. */ - uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */ -}; - -/* RX element. */ -struct rxq_elt { - struct ibv_recv_wr wr; /* Work Request. */ - struct ibv_sge sge; /* Scatter/Gather Element. */ - /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */ -}; - -/* RX queue descriptor. */ -struct rxq { - struct priv *priv; /* Back pointer to private data. */ - struct rte_mempool *mp; /* Memory Pool for allocations. */ - struct ibv_mr *mr; /* Memory Region (for mp). */ - struct ibv_cq *cq; /* Completion Queue. */ - struct ibv_qp *qp; /* Queue Pair. */ - struct ibv_comp_channel *channel; - unsigned int port_id; /* Port ID for incoming packets. */ - unsigned int elts_n; /* (*elts)[] length. */ - unsigned int elts_head; /* Current index in (*elts)[]. */ - struct rxq_elt (*elts)[]; /* RX elements. */ - struct mlx4_rxq_stats stats; /* RX queue counters. */ - unsigned int socket; /* CPU socket ID for allocations. */ -}; - -/* TX element. */ -struct txq_elt { - struct ibv_send_wr wr; /* Work request. */ - struct ibv_sge sge; /* Scatter/gather element. */ - struct rte_mbuf *buf; -}; - -struct mlx4_txq_stats { - unsigned int idx; /**< Mapping index. */ - uint64_t opackets; /**< Total of successfully sent packets. */ - uint64_t obytes; /**< Total of successfully sent bytes. */ - uint64_t odropped; /**< Total of packets not sent when TX ring full. */ -}; - -/* TX queue descriptor. */ -struct txq { - struct priv *priv; /* Back pointer to private data. */ - struct { - const struct rte_mempool *mp; /* Cached Memory Pool. */ - struct ibv_mr *mr; /* Memory Region (for mp). */ - uint32_t lkey; /* mr->lkey */ - } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */ - struct ibv_cq *cq; /* Completion Queue. */ - struct ibv_qp *qp; /* Queue Pair. */ - uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */ - unsigned int elts_n; /* (*elts)[] length. */ - struct txq_elt (*elts)[]; /* TX elements. */ - unsigned int elts_head; /* Current index in (*elts)[]. */ - unsigned int elts_tail; /* First element awaiting completion. */ - unsigned int elts_comp; /* Number of completion requests. */ - unsigned int elts_comp_cd; /* Countdown for next completion request. */ - unsigned int elts_comp_cd_init; /* Initial value for countdown. */ - struct mlx4_txq_stats stats; /* TX queue counters. */ - unsigned int socket; /* CPU socket ID for allocations. */ -}; - +struct rxq; +struct txq; struct rte_flow; struct priv { diff --git a/drivers/net/mlx4/mlx4_flow.c b/drivers/net/mlx4/mlx4_flow.c index 6f6f455..61455ce 100644 --- a/drivers/net/mlx4/mlx4_flow.c +++ b/drivers/net/mlx4/mlx4_flow.c @@ -40,6 +40,7 @@ /* PMD headers. */ #include "mlx4.h" #include "mlx4_flow.h" +#include "mlx4_rxtx.h" #include "mlx4_utils.h" /** Static initializer for items. */ diff --git a/drivers/net/mlx4/mlx4_intr.c b/drivers/net/mlx4/mlx4_intr.c index bcf4d59..76d2e01 100644 --- a/drivers/net/mlx4/mlx4_intr.c +++ b/drivers/net/mlx4/mlx4_intr.c @@ -56,6 +56,7 @@ #include #include "mlx4.h" +#include "mlx4_rxtx.h" #include "mlx4_utils.h" static void mlx4_link_status_alarm(struct priv *priv); diff --git a/drivers/net/mlx4/mlx4_rxtx.h b/drivers/net/mlx4/mlx4_rxtx.h new file mode 100644 index 0000000..1d46e1e --- /dev/null +++ b/drivers/net/mlx4/mlx4_rxtx.h @@ -0,0 +1,132 @@ +/*- + * BSD LICENSE + * + * Copyright 2017 6WIND S.A. + * Copyright 2017 Mellanox + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of 6WIND S.A. nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef MLX4_RXTX_H_ +#define MLX4_RXTX_H_ + +#include + +/* Verbs headers do not support -pedantic. */ +#ifdef PEDANTIC +#pragma GCC diagnostic ignored "-Wpedantic" +#endif +#include +#ifdef PEDANTIC +#pragma GCC diagnostic error "-Wpedantic" +#endif + +#include +#include + +#include "mlx4.h" + +/** Convert work request ID to data. */ +#define WR_ID(o) \ + (((union { \ + struct { \ + uint32_t id; \ + uint16_t offset; \ + } data; \ + uint64_t raw; \ + } *)&(o))->data) + +/** Rx queue counters. */ +struct mlx4_rxq_stats { + unsigned int idx; /**< Mapping index. */ + uint64_t ipackets; /**< Total of successfully received packets. */ + uint64_t ibytes; /**< Total of successfully received bytes. */ + uint64_t idropped; /**< Total of packets dropped when Rx ring full. */ + uint64_t rx_nombuf; /**< Total of Rx mbuf allocation failures. */ +}; + +/** Rx element. */ +struct rxq_elt { + struct ibv_recv_wr wr; /**< Work request. */ + struct ibv_sge sge; /**< Scatter/gather element. */ + /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */ +}; + +/** Rx queue descriptor. */ +struct rxq { + struct priv *priv; /**< Back pointer to private data. */ + struct rte_mempool *mp; /**< Memory pool for allocations. */ + struct ibv_mr *mr; /**< Memory region (for mp). */ + struct ibv_cq *cq; /**< Completion queue. */ + struct ibv_qp *qp; /**< Queue pair. */ + struct ibv_comp_channel *channel; /**< Rx completion channel. */ + unsigned int port_id; /**< Port ID for incoming packets. */ + unsigned int elts_n; /**< (*elts)[] length. */ + unsigned int elts_head; /**< Current index in (*elts)[]. */ + struct rxq_elt (*elts)[]; /**< Rx elements. */ + struct mlx4_rxq_stats stats; /**< Rx queue counters. */ + unsigned int socket; /**< CPU socket ID for allocations. */ +}; + +/** Tx element. */ +struct txq_elt { + struct ibv_send_wr wr; /* Work request. */ + struct ibv_sge sge; /* Scatter/gather element. */ + struct rte_mbuf *buf; /**< Buffer. */ +}; + +/** Rx queue counters. */ +struct mlx4_txq_stats { + unsigned int idx; /**< Mapping index. */ + uint64_t opackets; /**< Total of successfully sent packets. */ + uint64_t obytes; /**< Total of successfully sent bytes. */ + uint64_t odropped; /**< Total of packets not sent when Tx ring full. */ +}; + +/** Tx queue descriptor. */ +struct txq { + struct priv *priv; /**< Back pointer to private data. */ + struct { + const struct rte_mempool *mp; /**< Cached memory pool. */ + struct ibv_mr *mr; /**< Memory region (for mp). */ + uint32_t lkey; /**< mr->lkey copy. */ + } mp2mr[MLX4_PMD_TX_MP_CACHE]; /**< MP to MR translation table. */ + struct ibv_cq *cq; /**< Completion queue. */ + struct ibv_qp *qp; /**< Queue pair. */ + uint32_t max_inline; /**< Max inline send size. */ + unsigned int elts_n; /**< (*elts)[] length. */ + struct txq_elt (*elts)[]; /**< Tx elements. */ + unsigned int elts_head; /**< Current index in (*elts)[]. */ + unsigned int elts_tail; /**< First element awaiting completion. */ + unsigned int elts_comp; /**< Number of completion requests. */ + unsigned int elts_comp_cd; /**< Countdown for next completion. */ + unsigned int elts_comp_cd_init; /**< Initial value for countdown. */ + struct mlx4_txq_stats stats; /**< Tx queue counters. */ + unsigned int socket; /**< CPU socket ID for allocations. */ +}; + +#endif /* MLX4_RXTX_H_ */