[v1,01/24] net/igc/base: fix deadlock in i225

Message ID edb5d0a2ee7c6ad57ad837dcf69c647d83ff9bfc.1738858026.git.anatoly.burakov@intel.com (mailing list archive)
State Accepted
Delegated to: Bruce Richardson
Headers
Series Fixes for igc and e1000 |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Burakov, Anatoly Feb. 6, 2025, 4:08 p.m. UTC
From: Dima Ruinskiy <dima.ruinskiy@intel.com>

Currently, when writing GPY PHY registers, semaphor is acquired before
writing. However, if writing fails, semaphor is not released, causing
a deadlock down the line. Fix the issue by removing premature return.

Fixes: 8cb7c57d9b3c ("net/igc: support device initialization")
Cc: stable@dpdk.org

Signed-off-by: Dima Ruinskiy <dima.ruinskiy@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 .mailmap                             | 1 +
 drivers/net/intel/igc/base/igc_phy.c | 4 ----
 2 files changed, 1 insertion(+), 4 deletions(-)
  

Patch

diff --git a/.mailmap b/.mailmap
index 9209a716e0..3faff80f0e 100644
--- a/.mailmap
+++ b/.mailmap
@@ -358,6 +358,7 @@  Dhruv Tripathi <dhruv.tripathi@arm.com>
 Diana Wang <na.wang@corigine.com>
 Didier Pallard <didier.pallard@6wind.com>
 Dilshod Urazov <dilshod.urazov@oktetlabs.ru>
+Dima Ruinskiy <dima.ruinskiy@intel.com>
 Ding Zhi <zhi.ding@6wind.com>
 Diogo Behrens <diogo.behrens@huawei.com>
 Dirk-Holger Lenz <dirk.lenz@ng4t.com>
diff --git a/drivers/net/intel/igc/base/igc_phy.c b/drivers/net/intel/igc/base/igc_phy.c
index 2906bae21a..ddc2b6ecc1 100644
--- a/drivers/net/intel/igc/base/igc_phy.c
+++ b/drivers/net/intel/igc/base/igc_phy.c
@@ -4148,8 +4148,6 @@  s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data)
 		if (ret_val)
 			return ret_val;
 		ret_val = igc_write_phy_reg_mdic(hw, offset, data);
-		if (ret_val)
-			return ret_val;
 		hw->phy.ops.release(hw);
 	} else {
 		ret_val = igc_write_xmdio_reg(hw, (u16)offset, dev_addr,
@@ -4182,8 +4180,6 @@  s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data)
 		if (ret_val)
 			return ret_val;
 		ret_val = igc_read_phy_reg_mdic(hw, offset, data);
-		if (ret_val)
-			return ret_val;
 		hw->phy.ops.release(hw);
 	} else {
 		ret_val = igc_read_xmdio_reg(hw, (u16)offset, dev_addr,