From patchwork Fri Sep 22 08:25:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gowrishankar X-Patchwork-Id: 29088 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8405A1B1A3; Fri, 22 Sep 2017 10:26:01 +0200 (CEST) Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by dpdk.org (Postfix) with ESMTP id ED3DF1B1A3 for ; Fri, 22 Sep 2017 10:25:58 +0200 (CEST) Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v8M8OSXi038007 for ; Fri, 22 Sep 2017 04:25:58 -0400 Received: from e23smtp06.au.ibm.com (e23smtp06.au.ibm.com [202.81.31.148]) by mx0a-001b2d01.pphosted.com with ESMTP id 2d4png9ahm-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Fri, 22 Sep 2017 04:25:57 -0400 Received: from localhost by e23smtp06.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 22 Sep 2017 18:25:55 +1000 Received: from d23relay10.au.ibm.com (202.81.31.229) by e23smtp06.au.ibm.com (202.81.31.212) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Fri, 22 Sep 2017 18:25:53 +1000 Received: from d23av03.au.ibm.com (d23av03.au.ibm.com [9.190.234.97]) by d23relay10.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v8M8PqHg39780360 for ; Fri, 22 Sep 2017 18:25:52 +1000 Received: from d23av03.au.ibm.com (localhost [127.0.0.1]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id v8M8Pjeh009769 for ; Fri, 22 Sep 2017 18:25:45 +1000 Received: from chozha.in.ibm.com ([9.109.223.99]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id v8M8PUBx009424; Fri, 22 Sep 2017 18:25:43 +1000 From: Gowrishankar To: dev@dpdk.org Cc: Chao Zhu , Bruce Richardson , Konstantin Ananyev , Jerin Jacob , viktorin@rehivetech.com, jianbo.liu@linaro.org Date: Fri, 22 Sep 2017 13:55:36 +0530 X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: X-TM-AS-MML: disable x-cbid: 17092208-0040-0000-0000-0000035745D2 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17092208-0041-0000-0000-00000CD80D8D Message-Id: X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-09-22_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1709220117 Subject: [dpdk-dev] [PATCH v2 4/5] eal/armv8: define architecture specific rdtsc hz X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jerin Jacob Use cntvct_el0 system register to get the system counter frequency. If the system is configured with RTE_ARM_EAL_RDTSC_USE_PMU then return 0(let the common code calibrate the tsc frequency). CC: Jianbo Liu Signed-off-by: Jerin Jacob Acked-by: Jianbo Liu --- .../common/include/arch/arm/rte_cycles_64.h | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h b/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h index 1545769..5b95cb6 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h +++ b/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h @@ -58,6 +58,23 @@ asm volatile("mrs %0, cntvct_el0" : "=r" (tsc)); return tsc; } + +/** + * Get the number of rdtsc cycles in one second if the architecture supports. + * + * @return + * The number of rdtsc cycles in one second. Return zero if the architecture + * support is not available. + */ +static inline uint64_t +rte_rdtsc_arch_hz(void) +{ + uint64_t freq; + + asm volatile("mrs %0, cntfrq_el0" : "=r" (freq)); + return freq; +} + #else /** * This is an alternative method to enable rte_rdtsc() with high resolution @@ -85,6 +102,19 @@ asm volatile("mrs %0, pmccntr_el0" : "=r"(tsc)); return tsc; } + +/** + * Get the number of rdtsc cycles in one second if the architecture supports. + * + * @return + * The number of rdtsc cycles in one second. Return zero if the architecture + * support is not available. + */ +static inline uint64_t +rte_rdtsc_arch_hz(void) +{ + return 0; +} #endif static inline uint64_t