Message ID | fa0759b7c169962efcecc636118f3a34a8db56fd.1628137108.git.sthotton@marvell.com (mailing list archive) |
---|---|
State | Superseded, archived |
Delegated to: | Jerin Jacob |
Headers | show |
Series | event/cnxk: reduce max timer chunk pool cache size | expand |
Context | Check | Description |
---|---|---|
ci/iol-x86_64-unit-testing | success | Testing PASS |
ci/iol-x86_64-compile-testing | fail | Testing issues |
ci/iol-abi-testing | success | Testing PASS |
ci/iol-aarch64-compile-testing | success | Testing PASS |
ci/iol-mellanox-Performance | success | Performance Testing PASS |
ci/iol-aarch64-unit-testing | success | Testing PASS |
ci/iol-intel-Functional | success | Functional Testing PASS |
ci/iol-broadcom-Functional | success | Functional Testing PASS |
ci/iol-intel-Performance | success | Performance Testing PASS |
ci/iol-broadcom-Performance | success | Performance Testing PASS |
ci/intel-Testing | success | Testing PASS |
ci/Intel-compilation | success | Compilation OK |
ci/github-robot | success | github build: passed |
ci/checkpatch | warning | coding style issues |
diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c index 9d40e336d7..c3e9dc508c 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.c +++ b/drivers/event/cnxk/cnxk_tim_evdev.c @@ -27,8 +27,8 @@ cnxk_tim_chnk_pool_create(struct cnxk_tim_ring *tim_ring, snprintf(pool_name, sizeof(pool_name), "cnxk_tim_chunk_pool%d", tim_ring->ring_id); - if (cache_sz > RTE_MEMPOOL_CACHE_MAX_SIZE) - cache_sz = RTE_MEMPOOL_CACHE_MAX_SIZE; + if (cache_sz > CNXK_TIM_MAX_POOL_CACHE_SZ) + cache_sz = CNXK_TIM_MAX_POOL_CACHE_SZ; cache_sz = cache_sz != 0 ? cache_sz : 2; tim_ring->nb_chunks += (cache_sz * rte_lcore_count()); if (!tim_ring->disable_npa) { diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h index c369f6f472..9d95c45a7b 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.h +++ b/drivers/event/cnxk/cnxk_tim_evdev.h @@ -31,6 +31,7 @@ #define CNXK_TIM_NB_CHUNK_SLOTS(sz) (((sz) / CNXK_TIM_CHUNK_ALIGNMENT) - 1) #define CNXK_TIM_MIN_CHUNK_SLOTS (0x1) #define CNXK_TIM_MAX_CHUNK_SLOTS (0x1FFE) +#define CNXK_TIM_MAX_POOL_CACHE_SZ (128) #define CN9K_TIM_MIN_TMO_TKS (256)
Reduced max chunk pool cache size from RTE_MEMPOOL_CACHE_MAX_SIZE(512) to 128. If chunk pool cache is empty, it gets filled during arm. Filling 512 entries at a time will fail arm if timeout is shorter. Fixes: 0e792433d051 ("event/cnxk: create and free timer adapter") Signed-off-by: Shijith Thotton <sthotton@marvell.com> --- drivers/event/cnxk/cnxk_tim_evdev.c | 4 ++-- drivers/event/cnxk/cnxk_tim_evdev.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-)