[v2] drivers: remove support to limit XAQ in cnxk event driver
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Commit Message
Removed support to limit XAQ from devargs. If XAQ is limited, new add
works could run out of XAQ entries and disable the queue.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
---
v2:
* Removed used function parameter.
doc/guides/eventdevs/cnxk.rst | 5 ++---
drivers/common/cnxk/roc_mbox.h | 2 +-
drivers/common/cnxk/roc_sso.c | 4 +---
drivers/common/cnxk/roc_sso.h | 2 +-
drivers/event/cnxk/cnxk_eventdev.c | 11 ++++-------
drivers/event/cnxk/cnxk_eventdev.h | 1 -
6 files changed, 9 insertions(+), 16 deletions(-)
Comments
On Tue, Sep 20, 2022 at 12:33 PM Shijith Thotton <sthotton@marvell.com> wrote:
>
> Removed support to limit XAQ from devargs. If XAQ is limited, new add
> works could run out of XAQ entries and disable the queue.
>
> Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Updated the git commit as follows and applied to
dpdk-next-net-eventdev/for-main. Thanks
commit cd3183a459522daa7d978c5db5576b04e956bbcf
Author: Shijith Thotton <sthotton@marvell.com>
Date: Tue Sep 20 12:33:39 2022 +0530
drivers: remove option to limit XAQ in cnxk event driver
Removed support to limit XAQ from devargs. If XAQ is limited, new add
works could run out of XAQ entries and disable the queue.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
> ---
> v2:
> * Removed used function parameter.
>
> doc/guides/eventdevs/cnxk.rst | 5 ++---
> drivers/common/cnxk/roc_mbox.h | 2 +-
> drivers/common/cnxk/roc_sso.c | 4 +---
> drivers/common/cnxk/roc_sso.h | 2 +-
> drivers/event/cnxk/cnxk_eventdev.c | 11 ++++-------
> drivers/event/cnxk/cnxk_eventdev.h | 1 -
> 6 files changed, 9 insertions(+), 16 deletions(-)
>
> diff --git a/doc/guides/eventdevs/cnxk.rst b/doc/guides/eventdevs/cnxk.rst
> index 8537f6257e..3baf26fb54 100644
> --- a/doc/guides/eventdevs/cnxk.rst
> +++ b/doc/guides/eventdevs/cnxk.rst
> @@ -95,12 +95,11 @@ Runtime Config Options
> We can control the QoS of SSO GGRP by modifying the above mentioned
> thresholds. GGRPs that have higher importance can be assigned higher
> thresholds than the rest. The dictionary format is as follows
> - [Qx-XAQ-TAQ-IAQ][Qz-XAQ-TAQ-IAQ] expressed in percentages, 0 represents
> - default.
> + [Qx-TAQ-IAQ][Qz-TAQ-IAQ] expressed in percentages, 0 represents default.
>
> For example::
>
> - -a 0002:0e:00.0,qos=[1-50-50-50]
> + -a 0002:0e:00.0,qos=[1-50-50]
>
> - ``Force Rx Back pressure``
>
> diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
> index 965c704322..d07c8be9d9 100644
> --- a/drivers/common/cnxk/roc_mbox.h
> +++ b/drivers/common/cnxk/roc_mbox.h
> @@ -1330,7 +1330,7 @@ struct sso_grp_priority {
> struct sso_grp_qos_cfg {
> struct mbox_msghdr hdr;
> uint16_t __io grp;
> - uint32_t __io xaq_limit;
> + uint32_t __io rsvd;
> uint16_t __io taq_thr;
> uint16_t __io iaq_thr;
> };
> diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c
> index 126a9cba99..9d5efe848e 100644
> --- a/drivers/common/cnxk/roc_sso.c
> +++ b/drivers/common/cnxk/roc_sso.c
> @@ -377,7 +377,7 @@ roc_sso_hwgrp_hws_link_status(struct roc_sso *roc_sso, uint8_t hws,
>
> int
> roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso, struct roc_sso_hwgrp_qos *qos,
> - uint8_t nb_qos, uint32_t nb_xaq)
> + uint8_t nb_qos)
> {
> struct sso *sso = roc_sso_to_sso_priv(roc_sso);
> struct dev *dev = &sso->dev;
> @@ -386,7 +386,6 @@ roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso, struct roc_sso_hwgrp_qos *qos,
>
> plt_spinlock_lock(&sso->mbox_lock);
> for (i = 0; i < nb_qos; i++) {
> - uint8_t xaq_prcnt = qos[i].xaq_prcnt;
> uint8_t iaq_prcnt = qos[i].iaq_prcnt;
> uint8_t taq_prcnt = qos[i].taq_prcnt;
>
> @@ -405,7 +404,6 @@ roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso, struct roc_sso_hwgrp_qos *qos,
> }
> }
> req->grp = qos[i].hwgrp;
> - req->xaq_limit = (nb_xaq * (xaq_prcnt ? xaq_prcnt : 100)) / 100;
> req->iaq_thr = (SSO_HWGRP_IAQ_MAX_THR_MASK *
> (iaq_prcnt ? iaq_prcnt : 100)) /
> 100;
> diff --git a/drivers/common/cnxk/roc_sso.h b/drivers/common/cnxk/roc_sso.h
> index ab7cee1c60..5075991ef7 100644
> --- a/drivers/common/cnxk/roc_sso.h
> +++ b/drivers/common/cnxk/roc_sso.h
> @@ -89,7 +89,7 @@ int __roc_api roc_sso_rsrc_init(struct roc_sso *roc_sso, uint8_t nb_hws,
> void __roc_api roc_sso_rsrc_fini(struct roc_sso *roc_sso);
> int __roc_api roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso,
> struct roc_sso_hwgrp_qos *qos,
> - uint8_t nb_qos, uint32_t nb_xaq);
> + uint8_t nb_qos);
> int __roc_api roc_sso_hwgrp_alloc_xaq(struct roc_sso *roc_sso,
> uint32_t npa_aura_id, uint16_t hwgrps);
> int __roc_api roc_sso_hwgrp_release_xaq(struct roc_sso *roc_sso,
> diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c
> index 8923e94824..db62d32a81 100644
> --- a/drivers/event/cnxk/cnxk_eventdev.c
> +++ b/drivers/event/cnxk/cnxk_eventdev.c
> @@ -400,10 +400,8 @@ cnxk_sso_start(struct rte_eventdev *event_dev, cnxk_sso_hws_reset_t reset_fn,
> qos[i].hwgrp = dev->qos_parse_data[i].queue;
> qos[i].iaq_prcnt = dev->qos_parse_data[i].iaq_prcnt;
> qos[i].taq_prcnt = dev->qos_parse_data[i].taq_prcnt;
> - qos[i].xaq_prcnt = dev->qos_parse_data[i].xaq_prcnt;
> }
> - rc = roc_sso_hwgrp_qos_config(&dev->sso, qos, dev->qos_queue_cnt,
> - dev->xae_cnt);
> + rc = roc_sso_hwgrp_qos_config(&dev->sso, qos, dev->qos_queue_cnt);
> if (rc < 0) {
> plt_sso_dbg("failed to configure HWGRP QoS rc = %d", rc);
> return -EINVAL;
> @@ -477,7 +475,7 @@ parse_queue_param(char *value, void *opaque)
> }
>
> if (val != (&queue_qos.iaq_prcnt + 1)) {
> - plt_err("Invalid QoS parameter expected [Qx-XAQ-TAQ-IAQ]");
> + plt_err("Invalid QoS parameter expected [Qx-TAQ-IAQ]");
> return;
> }
>
> @@ -525,9 +523,8 @@ parse_sso_kvargs_dict(const char *key, const char *value, void *opaque)
> {
> RTE_SET_USED(key);
>
> - /* Dict format [Qx-XAQ-TAQ-IAQ][Qz-XAQ-TAQ-IAQ] use '-' cause ','
> - * isn't allowed. Everything is expressed in percentages, 0 represents
> - * default.
> + /* Dict format [Qx-TAQ-IAQ][Qz-TAQ-IAQ] use '-' cause ',' isn't allowed.
> + * Everything is expressed in percentages, 0 represents default.
> */
> parse_qos_list(value, opaque);
>
> diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h
> index e8129bf774..3a8de0bac0 100644
> --- a/drivers/event/cnxk/cnxk_eventdev.h
> +++ b/drivers/event/cnxk/cnxk_eventdev.h
> @@ -83,7 +83,6 @@ typedef int (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,
>
> struct cnxk_sso_qos {
> uint16_t queue;
> - uint16_t xaq_prcnt;
> uint16_t taq_prcnt;
> uint16_t iaq_prcnt;
> };
> --
> 2.25.1
>
@@ -95,12 +95,11 @@ Runtime Config Options
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest. The dictionary format is as follows
- [Qx-XAQ-TAQ-IAQ][Qz-XAQ-TAQ-IAQ] expressed in percentages, 0 represents
- default.
+ [Qx-TAQ-IAQ][Qz-TAQ-IAQ] expressed in percentages, 0 represents default.
For example::
- -a 0002:0e:00.0,qos=[1-50-50-50]
+ -a 0002:0e:00.0,qos=[1-50-50]
- ``Force Rx Back pressure``
@@ -1330,7 +1330,7 @@ struct sso_grp_priority {
struct sso_grp_qos_cfg {
struct mbox_msghdr hdr;
uint16_t __io grp;
- uint32_t __io xaq_limit;
+ uint32_t __io rsvd;
uint16_t __io taq_thr;
uint16_t __io iaq_thr;
};
@@ -377,7 +377,7 @@ roc_sso_hwgrp_hws_link_status(struct roc_sso *roc_sso, uint8_t hws,
int
roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso, struct roc_sso_hwgrp_qos *qos,
- uint8_t nb_qos, uint32_t nb_xaq)
+ uint8_t nb_qos)
{
struct sso *sso = roc_sso_to_sso_priv(roc_sso);
struct dev *dev = &sso->dev;
@@ -386,7 +386,6 @@ roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso, struct roc_sso_hwgrp_qos *qos,
plt_spinlock_lock(&sso->mbox_lock);
for (i = 0; i < nb_qos; i++) {
- uint8_t xaq_prcnt = qos[i].xaq_prcnt;
uint8_t iaq_prcnt = qos[i].iaq_prcnt;
uint8_t taq_prcnt = qos[i].taq_prcnt;
@@ -405,7 +404,6 @@ roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso, struct roc_sso_hwgrp_qos *qos,
}
}
req->grp = qos[i].hwgrp;
- req->xaq_limit = (nb_xaq * (xaq_prcnt ? xaq_prcnt : 100)) / 100;
req->iaq_thr = (SSO_HWGRP_IAQ_MAX_THR_MASK *
(iaq_prcnt ? iaq_prcnt : 100)) /
100;
@@ -89,7 +89,7 @@ int __roc_api roc_sso_rsrc_init(struct roc_sso *roc_sso, uint8_t nb_hws,
void __roc_api roc_sso_rsrc_fini(struct roc_sso *roc_sso);
int __roc_api roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso,
struct roc_sso_hwgrp_qos *qos,
- uint8_t nb_qos, uint32_t nb_xaq);
+ uint8_t nb_qos);
int __roc_api roc_sso_hwgrp_alloc_xaq(struct roc_sso *roc_sso,
uint32_t npa_aura_id, uint16_t hwgrps);
int __roc_api roc_sso_hwgrp_release_xaq(struct roc_sso *roc_sso,
@@ -400,10 +400,8 @@ cnxk_sso_start(struct rte_eventdev *event_dev, cnxk_sso_hws_reset_t reset_fn,
qos[i].hwgrp = dev->qos_parse_data[i].queue;
qos[i].iaq_prcnt = dev->qos_parse_data[i].iaq_prcnt;
qos[i].taq_prcnt = dev->qos_parse_data[i].taq_prcnt;
- qos[i].xaq_prcnt = dev->qos_parse_data[i].xaq_prcnt;
}
- rc = roc_sso_hwgrp_qos_config(&dev->sso, qos, dev->qos_queue_cnt,
- dev->xae_cnt);
+ rc = roc_sso_hwgrp_qos_config(&dev->sso, qos, dev->qos_queue_cnt);
if (rc < 0) {
plt_sso_dbg("failed to configure HWGRP QoS rc = %d", rc);
return -EINVAL;
@@ -477,7 +475,7 @@ parse_queue_param(char *value, void *opaque)
}
if (val != (&queue_qos.iaq_prcnt + 1)) {
- plt_err("Invalid QoS parameter expected [Qx-XAQ-TAQ-IAQ]");
+ plt_err("Invalid QoS parameter expected [Qx-TAQ-IAQ]");
return;
}
@@ -525,9 +523,8 @@ parse_sso_kvargs_dict(const char *key, const char *value, void *opaque)
{
RTE_SET_USED(key);
- /* Dict format [Qx-XAQ-TAQ-IAQ][Qz-XAQ-TAQ-IAQ] use '-' cause ','
- * isn't allowed. Everything is expressed in percentages, 0 represents
- * default.
+ /* Dict format [Qx-TAQ-IAQ][Qz-TAQ-IAQ] use '-' cause ',' isn't allowed.
+ * Everything is expressed in percentages, 0 represents default.
*/
parse_qos_list(value, opaque);
@@ -83,7 +83,6 @@ typedef int (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,
struct cnxk_sso_qos {
uint16_t queue;
- uint16_t xaq_prcnt;
uint16_t taq_prcnt;
uint16_t iaq_prcnt;
};