From patchwork Fri Jul 17 14:28:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Slava Ovsiienko X-Patchwork-Id: 74394 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0C115A053B; Fri, 17 Jul 2020 16:28:32 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AC7301BF71; Fri, 17 Jul 2020 16:28:30 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 4C4CE1BF60 for ; Fri, 17 Jul 2020 16:28:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@mellanox.com) with SMTP; 17 Jul 2020 17:28:28 +0300 Received: from pegasus12.mtr.labs.mlnx (pegasus12.mtr.labs.mlnx [10.210.17.40]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 06HESS1Z000784; Fri, 17 Jul 2020 17:28:28 +0300 Received: from pegasus12.mtr.labs.mlnx (localhost [127.0.0.1]) by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 06HESS5V000410; Fri, 17 Jul 2020 14:28:28 GMT Received: (from viacheslavo@localhost) by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 06HESRUo000409; Fri, 17 Jul 2020 14:28:27 GMT X-Authentication-Warning: pegasus12.mtr.labs.mlnx: viacheslavo set sender to viacheslavo@mellanox.com using -f From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: matan@mellanox.com, rasland@mellanox.com, thomas@monjalon.net Date: Fri, 17 Jul 2020 14:28:22 +0000 Message-Id: <1594996104-372-1-git-send-email-viacheslavo@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1591771085-24959-1-git-send-email-viacheslavo@mellanox.com> References: <1591771085-24959-1-git-send-email-viacheslavo@mellanox.com> Subject: [dpdk-dev] [PATCH 1/3] net/mlx5: fix compilation issue with missing DevX event X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" If there is no support for DevX event the mlx5_txpp_gather_timestamp() is reported as "not used" causing the compilation warning/error. This patch moves the routine to the conditional block. Fixes: 244788055199 ("net/mlx5: introduce clock queue service routine") Signed-off-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_txpp.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c index 15c9a8e..42776b8 100644 --- a/drivers/net/mlx5/mlx5_txpp.c +++ b/drivers/net/mlx5/mlx5_txpp.c @@ -719,21 +719,6 @@ mlx5_txpp_cache_timestamp(sh, ts, wq->cq_ci); } -/* Gather statistics for timestamp from Clock Queue CQE. */ -static inline void -mlx5_txpp_gather_timestamp(struct mlx5_dev_ctx_shared *sh) -{ - /* Check whether we have a valid timestamp. */ - if (!sh->txpp.clock_queue.sq_ci && !sh->txpp.ts_n) - return; - MLX5_ASSERT(sh->txpp.ts_p < MLX5_TXPP_REARM_SQ_SIZE); - sh->txpp.tsa[sh->txpp.ts_p] = sh->txpp.ts; - if (++sh->txpp.ts_p >= MLX5_TXPP_REARM_SQ_SIZE) - sh->txpp.ts_p = 0; - if (sh->txpp.ts_n < MLX5_TXPP_REARM_SQ_SIZE) - ++sh->txpp.ts_n; -} - /* Waits for the first completion on Clock Queue to init timestamp. */ static inline void mlx5_txpp_init_timestamp(struct mlx5_dev_ctx_shared *sh) @@ -759,6 +744,21 @@ } #ifdef HAVE_IBV_DEVX_EVENT +/* Gather statistics for timestamp from Clock Queue CQE. */ +static inline void +mlx5_txpp_gather_timestamp(struct mlx5_dev_ctx_shared *sh) +{ + /* Check whether we have a valid timestamp. */ + if (!sh->txpp.clock_queue.sq_ci && !sh->txpp.ts_n) + return; + MLX5_ASSERT(sh->txpp.ts_p < MLX5_TXPP_REARM_SQ_SIZE); + sh->txpp.tsa[sh->txpp.ts_p] = sh->txpp.ts; + if (++sh->txpp.ts_p >= MLX5_TXPP_REARM_SQ_SIZE) + sh->txpp.ts_p = 0; + if (sh->txpp.ts_n < MLX5_TXPP_REARM_SQ_SIZE) + ++sh->txpp.ts_n; +} + /* Handles Rearm Queue completions in periodic service. */ static __rte_always_inline void mlx5_txpp_handle_rearm_queue(struct mlx5_dev_ctx_shared *sh) From patchwork Fri Jul 17 14:28:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Slava Ovsiienko X-Patchwork-Id: 74396 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 05D08A053B; Fri, 17 Jul 2020 16:28:52 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A4D8C1BF8D; Fri, 17 Jul 2020 16:28:36 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 2C8E91BF5F for ; Fri, 17 Jul 2020 16:28:34 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@mellanox.com) with SMTP; 17 Jul 2020 17:28:30 +0300 Received: from pegasus12.mtr.labs.mlnx (pegasus12.mtr.labs.mlnx [10.210.17.40]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 06HESU4g000791; Fri, 17 Jul 2020 17:28:30 +0300 Received: from pegasus12.mtr.labs.mlnx (localhost [127.0.0.1]) by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 06HESUoT000413; Fri, 17 Jul 2020 14:28:30 GMT Received: (from viacheslavo@localhost) by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 06HESUwn000412; Fri, 17 Jul 2020 14:28:30 GMT X-Authentication-Warning: pegasus12.mtr.labs.mlnx: viacheslavo set sender to viacheslavo@mellanox.com using -f From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: matan@mellanox.com, rasland@mellanox.com, thomas@monjalon.net Date: Fri, 17 Jul 2020 14:28:23 +0000 Message-Id: <1594996104-372-2-git-send-email-viacheslavo@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1594996104-372-1-git-send-email-viacheslavo@mellanox.com> References: <1591771085-24959-1-git-send-email-viacheslavo@mellanox.com> <1594996104-372-1-git-send-email-viacheslavo@mellanox.com> Subject: [dpdk-dev] [PATCH 2/3] net/mlx5: fix compilation issue with atomic128 exchange X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" For naw the rte_atomic128_cmp_exchange() is available on x86-64 and ARM64 architectures. The patch fixes the compilation condition for the code using this atomic transaction. Fixes: 244788055199 ("net/mlx5: introduce clock queue service routine") Signed-off-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_txpp.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c index 42776b8..cdb0079 100644 --- a/drivers/net/mlx5/mlx5_txpp.c +++ b/drivers/net/mlx5/mlx5_txpp.c @@ -644,7 +644,15 @@ * update by hardware with soecified rate. We have to * read timestump and WQE completion index atomically. */ -#if defined(RTE_ARCH_PPC_64) || defined(RTE_ARCH_32) +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_ARM64) + rte_int128_t src; + + memset(&src, 0, sizeof(src)); + *ts = src; + /* if (*from == *ts) *from = *src else *ts = *from; */ + rte_atomic128_cmp_exchange(from, ts, &src, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED); +#else rte_atomic64_t *cqe = (rte_atomic64_t *)from; /* Power architecture does not support 16B compare-and-swap. */ @@ -665,14 +673,6 @@ ps[1] = op; return; } -#else - rte_int128_t src; - - memset(&src, 0, sizeof(src)); - *ts = src; - /* if (*from == *ts) *from = *src else *ts = *from; */ - rte_atomic128_cmp_exchange(from, ts, &src, 0, - __ATOMIC_RELAXED, __ATOMIC_RELAXED); #endif } From patchwork Fri Jul 17 14:28:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Slava Ovsiienko X-Patchwork-Id: 74395 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8FF6AA053B; Fri, 17 Jul 2020 16:28:42 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8499B1BF5F; Fri, 17 Jul 2020 16:28:35 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 24C721BF44 for ; Fri, 17 Jul 2020 16:28:34 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@mellanox.com) with SMTP; 17 Jul 2020 17:28:32 +0300 Received: from pegasus12.mtr.labs.mlnx (pegasus12.mtr.labs.mlnx [10.210.17.40]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 06HESW2L000798; Fri, 17 Jul 2020 17:28:32 +0300 Received: from pegasus12.mtr.labs.mlnx (localhost [127.0.0.1]) by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 06HESWJd000415; Fri, 17 Jul 2020 14:28:32 GMT Received: (from viacheslavo@localhost) by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 06HESWJD000414; Fri, 17 Jul 2020 14:28:32 GMT X-Authentication-Warning: pegasus12.mtr.labs.mlnx: viacheslavo set sender to viacheslavo@mellanox.com using -f From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: matan@mellanox.com, rasland@mellanox.com, thomas@monjalon.net Date: Fri, 17 Jul 2020 14:28:24 +0000 Message-Id: <1594996104-372-3-git-send-email-viacheslavo@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1594996104-372-1-git-send-email-viacheslavo@mellanox.com> References: <1591771085-24959-1-git-send-email-viacheslavo@mellanox.com> <1594996104-372-1-git-send-email-viacheslavo@mellanox.com> Subject: [dpdk-dev] [PATCH 3/3] common/mlx5: fix DevX register access opcode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The dedicated MLX5_CMD_OP_ACCESS_REGISTER_USER opcode must be used to read hardware register content from unprotected mode. Fixes: 737f44a25d97 ("common/mlx5: add register access DevX routine") Signed-off-by: Viacheslav Ovsiienko --- drivers/common/mlx5/mlx5_devx_cmds.c | 3 ++- drivers/common/mlx5/mlx5_prm.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index 0cfa4dc..9f2f706 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -44,7 +44,8 @@ DRV_LOG(ERR, "Not enough buffer for register read data"); return -1; } - MLX5_SET(access_register_in, in, opcode, MLX5_CMD_OP_ACCESS_REGISTER); + MLX5_SET(access_register_in, in, opcode, + MLX5_CMD_OP_ACCESS_REGISTER_USER); MLX5_SET(access_register_in, in, op_mod, MLX5_ACCESS_REGISTER_IN_OP_MOD_READ); MLX5_SET(access_register_in, in, register_id, reg_id); diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index ec3b600..aba0368 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -806,6 +806,7 @@ enum { MLX5_CMD_OP_CREATE_GENERAL_OBJECT = 0xa00, MLX5_CMD_OP_MODIFY_GENERAL_OBJECT = 0xa01, MLX5_CMD_OP_QUERY_GENERAL_OBJECT = 0xa02, + MLX5_CMD_OP_ACCESS_REGISTER_USER = 0xB0C, }; enum {