From patchwork Wed Oct 21 11:37:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 81698 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 320D2A04DF; Wed, 21 Oct 2020 13:37:58 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0AF16ACC2; Wed, 21 Oct 2020 13:37:57 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id C33C0ACAB for ; Wed, 21 Oct 2020 13:37:55 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id CE408B6B4C; Wed, 21 Oct 2020 13:37:52 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OwmgMxJmosUs; Wed, 21 Oct 2020 13:37:50 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 099FBB5259; Wed, 21 Oct 2020 13:37:49 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Wed, 21 Oct 2020 13:37:36 +0200 Message-Id: <1603280261-20206-2-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> References: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v3 1/6] build: rename default Arm build to generic-armv8 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The current machine='default' build name is not descriptive. The actual default build is machine='native'. Add an alternative string which does the same build and better describes what we're building: machine='generic-armv8'. Leave machine='default' for backwards compatibility. Signed-off-by: Juraj Linkeš --- config/arm/meson.build | 31 ++++++++++++++++--------------- config/meson.build | 3 --- 2 files changed, 16 insertions(+), 18 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index b49203fa8..c88e34a2b 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -1,12 +1,13 @@ # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2017 Intel Corporation. # Copyright(c) 2017 Cavium, Inc +# Copyright(c) 2020 PANTHEON.tech s.r.o. # for checking defines we need to use the correct compiler flags march_opt = '-march=@0@'.format(machine) arm_force_native_march = false -arm_force_default_march = (machine == 'default') +arm_force_generic_march = (machine == 'default' or machine == 'generic-armv8') flags_common_default = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -87,7 +88,7 @@ flags_octeontx2_extra = [ ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true]] -machine_args_generic = [ +machine_args_default = [ ['default', ['-march=armv8-a+crc', '-moutline-atomics']], ['native', ['-march=native']], ['0xd03', ['-mcpu=cortex-a53']], @@ -113,20 +114,20 @@ machine_args_emag = [ ['native', ['-march=native']]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) -impl_generic = ['Generic armv8', flags_generic, machine_args_generic] -impl_0x41 = ['Arm', flags_arm, machine_args_generic] -impl_0x42 = ['Broadcom', flags_generic, machine_args_generic] +impl_generic = ['Generic armv8', flags_generic, machine_args_default] +impl_0x41 = ['Arm', flags_arm, machine_args_default] +impl_0x42 = ['Broadcom', flags_generic, machine_args_default] impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium] -impl_0x44 = ['DEC', flags_generic, machine_args_generic] -impl_0x49 = ['Infineon', flags_generic, machine_args_generic] -impl_0x4d = ['Motorola', flags_generic, machine_args_generic] -impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic] +impl_0x44 = ['DEC', flags_generic, machine_args_default] +impl_0x49 = ['Infineon', flags_generic, machine_args_default] +impl_0x4d = ['Motorola', flags_generic, machine_args_default] +impl_0x4e = ['NVIDIA', flags_generic, machine_args_default] impl_0x50 = ['Ampere Computing', flags_emag, machine_args_emag] -impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic] -impl_0x53 = ['Samsung', flags_generic, machine_args_generic] -impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_generic] -impl_0x69 = ['Intel', flags_generic, machine_args_generic] -impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic] +impl_0x51 = ['Qualcomm', flags_generic, machine_args_default] +impl_0x53 = ['Samsung', flags_generic, machine_args_default] +impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_default] +impl_0x69 = ['Intel', flags_generic, machine_args_default] +impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_default] dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) @@ -145,7 +146,7 @@ else cmd_generic = ['generic', '', '', 'default', ''] cmd_output = cmd_generic # Set generic by default machine_args = [] # Clear previous machine args - if arm_force_default_march and not meson.is_cross_build() + if arm_force_generic_march and not meson.is_cross_build() machine = impl_generic impl_pn = 'default' elif not meson.is_cross_build() diff --git a/config/meson.build b/config/meson.build index 258b01d06..a57c8ae9e 100644 --- a/config/meson.build +++ b/config/meson.build @@ -80,9 +80,6 @@ if machine == 'default' machine = 'corei7' elif host_machine.cpu_family().startswith('arm') machine = 'armv7-a' - elif host_machine.cpu_family().startswith('aarch') - # arm64 manages defaults in config/arm/meson.build - machine = 'default' elif host_machine.cpu_family().startswith('ppc') machine = 'power8' endif From patchwork Wed Oct 21 11:37:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 81701 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1D842A04DF; Wed, 21 Oct 2020 13:38:59 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9ECBFAD19; Wed, 21 Oct 2020 13:38:08 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 5711BACEB for ; Wed, 21 Oct 2020 13:37:58 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 36477B6B4D; Wed, 21 Oct 2020 13:37:56 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id W6b73bB5ZfTx; Wed, 21 Oct 2020 13:37:53 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 994EAB6A8F; Wed, 21 Oct 2020 13:37:50 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Wed, 21 Oct 2020 13:37:37 +0200 Message-Id: <1603280261-20206-3-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> References: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v3 2/6] build: refactor Arm build X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" * Rename variables to have names that better describe what the variables store * Remove unused or superfluous variables * Change a list to dictionary where key lookup is needed * Add informatory comments in the code * Minor code restructure and reformatting Signed-off-by: Juraj Linkeš --- config/arm/arm64_armada_linux_gcc | 2 +- config/arm/arm64_armv8_linux_gcc | 8 +- config/arm/arm64_bluefield_linux_gcc | 4 +- config/arm/arm64_dpaa_linux_gcc | 2 +- config/arm/arm64_emag_linux_gcc | 2 +- config/arm/arm64_n1sdp_linux_gcc | 4 +- config/arm/arm64_octeontx2_linux_gcc | 4 +- config/arm/arm64_stingray_linux_gcc | 4 +- config/arm/arm64_thunderx2_linux_gcc | 4 +- config/arm/arm64_thunderx_linux_gcc | 2 +- config/arm/meson.build | 247 +++++++++++++++------------ 11 files changed, 153 insertions(+), 130 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index fa40c0398..52c5f4476 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -14,4 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x56' +implementer_id = '0x56' diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 88f0ff9da..13ee8b223 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -13,10 +13,10 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = 'generic' +implementer_id = 'generic' -# Valid options for Arm's implementor_pn: -# 'default': valid for all armv8-a architectures (default value) +# Valid options for Arm's part_number: +# 'generic': valid for all armv8-a architectures (default value) # '0xd03': cortex-a53 # '0xd04': cortex-a35 # '0xd05': cortex-a55 @@ -25,4 +25,4 @@ implementor_id = 'generic' # '0xd09': cortex-a73 # '0xd0a': cortex-a75 # '0xd0b': cortex-a76 -implementor_pn = 'default' +part_number = 'generic' diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 86797d23c..b79389d85 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd08' +implementer_id = '0x41' +part_number = '0xd08' diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 1a4682154..573ae7e42 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -14,4 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = 'dpaa' +implementer_id = 'dpaa' diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 8edcd3e97..24f3d533e 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -13,4 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x50' +implementer_id = '0x50' diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 022e06303..6fb3f02ea 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd0c' +implementer_id = '0x41' +part_number = '0xd0c' diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 365bd7cbd..ac1042806 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' -implementor_pn = '0xb2' +implementer_id = '0x43' +part_number = '0xb2' diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 86797d23c..b79389d85 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd08' +implementer_id = '0x41' +part_number = '0xd08' diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index 2b41acc61..dd257745e 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' -implementor_pn = '0xaf' +implementer_id = '0x43' +part_number = '0xaf' diff --git a/config/arm/arm64_thunderx_linux_gcc b/config/arm/arm64_thunderx_linux_gcc index 6572ab615..670764437 100644 --- a/config/arm/arm64_thunderx_linux_gcc +++ b/config/arm/arm64_thunderx_linux_gcc @@ -13,4 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' +implementer_id = '0x43' diff --git a/config/arm/meson.build b/config/arm/meson.build index c88e34a2b..66b08bfb5 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -3,12 +3,12 @@ # Copyright(c) 2017 Cavium, Inc # Copyright(c) 2020 PANTHEON.tech s.r.o. -# for checking defines we need to use the correct compiler flags -march_opt = '-march=@0@'.format(machine) - +# set arm_force_native_march if you want to use machine args below +# instead of discovered values; only works when doing an actual native build arm_force_native_march = false -arm_force_generic_march = (machine == 'default' or machine == 'generic-armv8') +native_machine_args = ['-march=native', '-mtune=native'] +# common flags to all aarch64 builds, with lowest priority flags_common_default = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) # to determine the best threshold in code. Refer to notes in source file @@ -16,8 +16,9 @@ flags_common_default = [ ['RTE_ARCH_ARM64_MEMCPY', false], # ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048], # ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512], - # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're - # strong reasons. + + # Leave below RTE_ARM64_MEMCPY_xxx options commented out, + # unless there are strong reasons. # ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false], # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], @@ -28,184 +29,206 @@ flags_common_default = [ ['RTE_SCHED_VECTOR', false], ['RTE_ARM_USE_WFE', false], + ['RTE_CACHE_LINE_SIZE', 128], + ['RTE_ARCH_ARM64', true] ] +# implementer specific aarch64 flags, with middle priority +# (will overwrite common flags) flags_generic = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 128]] + ['RTE_CACHE_LINE_SIZE', 128] +] flags_arm = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_MAX_LCORE', 16], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64]] + ['RTE_CACHE_LINE_SIZE', 64] +] flags_cavium = [ ['RTE_CACHE_LINE_SIZE', 128], ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 96], - ['RTE_MAX_VFIO_GROUPS', 128]] + ['RTE_MAX_VFIO_GROUPS', 128] +] flags_dpaa = [ ['RTE_MACHINE', '"dpaa"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16], - ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]] + ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false] +] flags_emag = [ ['RTE_MACHINE', '"emag"'], - ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 32]] + ['RTE_MAX_LCORE', 32], + ['RTE_CACHE_LINE_SIZE', 64] +] flags_armada = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 16]] + ['RTE_MAX_LCORE', 16], + ['RTE_CACHE_LINE_SIZE', 64] +] -flags_default_extra = [] +# part number specific aarch64 flags, with highest priority +# (will overwrite both common and implementer specific flags) flags_n1sdp_extra = [ ['RTE_MACHINE', '"n1sdp"'], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 4], ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], - ['RTE_LIBRTE_VHOST_NUMA', false]] + ['RTE_LIBRTE_VHOST_NUMA', false] +] flags_thunderx_extra = [ ['RTE_MACHINE', '"thunderx"'], - ['RTE_USE_C11_MEM_MODEL', false]] + ['RTE_USE_C11_MEM_MODEL', false] +] flags_thunderx2_extra = [ ['RTE_MACHINE', '"thunderx2"'], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 256], ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_USE_C11_MEM_MODEL', true]] + ['RTE_USE_C11_MEM_MODEL', true] +] flags_octeontx2_extra = [ ['RTE_MACHINE', '"octeontx2"'], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 36], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_EAL_IGB_UIO', false], - ['RTE_USE_C11_MEM_MODEL', true]] - -machine_args_default = [ - ['default', ['-march=armv8-a+crc', '-moutline-atomics']], - ['native', ['-march=native']], - ['0xd03', ['-mcpu=cortex-a53']], - ['0xd04', ['-mcpu=cortex-a35']], - ['0xd07', ['-mcpu=cortex-a57']], - ['0xd08', ['-mcpu=cortex-a72']], - ['0xd09', ['-mcpu=cortex-a73']], - ['0xd0a', ['-mcpu=cortex-a75']], - ['0xd0b', ['-mcpu=cortex-a76']], - ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'], flags_n1sdp_extra]] - -machine_args_cavium = [ - ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], - ['native', ['-march=native']], - ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra], - ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], - ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], - ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_thunderx2_extra], - ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_octeontx2_extra]] - -machine_args_emag = [ - ['default', ['-march=armv8-a+crc+crypto', '-mtune=emag']], - ['native', ['-march=native']]] + ['RTE_USE_C11_MEM_MODEL', true] +] +# arm config (implementer 0x41) is the default config +pn_config_default = { + 'generic': [['-march=armv8-a+crc', '-moutline-atomics']], + '0xd03': [['-mcpu=cortex-a53']], + '0xd04': [['-mcpu=cortex-a35']], + '0xd07': [['-mcpu=cortex-a57']], + '0xd08': [['-mcpu=cortex-a72']], + '0xd09': [['-mcpu=cortex-a73']], + '0xd0a': [['-mcpu=cortex-a75']], + '0xd0b': [['-mcpu=cortex-a76']], + '0xd0c': [['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'], flags_n1sdp_extra] +} +pn_config_cavium = { + 'generic': [['-march=armv8-a+crc+crypto', '-mcpu=thunderx']], + '0xa1': [['-mcpu=thunderxt88'], flags_thunderx_extra], + '0xa2': [['-mcpu=thunderxt81'], flags_thunderx_extra], + '0xa3': [['-mcpu=thunderxt83'], flags_thunderx_extra], + '0xaf': [['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_thunderx2_extra], + '0xb2': [['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_octeontx2_extra], +} +pn_config_emag = { + 'generic': [['-march=armv8-a+crc+crypto', '-mtune=emag']] +} ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) -impl_generic = ['Generic armv8', flags_generic, machine_args_default] -impl_0x41 = ['Arm', flags_arm, machine_args_default] -impl_0x42 = ['Broadcom', flags_generic, machine_args_default] -impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium] -impl_0x44 = ['DEC', flags_generic, machine_args_default] -impl_0x49 = ['Infineon', flags_generic, machine_args_default] -impl_0x4d = ['Motorola', flags_generic, machine_args_default] -impl_0x4e = ['NVIDIA', flags_generic, machine_args_default] -impl_0x50 = ['Ampere Computing', flags_emag, machine_args_emag] -impl_0x51 = ['Qualcomm', flags_generic, machine_args_default] -impl_0x53 = ['Samsung', flags_generic, machine_args_default] -impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_default] -impl_0x69 = ['Intel', flags_generic, machine_args_default] -impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_default] +impl_generic = ['Generic armv8', flags_generic, pn_config_default] +impl_0x41 = ['Arm', flags_arm, pn_config_default] +impl_0x42 = ['Broadcom', flags_generic, pn_config_default] +impl_0x43 = ['Cavium', flags_cavium, pn_config_cavium] +impl_0x44 = ['DEC', flags_generic, pn_config_default] +impl_0x49 = ['Infineon', flags_generic, pn_config_default] +impl_0x4d = ['Motorola', flags_generic, pn_config_default] +impl_0x4e = ['NVIDIA', flags_generic, pn_config_default] +impl_0x50 = ['Ampere Computing', flags_emag, pn_config_emag] +impl_0x51 = ['Qualcomm', flags_generic, pn_config_default] +impl_0x53 = ['Samsung', flags_generic, pn_config_default] +impl_0x56 = ['Marvell ARMADA', flags_armada, pn_config_default] +impl_0x69 = ['Intel', flags_generic, pn_config_default] +impl_dpaa = ['NXP DPAA', flags_dpaa, pn_config_default] dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) if dpdk_conf.get('RTE_ARCH_32') + # armv7 build dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) dpdk_conf.set('RTE_ARCH_ARMv7', 1) # the minimum architecture supported, armv7-a, needs the following, # mk/machine/armv7a/rte.vars.mk sets it too machine_args += '-mfpu=neon' else - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) - dpdk_conf.set('RTE_ARCH_ARM64', 1) + # aarch64 build + if not meson.is_cross_build() + if machine == 'default' or machine == 'generic-armv8' + # default build + impl_config = impl_generic + part_number = 'generic' + else + # native build + # The script returns ['Implementer', 'Variant', 'Architecture', + # 'Primary Part number', 'Revision'] + detect_vendor = find_program(join_paths( + meson.current_source_dir(), 'armv8_machine.py')) + cmd = run_command(detect_vendor.path()) + if cmd.returncode() == 0 + cmd_output = cmd.stdout().to_lower().strip().split(' ') + endif + if arm_force_native_march == true + part_number = 'native' + else + part_number = cmd_output[3] + endif + # Set to generic implementer if implementer is not found + impl_config = get_variable('impl_' + cmd_output[0], 'impl_generic') + endif + else + # cross build + impl_id = meson.get_cross_property('implementer_id', 'generic') + part_number = meson.get_cross_property('part_number', 'generic') + impl_config = get_variable('impl_' + impl_id) + endif - machine = [] - cmd_generic = ['generic', '', '', 'default', ''] - cmd_output = cmd_generic # Set generic by default - machine_args = [] # Clear previous machine args - if arm_force_generic_march and not meson.is_cross_build() - machine = impl_generic - impl_pn = 'default' + message('Arm implementer: ' + impl_config[0]) + message('Arm part number: ' + part_number) + + implementer_flags = impl_config[1] + part_number_config = impl_config[2] + + if part_number_config.has_key(part_number) + # use the specified part_number machine args if found + part_number_config = part_number_config[part_number] + elif part_number == 'native' + # use native machine args + part_number_config = [[native_machine_args]] elif not meson.is_cross_build() - # The script returns ['Implementer', 'Variant', 'Architecture', - # 'Primary Part number', 'Revision'] - detect_vendor = find_program(join_paths( - meson.current_source_dir(), 'armv8_machine.py')) - cmd = run_command(detect_vendor.path()) - if cmd.returncode() == 0 - cmd_output = cmd.stdout().to_lower().strip().split(' ') - endif - # Set to generic if variable is not found - machine = get_variable('impl_' + cmd_output[0], ['generic']) - if machine[0] == 'generic' - machine = impl_generic - cmd_output = cmd_generic - endif - impl_pn = cmd_output[3] - if arm_force_native_march == true - impl_pn = 'native' - endif + # default to generic machine args if part_number is not found + # and not forcing native machine args + # but don't default in cross-builds; if part_number is specified + # incorrectly in a cross-file, it needs to be fixed there + part_number_config = part_number_config['generic'] else - impl_id = meson.get_cross_property('implementor_id', 'generic') - impl_pn = meson.get_cross_property('implementor_pn', 'default') - machine = get_variable('impl_' + impl_id) + # cross build and part number is not in part_number_config + error('Cross build part number 0@0 not found.'.format(part_number)) endif - # Apply Common Defaults. These settings may be overwritten by machine - # settings later. - foreach flag: flags_common_default - if flag.length() > 0 - dpdk_conf.set(flag[0], flag[1]) + dpdk_flags = flags_common_default + implementer_flags + + if part_number_config.length() > 1 + dpdk_flags += part_number_config[1] + endif + + machine_args = [] # Clear previous machine args + foreach flag: part_number_config[0] + if cc.has_argument(flag) + machine_args += flag endif endforeach - message('Implementer : ' + machine[0]) - foreach flag: machine[1] + foreach flag: dpdk_flags if flag.length() > 0 dpdk_conf.set(flag[0], flag[1]) endif endforeach - - foreach marg: machine[2] - if marg[0] == impl_pn - foreach flag: marg[1] - if cc.has_argument(flag) - machine_args += flag - endif - endforeach - # Apply any extra machine specific flags. - foreach flag: marg.get(2, flags_default_extra) - if flag.length() > 0 - dpdk_conf.set(flag[0], flag[1]) - endif - endforeach - endif - endforeach endif -message(machine_args) + +message('Using machine args: @0@'.format(machine_args)) if (cc.get_define('__ARM_NEON', args: machine_args) != '' or cc.get_define('__aarch64__', args: machine_args) != '') From patchwork Wed Oct 21 11:37:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 81700 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2ACEDA04DF; Wed, 21 Oct 2020 13:38:40 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 21419AD0D; Wed, 21 Oct 2020 13:38:07 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 16E2BACE7 for ; Wed, 21 Oct 2020 13:37:58 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id D0985B5259; Wed, 21 Oct 2020 13:37:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Ij2zBIhv4EWg; Wed, 21 Oct 2020 13:37:54 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 2EB25B6B41; Wed, 21 Oct 2020 13:37:51 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Wed, 21 Oct 2020 13:37:38 +0200 Message-Id: <1603280261-20206-4-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> References: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v3 3/6] build: automatic NUMA and cpu counts detection X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The build machine's number of cpus and numa nodes vary, resulting in mismatched counts of RTE_MAX_LCORE and RTE_MAX_NUMA_NODES for many builds. Automatically discover the host's numa and cpu counts to remove this mismatch for native builds. Use current defaults for default builds. Force the users to specify the counts for cross build in cross files or on the command line. Give users the option to override the discovery or values from cross files by specifying them on the command line with -Dmax_lcores and -Dmax_numa_nodes. Signed-off-by: Juraj Linkeš --- buildtools/get_cpu_count.py | 7 ++++++ buildtools/get_numa_count.py | 22 +++++++++++++++++++ buildtools/meson.build | 2 ++ config/meson.build | 42 ++++++++++++++++++++++++++++++++++-- meson_options.txt | 8 +++---- 5 files changed, 75 insertions(+), 6 deletions(-) create mode 100644 buildtools/get_cpu_count.py create mode 100644 buildtools/get_numa_count.py diff --git a/buildtools/get_cpu_count.py b/buildtools/get_cpu_count.py new file mode 100644 index 000000000..386f85f8b --- /dev/null +++ b/buildtools/get_cpu_count.py @@ -0,0 +1,7 @@ +#!/usr/bin/python3 +# SPDX-License-Identifier: BSD-3-Clause +# Copyright (c) 2020 PANTHEON.tech s.r.o. + +import os + +print(os.cpu_count()) diff --git a/buildtools/get_numa_count.py b/buildtools/get_numa_count.py new file mode 100644 index 000000000..f0c49973a --- /dev/null +++ b/buildtools/get_numa_count.py @@ -0,0 +1,22 @@ +#!/usr/bin/python3 +# SPDX-License-Identifier: BSD-3-Clause +# Copyright (c) 2020 PANTHEON.tech s.r.o. + +import ctypes +import glob +import os +import subprocess + +if os.name == 'posix': + if os.path.isdir('/sys/devices/system/node'): + print(len(glob.glob('/sys/devices/system/node/node*'))) + else: + print(subprocess.run(['sysctl', 'vm.ndomains'], capture_output=True).stdout) + +elif os.name == 'nt': + libkernel32 = ctypes.windll.kernel32 + + count = ctypes.c_ulong() + + libkernel32.GetNumaHighestNodeNumber(ctypes.pointer(count)) + print(count.value + 1) diff --git a/buildtools/meson.build b/buildtools/meson.build index 04808dabc..925e733b1 100644 --- a/buildtools/meson.build +++ b/buildtools/meson.build @@ -17,3 +17,5 @@ else endif map_to_win_cmd = py3 + files('map_to_win.py') sphinx_wrapper = py3 + files('call-sphinx-build.py') +get_cpu_count_cmd = py3 + files('get_cpu_count.py') +get_numa_count_cmd = py3 + files('get_numa_count.py') diff --git a/config/meson.build b/config/meson.build index a57c8ae9e..c4477f977 100644 --- a/config/meson.build +++ b/config/meson.build @@ -74,7 +74,11 @@ endif # still being able to support the CPU features required for DPDK. # This can be bumped up by the DPDK project, but it can never be an # invariant like 'native' +max_lcores = get_option('max_lcores') +max_numa_nodes = get_option('max_numa_nodes') if machine == 'default' + max_numa_nodes = 4 + max_lcores = 128 if host_machine.cpu_family().startswith('x86') # matches the old pre-meson build systems default machine = 'corei7' @@ -83,6 +87,22 @@ if machine == 'default' elif host_machine.cpu_family().startswith('ppc') machine = 'power8' endif +elif not meson.is_cross_build() + # find host core count and numa node count for native builds + if max_lcores == 0 + max_lcores = run_command(get_cpu_count_cmd).stdout().to_int() + min_lcores = 2 + if max_lcores < min_lcores + message('Found less than @0@ cores, building for @0@ cores'.format(min_lcores)) + max_lcores = min_lcores + else + message('Found @0@ cores'.format(max_lcores)) + endif + endif + if max_numa_nodes == 0 + max_numa_nodes = run_command(get_numa_count_cmd).stdout().to_int() + message('Found @0@ numa nodes'.format(max_numa_nodes)) + endif endif dpdk_conf.set('RTE_MACHINE', machine) @@ -227,8 +247,10 @@ foreach arg: warning_flags endforeach # set other values pulled from the build options -dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores')) -dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes')) +if not meson.is_cross_build() + dpdk_conf.set('RTE_MAX_LCORE', max_lcores) + dpdk_conf.set('RTE_MAX_NUMA_NODES', max_numa_nodes) +endif dpdk_conf.set('RTE_MAX_ETHPORTS', get_option('max_ethports')) dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet')) dpdk_conf.set('RTE_ENABLE_TRACE_FP', get_option('enable_trace_fp')) @@ -247,6 +269,22 @@ compile_time_cpuflags = [] subdir(arch_subdir) dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags)) +# check that cpu and numa count is set in cross builds +if meson.is_cross_build() + if max_lcores > 0 + # specified on the cmdline + dpdk_conf.set('RTE_MAX_LCORE', max_lcores) + elif not dpdk_conf.has('RTE_MAX_LCORE') + error('Number of cores for cross build not specified in @0@ subdir (e.g. in a cross-file) nor on the cmdline'.format(arch_subdir)) + endif + if max_numa_nodes > 0 + # specified on the cmdline + dpdk_conf.set('RTE_MAX_NUMA_NODES', max_numa_nodes) + elif not dpdk_conf.has('RTE_MAX_NUMA_NODES') + error('Number of numa nodes for cross build not specified in @0@ subdir (e.g. in a cross-file) nor on the cmdline'.format(arch_subdir)) + endif +endif + # set the install path for the drivers dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path) diff --git a/meson_options.txt b/meson_options.txt index 9bf18ab6b..01b0c45c3 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -26,10 +26,10 @@ option('machine', type: 'string', value: 'native', description: 'set the target machine type') option('max_ethports', type: 'integer', value: 32, description: 'maximum number of Ethernet devices') -option('max_lcores', type: 'integer', value: 128, - description: 'maximum number of cores/threads supported by EAL') -option('max_numa_nodes', type: 'integer', value: 4, - description: 'maximum number of NUMA nodes supported by EAL') +option('max_lcores', type: 'integer', value: 0, + description: 'maximum number of cores/threads supported by EAL. Value 0 means the number of cpus on the host will be used. For cross build, set to non-zero to overwrite the cross-file value.') +option('max_numa_nodes', type: 'integer', value: 0, + description: 'maximum number of NUMA nodes supported by EAL. Value 0 means the number of numa nodes on the host will be used. For cross build, set to non-zero to overwrite the cross-file value.') option('enable_trace_fp', type: 'boolean', value: false, description: 'enable fast path trace points.') option('tests', type: 'boolean', value: true, From patchwork Wed Oct 21 11:37:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 81703 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2DAE7A04DF; Wed, 21 Oct 2020 13:39:31 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CCC92AD2A; Wed, 21 Oct 2020 13:38:11 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id ED849AD0D for ; Wed, 21 Oct 2020 13:37:59 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 0FB9BB6B41; Wed, 21 Oct 2020 13:37:59 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id wtt7Hpc9NKHy; Wed, 21 Oct 2020 13:37:56 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id C69E9B6B43; Wed, 21 Oct 2020 13:37:51 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Wed, 21 Oct 2020 13:37:39 +0200 Message-Id: <1603280261-20206-5-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> References: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v3 4/6] build: move core and NUMA counts to cross files X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The values of RTE_MAX_NUMA_NODES and RTE_MAX_LCORE are going to vary for different build machines, even for the same Implementer ID and Part Number combinations. Move the fixed values to cross files and use automatic discovery/values from cmdline options for native build. Use predefined values for generic-armv8 build, since that build is not tied to the build machine. Signed-off-by: Juraj Linkeš --- config/arm/arm64_armada_linux_gcc | 2 ++ config/arm/arm64_armv8_linux_gcc | 6 ++++ config/arm/arm64_bluefield_linux_gcc | 2 ++ config/arm/arm64_dpaa_linux_gcc | 2 ++ config/arm/arm64_emag_linux_gcc | 2 ++ config/arm/arm64_n1sdp_linux_gcc | 2 ++ config/arm/arm64_octeontx2_linux_gcc | 2 ++ config/arm/arm64_stingray_linux_gcc | 2 ++ config/arm/arm64_thunderx2_linux_gcc | 2 ++ config/arm/arm64_thunderx_linux_gcc | 2 ++ config/arm/meson.build | 43 +++++++++++++++++----------- 11 files changed, 51 insertions(+), 16 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 52c5f4476..36100c594 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x56' +max_numa_nodes = 1 +max_lcores = 16 diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 13ee8b223..779333199 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -26,3 +26,9 @@ implementer_id = 'generic' # '0xd0a': cortex-a75 # '0xd0b': cortex-a76 part_number = 'generic' + +# Supported extra configuration +# max_numa_nodes = n # will set RTE_MAX_NUMA_NODES +# max_lcores = n # will set RTE_MAX_LCORE +max_lcores = 256 +max_numa_nodes = 4 diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index b79389d85..7ff6fd309 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd08' +max_numa_nodes = 1 +max_lcores = 16 diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 573ae7e42..adae86f57 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = 'dpaa' +max_numa_nodes = 1 +max_lcores = 16 diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 24f3d533e..3cccca901 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -14,3 +14,5 @@ endian = 'little' [properties] implementer_id = '0x50' +max_numa_nodes = 1 +max_lcores = 32 diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 6fb3f02ea..3a8b46812 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd0c' +max_numa_nodes = 1 +max_lcores = 4 diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index ac1042806..2baf95a2a 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xb2' +max_numa_nodes = 1 +max_lcores = 36 diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index b79389d85..7ff6fd309 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd08' +max_numa_nodes = 1 +max_lcores = 16 diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index dd257745e..07440fe5f 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xaf' +max_numa_nodes = 2 +max_lcores = 256 diff --git a/config/arm/arm64_thunderx_linux_gcc b/config/arm/arm64_thunderx_linux_gcc index 670764437..16ba78fd6 100644 --- a/config/arm/arm64_thunderx_linux_gcc +++ b/config/arm/arm64_thunderx_linux_gcc @@ -14,3 +14,5 @@ endian = 'little' [properties] implementer_id = '0x43' +max_numa_nodes = 1 +max_lcores = 96 diff --git a/config/arm/meson.build b/config/arm/meson.build index 66b08bfb5..5605e807b 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -33,44 +33,40 @@ flags_common_default = [ ['RTE_ARCH_ARM64', true] ] +# add these to defaults when machine='generic-armv8' +flags_force_generic = [ + ['RTE_MAX_NUMA_NODES', 4], + ['RTE_MAX_LCORE', 256] +] + # implementer specific aarch64 flags, with middle priority # (will overwrite common flags) flags_generic = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 128] ] flags_arm = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_LCORE', 16], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64] ] flags_cavium = [ ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_NUMA_NODES', 2], - ['RTE_MAX_LCORE', 96], ['RTE_MAX_VFIO_GROUPS', 128] ] flags_dpaa = [ ['RTE_MACHINE', '"dpaa"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 16], ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false] ] flags_emag = [ ['RTE_MACHINE', '"emag"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 32], ['RTE_CACHE_LINE_SIZE', 64] ] flags_armada = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 16], ['RTE_CACHE_LINE_SIZE', 64] ] @@ -78,8 +74,6 @@ flags_armada = [ # (will overwrite both common and implementer specific flags) flags_n1sdp_extra = [ ['RTE_MACHINE', '"n1sdp"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 4], ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], ['RTE_LIBRTE_VHOST_NUMA', false] ] @@ -90,15 +84,11 @@ flags_thunderx_extra = [ flags_thunderx2_extra = [ ['RTE_MACHINE', '"thunderx2"'], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 2], - ['RTE_MAX_LCORE', 256], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true] ] flags_octeontx2_extra = [ ['RTE_MACHINE', '"octeontx2"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 36], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true] @@ -160,6 +150,7 @@ else # default build impl_config = impl_generic part_number = 'generic' + flags_common_default += flags_force_generic else # native build # The script returns ['Implementer', 'Variant', 'Architecture', @@ -214,6 +205,26 @@ else dpdk_flags += part_number_config[1] endif + # apply cross-specific options + if meson.is_cross_build() + # configure RTE_MAX_NUMA_NODES and RTE_MAX_LCORE from cross file + # RFC: do we want defaults for these two? or should we require + # that all cross file define them? + cross_max_numa_nodes = meson.get_cross_property('max_numa_nodes', 0) + if cross_max_numa_nodes != 0 + dpdk_flags += [ + ['RTE_MAX_NUMA_NODES', cross_max_numa_nodes] + ] + endif + cross_max_lcores = meson.get_cross_property('max_lcores', 0) + if cross_max_lcores != 0 + message('Setting RTE_MAX_LCORE from cross file') + dpdk_flags += [ + ['RTE_MAX_LCORE', cross_max_lcores] + ] + endif + endif + machine_args = [] # Clear previous machine args foreach flag: part_number_config[0] if cc.has_argument(flag) From patchwork Wed Oct 21 11:37:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 81702 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1B199A04DF; Wed, 21 Oct 2020 13:39:18 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3D387AD22; Wed, 21 Oct 2020 13:38:10 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id E2361AD01 for ; Wed, 21 Oct 2020 13:37:59 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 12359B6A8F; Wed, 21 Oct 2020 13:37:58 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id sSJyJ7-Lo-59; Wed, 21 Oct 2020 13:37:57 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 98163B6B4B; Wed, 21 Oct 2020 13:37:52 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Wed, 21 Oct 2020 13:37:40 +0200 Message-Id: <1603280261-20206-6-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> References: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v3 5/6] build: disable Arm drivers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" A few options that disabled drivers in the old makefiles were improperly ported to the meson build system. Fix this by adding a to the list of disabled drivers, similarly how the command line option works. Signed-off-by: Juraj Linkeš Acked-by: Bruce Richardson --- config/arm/meson.build | 9 +++++---- drivers/meson.build | 2 +- meson.build | 1 + 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 5605e807b..87a208c97 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -8,6 +8,11 @@ arm_force_native_march = false native_machine_args = ['-march=native', '-mtune=native'] +# RFC: do we want these drivers to be disabled by default on arm? +# The previous way to disable these drivers never worked +# RTE_NET_AVP and the rest would be overwritten to true if the necessary deps were found +disabled_drivers += ['net/avp', 'net/fm10k', 'net/sfc'] + # common flags to all aarch64 builds, with lowest priority flags_common_default = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -23,10 +28,6 @@ flags_common_default = [ # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], - ['RTE_NET_FM10K', false], - ['RTE_NET_SFC_EFX', false], - ['RTE_NET_AVP', false], - ['RTE_SCHED_VECTOR', false], ['RTE_ARM_USE_WFE', false], ['RTE_CACHE_LINE_SIZE', 128], diff --git a/drivers/meson.build b/drivers/meson.build index a5a6fed06..a41ff909e 100644 --- a/drivers/meson.build +++ b/drivers/meson.build @@ -18,7 +18,7 @@ subdirs = [ 'baseband', # depends on common and bus. ] -disabled_drivers = run_command(list_dir_globs, get_option('disable_drivers'), +disabled_drivers += run_command(list_dir_globs, get_option('disable_drivers'), ).stdout().split() default_cflags = machine_args diff --git a/meson.build b/meson.build index 61d9a4f5f..8dadd70dc 100644 --- a/meson.build +++ b/meson.build @@ -21,6 +21,7 @@ dpdk_drivers = [] dpdk_extra_ldflags = [] dpdk_libs_disabled = [] dpdk_drvs_disabled = [] +disabled_drivers = [] abi_version_file = files('ABI_VERSION') if host_machine.cpu_family().startswith('x86') From patchwork Wed Oct 21 11:37:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 81704 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F35B5A04DF; Wed, 21 Oct 2020 13:39:55 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B1F30AD31; Wed, 21 Oct 2020 13:38:24 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 8C55CAD0D for ; Wed, 21 Oct 2020 13:38:01 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id AB1C6B6B4B; Wed, 21 Oct 2020 13:37:59 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9TZw72xVGWrQ; Wed, 21 Oct 2020 13:37:58 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id E6B1DB0973; Wed, 21 Oct 2020 13:37:53 +0200 (CEST) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Wed, 21 Oct 2020 13:37:41 +0200 Message-Id: <1603280261-20206-7-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> References: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC PATCH v3 6/6] build: update Arm builds with makefile flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Not all flags were moved properly from the old Makefile build system. Disable corresponding drivers and libnuma in cross files and remove deprecated config. Signed-off-by: Juraj Linkeš --- config/arm/arm64_armada_linux_gcc | 2 ++ config/arm/arm64_armv8_linux_gcc | 8 ++++++-- config/arm/arm64_bluefield_linux_gcc | 1 + config/arm/arm64_dpaa_linux_gcc | 1 + config/arm/arm64_n1sdp_linux_gcc | 1 + config/arm/arm64_octeontx2_linux_gcc | 1 + config/arm/arm64_stingray_linux_gcc | 1 + config/arm/meson.build | 5 ++++- drivers/meson.build | 4 ++++ 9 files changed, 21 insertions(+), 3 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 36100c594..e33f1e742 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -17,3 +17,5 @@ endian = 'little' implementer_id = '0x56' max_numa_nodes = 1 max_lcores = 16 +has_libnuma = 0 +disabled_drivers = ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 779333199..c6010e303 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -28,7 +28,11 @@ implementer_id = 'generic' part_number = 'generic' # Supported extra configuration -# max_numa_nodes = n # will set RTE_MAX_NUMA_NODES -# max_lcores = n # will set RTE_MAX_LCORE +# max_numa_nodes = n # will set RTE_MAX_NUMA_NODES +# max_lcores = n # will set RTE_MAX_LCORE max_lcores = 256 max_numa_nodes = 4 + +# has_libnuma = 0 # set to 0 if the SoC is not a NUMA system +# disabled_drivers += ['bus/dpaa', 'crypto'] + # add to the set of disabled libraries diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 7ff6fd309..e154ac4fd 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x41' part_number = '0xd08' max_numa_nodes = 1 max_lcores = 16 +has_libnuma = 0 diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index adae86f57..78883a2ec 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -17,3 +17,4 @@ endian = 'little' implementer_id = 'dpaa' max_numa_nodes = 1 max_lcores = 16 +has_libnuma = 0 diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 3a8b46812..4493227f3 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x41' part_number = '0xd0c' max_numa_nodes = 1 max_lcores = 4 +has_libnuma = 0 diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 2baf95a2a..ff9e5c403 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x43' part_number = '0xb2' max_numa_nodes = 1 max_lcores = 36 +has_libnuma = 0 diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 7ff6fd309..e154ac4fd 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x41' part_number = '0xd08' max_numa_nodes = 1 max_lcores = 16 +has_libnuma = 0 diff --git a/config/arm/meson.build b/config/arm/meson.build index 87a208c97..0eae3c3b7 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -91,7 +91,6 @@ flags_thunderx2_extra = [ flags_octeontx2_extra = [ ['RTE_MACHINE', '"octeontx2"'], ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true] ] # arm config (implementer 0x41) is the default config @@ -224,6 +223,10 @@ else ['RTE_MAX_LCORE', cross_max_lcores] ] endif + cross_has_libnuma = meson.get_cross_property('has_libnuma', '') + if cross_has_libnuma != '' + has_libnuma = cross_has_libnuma + endif endif machine_args = [] # Clear previous machine args diff --git a/drivers/meson.build b/drivers/meson.build index a41ff909e..4bdc3d5c9 100644 --- a/drivers/meson.build +++ b/drivers/meson.build @@ -21,6 +21,10 @@ subdirs = [ disabled_drivers += run_command(list_dir_globs, get_option('disable_drivers'), ).stdout().split() +if meson.is_cross_build() + disabled_drivers += meson.get_cross_property('disabled_drivers', []) +endif + default_cflags = machine_args default_cflags += ['-DALLOW_EXPERIMENTAL_API'] default_cflags += ['-DALLOW_INTERNAL_API']