From patchwork Wed Feb 24 08:17:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Slava Ovsiienko X-Patchwork-Id: 88129 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DF799A034F; Wed, 24 Feb 2021 09:17:39 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3FA681607D0; Wed, 24 Feb 2021 09:17:39 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 057B61607C2 for ; Wed, 24 Feb 2021 09:17:37 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@nvidia.com) with SMTP; 24 Feb 2021 10:17:36 +0200 Received: from nvidia.com (pegasus11.mtr.labs.mlnx [10.210.16.104]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 11O8HawS026934; Wed, 24 Feb 2021 10:17:36 +0200 From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: rasland@nvidia.com, matan@nvidia.com, stable@dpdk.org Date: Wed, 24 Feb 2021 10:17:35 +0200 Message-Id: <20210224081735.415-1-viacheslavo@nvidia.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20210222154520.31738-1-viacheslavo@nvidia.com> References: <20210222154520.31738-1-viacheslavo@nvidia.com> Subject: [dpdk-dev] [PATCH v2] net/mlx5: fix UAR allocation diagnostics messages X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Depending on kernel capabilities and rdma-core version the mapping of UAR (User Access Region) of desired memory caching type (non-cached or write combining) might fail. The PMD implements the flexible strategy of UAR mapping, alternating the type of caching to succeed. During this process the failure diagnostics messages are emitted. These messages are merely diagnostics ones and the logging level should be adjusted to DEBUG. Fixes: a0bfe9d56f74 ("net/mlx5: fix UAR memory mapping type") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko Acked-by: Matan Azrad --- v2: commit messahe typos fix --- drivers/net/mlx5/mlx5.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index aae2ef9af7..4ee0005a5c 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -768,7 +768,7 @@ mlx5_alloc_rxtx_uars(struct mlx5_dev_ctx_shared *sh, * the UAR mapping type into account on UAR setup * on queue creation. */ - DRV_LOG(WARNING, "Failed to allocate Tx DevX UAR (BF)"); + DRV_LOG(DEBUG, "Failed to allocate Tx DevX UAR (BF)"); uar_mapping = MLX5DV_UAR_ALLOC_TYPE_NC; sh->tx_uar = mlx5_glue->devx_alloc_uar (sh->ctx, uar_mapping); @@ -781,7 +781,7 @@ mlx5_alloc_rxtx_uars(struct mlx5_dev_ctx_shared *sh, * If Verbs/kernel does not support "Non-Cached" * try the "Write-Combining". */ - DRV_LOG(WARNING, "Failed to allocate Tx DevX UAR (NC)"); + DRV_LOG(DEBUG, "Failed to allocate Tx DevX UAR (NC)"); uar_mapping = MLX5DV_UAR_ALLOC_TYPE_BF; sh->tx_uar = mlx5_glue->devx_alloc_uar (sh->ctx, uar_mapping); @@ -800,7 +800,7 @@ mlx5_alloc_rxtx_uars(struct mlx5_dev_ctx_shared *sh, * IB device context, on context closure all UARs * will be freed, should be no memory/object leakage. */ - DRV_LOG(WARNING, "Retrying to allocate Tx DevX UAR"); + DRV_LOG(DEBUG, "Retrying to allocate Tx DevX UAR"); sh->tx_uar = NULL; } /* Check whether we finally succeeded with valid UAR allocation. */ @@ -821,7 +821,7 @@ mlx5_alloc_rxtx_uars(struct mlx5_dev_ctx_shared *sh, * should be no datapath noticeable impact, * can try "Non-Cached" mapping safely. */ - DRV_LOG(WARNING, "Failed to allocate Rx DevX UAR (BF)"); + DRV_LOG(DEBUG, "Failed to allocate Rx DevX UAR (BF)"); uar_mapping = MLX5DV_UAR_ALLOC_TYPE_NC; sh->devx_rx_uar = mlx5_glue->devx_alloc_uar (sh->ctx, uar_mapping); @@ -840,7 +840,7 @@ mlx5_alloc_rxtx_uars(struct mlx5_dev_ctx_shared *sh, * IB device context, on context closure all UARs * will be freed, should be no memory/object leakage. */ - DRV_LOG(WARNING, "Retrying to allocate Rx DevX UAR"); + DRV_LOG(DEBUG, "Retrying to allocate Rx DevX UAR"); sh->devx_rx_uar = NULL; } /* Check whether we finally succeeded with valid UAR allocation. */