From patchwork Thu Mar 4 10:06:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 88465 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D41B1A0561; Thu, 4 Mar 2021 11:07:18 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2D5F222A2D7; Thu, 4 Mar 2021 11:07:13 +0100 (CET) Received: from smtpbguseast2.qq.com (smtpbguseast2.qq.com [54.204.34.130]) by mails.dpdk.org (Postfix) with ESMTP id 35EB040684 for ; Thu, 4 Mar 2021 11:07:11 +0100 (CET) X-QQ-mid: bizesmtp14t1614852426t0zuha2v Received: from jiawenwu.trustnetic.com (unknown [183.129.236.74]) by esmtp6.qq.com (ESMTP) with id ; Thu, 04 Mar 2021 18:07:06 +0800 (CST) X-QQ-SSF: 01400000000000C0D000000A0000000 X-QQ-FEAT: uPKj8ga2w7GLqsVSzeDlMoQ0ItdR3TnHLrnIJhFZNQQ7UECv1Gu2kfzYC3/I4 VjC9DTAnyIi6G+sqOwZ/zxD5Jgh7QkMDqNlb05GycGVyFCN6EX79xsnEgAI2q3qok9WYaAN a0lCBYJyhxi/o9bIPTG3jw27nh5Zm1cB0pkWsl8oYMqkYE1fwaBNpIEehgve0oFsZsq0e9E VW7b+TGlm7Ok4XudeshyCKswnQYgwqzDcbcQf+ZsUHRwu0vOozKQn2FjOmDK1v73/puhp2X Ll7s5gmX3Flm0Z9XfLB0sIK8qmAJyjaPfe4JX3/768ZuRshShCAp+vWa6Eaoj3vgcDScoPx HgOtdqjuqy0zx2JcRVFfkTmlqJXGA== X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Date: Thu, 4 Mar 2021 18:06:57 +0800 Message-Id: <20210304100700.17888-2-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20210304100700.17888-1-jiawenwu@trustnetic.com> References: <20210304100700.17888-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign6 X-QQ-Bgrelay: 1 Subject: [dpdk-dev] [PATCH 1/4] net/txgbe: remove unused functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Remove unused functions for EEPROM read and write. Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_eeprom.c | 76 +-------------------------- drivers/net/txgbe/base/txgbe_eeprom.h | 2 - 2 files changed, 2 insertions(+), 76 deletions(-) diff --git a/drivers/net/txgbe/base/txgbe_eeprom.c b/drivers/net/txgbe/base/txgbe_eeprom.c index 72cd3ff30..bcbf3503c 100644 --- a/drivers/net/txgbe/base/txgbe_eeprom.c +++ b/drivers/net/txgbe/base/txgbe_eeprom.c @@ -193,7 +193,7 @@ s32 txgbe_ee_read16(struct txgbe_hw *hw, u32 offset, } /** - * txgbe_ee_read_buffer- Read EEPROM word(s) using hostif + * txgbe_ee_readw_buffer- Read EEPROM word(s) using hostif * @hw: pointer to hardware structure * @offset: offset of word in the EEPROM to read * @words: number of words @@ -274,42 +274,6 @@ s32 txgbe_ee_read32(struct txgbe_hw *hw, u32 addr, u32 *data) return err; } -/** - * txgbe_ee_read_buffer - Read EEPROM byte(s) using hostif - * @hw: pointer to hardware structure - * @addr: offset of bytes in the EEPROM to read - * @len: number of bytes - * @data: byte(s) read from the EEPROM - * - * Reads a 8 bit byte(s) from the EEPROM using the hostif. - **/ -s32 txgbe_ee_read_buffer(struct txgbe_hw *hw, - u32 addr, u32 len, void *data) -{ - const u32 mask = TXGBE_MNGSEM_SWMBX | TXGBE_MNGSEM_SWFLASH; - u8 *buf = (u8 *)data; - int err; - - err = hw->mac.acquire_swfw_sync(hw, mask); - if (err) - return err; - - while (len) { - u32 seg = (len <= TXGBE_PMMBX_DATA_SIZE - ? len : TXGBE_PMMBX_DATA_SIZE); - - err = txgbe_hic_sr_read(hw, addr, buf, seg); - if (err) - break; - - len -= seg; - buf += seg; - } - - hw->mac.release_swfw_sync(hw, mask); - return err; -} - /** * txgbe_ee_write - Write EEPROM word using hostif * @hw: pointer to hardware structure @@ -339,7 +303,7 @@ s32 txgbe_ee_write16(struct txgbe_hw *hw, u32 offset, } /** - * txgbe_ee_write_buffer - Write EEPROM word(s) using hostif + * txgbe_ee_writew_buffer - Write EEPROM word(s) using hostif * @hw: pointer to hardware structure * @offset: offset of word in the EEPROM to write * @words: number of words @@ -420,42 +384,6 @@ s32 txgbe_ee_write32(struct txgbe_hw *hw, u32 addr, u32 data) return err; } -/** - * txgbe_ee_write_buffer - Write EEPROM byte(s) using hostif - * @hw: pointer to hardware structure - * @addr: offset of bytes in the EEPROM to write - * @len: number of bytes - * @data: word(s) write to the EEPROM - * - * Write a 8 bit byte(s) to the EEPROM using the hostif. - **/ -s32 txgbe_ee_write_buffer(struct txgbe_hw *hw, - u32 addr, u32 len, void *data) -{ - const u32 mask = TXGBE_MNGSEM_SWMBX | TXGBE_MNGSEM_SWFLASH; - u8 *buf = (u8 *)data; - int err; - - err = hw->mac.acquire_swfw_sync(hw, mask); - if (err) - return err; - - while (len) { - u32 seg = (len <= TXGBE_PMMBX_DATA_SIZE - ? len : TXGBE_PMMBX_DATA_SIZE); - - err = txgbe_hic_sr_write(hw, addr, buf, seg); - if (err) - break; - - len -= seg; - buf += seg; - } - - hw->mac.release_swfw_sync(hw, mask); - return err; -} - /** * txgbe_calc_eeprom_checksum - Calculates and returns the checksum * @hw: pointer to hardware structure diff --git a/drivers/net/txgbe/base/txgbe_eeprom.h b/drivers/net/txgbe/base/txgbe_eeprom.h index d0e142dba..78b8af978 100644 --- a/drivers/net/txgbe/base/txgbe_eeprom.h +++ b/drivers/net/txgbe/base/txgbe_eeprom.h @@ -51,14 +51,12 @@ s32 txgbe_ee_readw_sw(struct txgbe_hw *hw, u32 offset, u16 *data); s32 txgbe_ee_readw_buffer(struct txgbe_hw *hw, u32 offset, u32 words, void *data); s32 txgbe_ee_read32(struct txgbe_hw *hw, u32 addr, u32 *data); -s32 txgbe_ee_read_buffer(struct txgbe_hw *hw, u32 addr, u32 len, void *data); s32 txgbe_ee_write16(struct txgbe_hw *hw, u32 offset, u16 data); s32 txgbe_ee_writew_sw(struct txgbe_hw *hw, u32 offset, u16 data); s32 txgbe_ee_writew_buffer(struct txgbe_hw *hw, u32 offset, u32 words, void *data); s32 txgbe_ee_write32(struct txgbe_hw *hw, u32 addr, u32 data); -s32 txgbe_ee_write_buffer(struct txgbe_hw *hw, u32 addr, u32 len, void *data); #endif /* _TXGBE_EEPROM_H_ */ From patchwork Thu Mar 4 10:06:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 88466 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E2805A0561; Thu, 4 Mar 2021 11:07:28 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C381A22A2DE; Thu, 4 Mar 2021 11:07:15 +0100 (CET) Received: from smtpproxy21.qq.com (smtpbg702.qq.com [203.205.195.102]) by mails.dpdk.org (Postfix) with ESMTP id 87F9122A2E3 for ; Thu, 4 Mar 2021 11:07:14 +0100 (CET) X-QQ-mid: bizesmtp14t1614852428t0489w1i Received: from jiawenwu.trustnetic.com (unknown [183.129.236.74]) by esmtp6.qq.com (ESMTP) with id ; Thu, 04 Mar 2021 18:07:08 +0800 (CST) X-QQ-SSF: 01400000000000C0D000000A0000000 X-QQ-FEAT: 4ufqJHNJpU1ESE5QSsPZLfEAvaAwToksH8gAuAUg7GM9/gAgn4OkLe6jk1FnU SRrXhrNADeBaF/0FyIphM+b+26p/M9s4b9131N2wL7Wg/V5+3PL9hD/DEJqJdkXTPrGfJBR faslOJAoRyPJF7jvvqUVgiH3cgIEr0v1QVrGRZtYZ0fJcSvdRQ4+hAM4WKnJKS71IAGXFTw eFjA1T/3s1KLcaVXT1IGE1dBgpkzHODUvjt5CvOlfmWwLoXNlVsX3J9FRH6rswtiVIReaC1 CVqKPvyQCyZAy93Cq5JSKZFOtr82vfdeNXwKlerrCJfSPvM44hbxZIWFg/e9O+fjglQyYtS x8ZQtHVtNk4w9DeQGZbnmCvwNZ2KA== X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Date: Thu, 4 Mar 2021 18:06:58 +0800 Message-Id: <20210304100700.17888-3-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20210304100700.17888-1-jiawenwu@trustnetic.com> References: <20210304100700.17888-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign5 X-QQ-Bgrelay: 1 Subject: [dpdk-dev] [PATCH 2/4] net/txgbe: fix Rx missed packet counter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add the Rx dropped packet counter into stats->imissed, to ensure the stats correct. Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_type.h | 1 + drivers/net/txgbe/txgbe_ethdev.c | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/txgbe/base/txgbe_type.h b/drivers/net/txgbe/base/txgbe_type.h index ef8358ae3..2c8a3866a 100644 --- a/drivers/net/txgbe/base/txgbe_type.h +++ b/drivers/net/txgbe/base/txgbe_type.h @@ -353,6 +353,7 @@ struct txgbe_hw_stats { u64 rx_management_packets; u64 tx_management_packets; u64 rx_management_dropped; + u64 rx_dma_drop; u64 rx_drop_packets; /* Basic Error */ diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 90137d0ce..1ab8d2cde 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -2080,6 +2080,7 @@ txgbe_read_stats_registers(struct txgbe_hw *hw, hw_stats->rx_bytes += rd64(hw, TXGBE_DMARXOCTL); hw_stats->tx_bytes += rd64(hw, TXGBE_DMATXOCTL); + hw_stats->rx_dma_drop += rd32(hw, TXGBE_DMARXDROP); hw_stats->rx_drop_packets += rd32(hw, TXGBE_PBRXDROP); /* MAC Stats */ @@ -2228,7 +2229,8 @@ txgbe_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) } /* Rx Errors */ - stats->imissed = hw_stats->rx_total_missed_packets; + stats->imissed = hw_stats->rx_total_missed_packets + + hw_stats->rx_dma_drop; stats->ierrors = hw_stats->rx_crc_errors + hw_stats->rx_mac_short_packet_dropped + hw_stats->rx_length_errors + From patchwork Thu Mar 4 10:06:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 88467 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 67ABAA0561; Thu, 4 Mar 2021 11:07:35 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0571522A2E6; Thu, 4 Mar 2021 11:07:18 +0100 (CET) Received: from smtpbgbr2.qq.com (smtpbgbr2.qq.com [54.207.22.56]) by mails.dpdk.org (Postfix) with ESMTP id D767B22A2E6 for ; Thu, 4 Mar 2021 11:07:15 +0100 (CET) X-QQ-mid: bizesmtp14t1614852430t9hab4zy Received: from jiawenwu.trustnetic.com (unknown [183.129.236.74]) by esmtp6.qq.com (ESMTP) with id ; Thu, 04 Mar 2021 18:07:09 +0800 (CST) X-QQ-SSF: 01400000000000C0D000000A0000000 X-QQ-FEAT: zmxJYRnDXwe4RwTs+vLKdLLkBpsWUBHNIu94Szm4oPivX3Z3VEowArSCuS5q0 PyHyJSP2ZnEFFdq/n8dq1q7f1yhzwbi2Q+dsV59yD6fGwyKrREH6gRwaCsSpy4RLapG0YF7 gQeE8FH06Cba0CIGKKp9Cllq4en4GvlJYtSZFhyuvO9nmdbsYfegQbNFz/f/rFZX2xpHB35 FG7A9jtItHj2LWynIbrIqgpmd8B7IJtCM5Ct0xyJMAYoH+KhbZQRLxJA34mIfYOPd1Ysc8a eIhZBPpp/uT9WwI6TomAtnK18BCuuxRAl5Id4ehnCT3Mt9EYd6duw2dMZ3CAKi1WrEFoDg7 nGw8as1lmX6XX0B88WZB0Hwb0bmRQ== X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Date: Thu, 4 Mar 2021 18:06:59 +0800 Message-Id: <20210304100700.17888-4-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20210304100700.17888-1-jiawenwu@trustnetic.com> References: <20210304100700.17888-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign6 X-QQ-Bgrelay: 1 Subject: [dpdk-dev] [PATCH 3/4] net/txgbe: update packet type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Update the packet type lookup table according to the HW design. Fix the bug that inner L3 and L4 type can not be parsed when QINQ insert in tunnel packet. Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ptypes.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/txgbe/txgbe_ptypes.c b/drivers/net/txgbe/txgbe_ptypes.c index cd160ebba..7009f2082 100644 --- a/drivers/net/txgbe/txgbe_ptypes.c +++ b/drivers/net/txgbe/txgbe_ptypes.c @@ -50,6 +50,7 @@ static u32 txgbe_ptype_lookup[TXGBE_PTID_MAX] __rte_cache_aligned = { /* L2:0-3 L3:4-7 L4:8-11 TUN:12-15 EL2:16-19 EL3:20-23 EL2:24-27 */ /* L2: ETH */ + TPTE(0x10, ETHER, NONE, NONE, NONE, NONE, NONE, NONE), TPTE(0x11, ETHER, NONE, NONE, NONE, NONE, NONE, NONE), TPTE(0x12, ETHER_TIMESYNC, NONE, NONE, NONE, NONE, NONE, NONE), TPTE(0x13, ETHER_FIP, NONE, NONE, NONE, NONE, NONE, NONE), @@ -67,6 +68,7 @@ static u32 txgbe_ptype_lookup[TXGBE_PTID_MAX] __rte_cache_aligned = { TPTE(0x1E, ETHER_FILTER, NONE, NONE, NONE, NONE, NONE, NONE), TPTE(0x1F, ETHER_FILTER, NONE, NONE, NONE, NONE, NONE, NONE), /* L3: IP */ + TPTE(0x20, ETHER, IPV4, NONFRAG, NONE, NONE, NONE, NONE), TPTE(0x21, ETHER, IPV4, FRAG, NONE, NONE, NONE, NONE), TPTE(0x22, ETHER, IPV4, NONFRAG, NONE, NONE, NONE, NONE), TPTE(0x23, ETHER, IPV4, UDP, NONE, NONE, NONE, NONE), @@ -339,7 +341,7 @@ txgbe_encode_ptype_tunnel(u32 ptype) break; case RTE_PTYPE_INNER_L2_ETHER_QINQ: ptid |= TXGBE_PTID_TUN_EIGMV; - return ptid; + break; default: break; } From patchwork Thu Mar 4 10:07:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 88468 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 770F8A0561; Thu, 4 Mar 2021 11:07:42 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 40D3A22A2ED; Thu, 4 Mar 2021 11:07:19 +0100 (CET) Received: from smtpbgbr2.qq.com (smtpbgbr2.qq.com [54.207.22.56]) by mails.dpdk.org (Postfix) with ESMTP id 4DA5822A2DF for ; Thu, 4 Mar 2021 11:07:16 +0100 (CET) X-QQ-mid: bizesmtp14t1614852431ty6ral0m Received: from jiawenwu.trustnetic.com (unknown [183.129.236.74]) by esmtp6.qq.com (ESMTP) with id ; Thu, 04 Mar 2021 18:07:11 +0800 (CST) X-QQ-SSF: 01400000000000C0D000000A0000000 X-QQ-FEAT: tvOgVvG7QYBfiukBuEe5o1P5JW6TocbON7bby9az/PrRwvYB5hXijt5WA5oIA wZay0htGhHWk1ofEOAXrVMTckwtpZ0ymMi2cTSFTi6iT2oE/WZs1jqrg9/R+IzktJ2qB2Xg OUxffCvkE3BonezBVCvQVwxuuHVCJT+iRYxMvWvLPjoEesvJRRce9t1gIZOrqNfL3CwiArv SvNycw6WqOKlZVnUwYbaGqk00bgkP64u30kPkIWhUMGtFP+QWty0plP1mmG/fMy11ryG1DM XceMGjufRd+HTDvtdA87wlgIXGTzF/IUpjG7OHE92wNuewFBC4J3cRakmO1XfnaRWkunmId RcJKIuV3gfk6I6hdI7py+dyvHq6aw== X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Date: Thu, 4 Mar 2021 18:07:00 +0800 Message-Id: <20210304100700.17888-5-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20210304100700.17888-1-jiawenwu@trustnetic.com> References: <20210304100700.17888-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign5 X-QQ-Bgrelay: 1 Subject: [dpdk-dev] [PATCH 4/4] net/txgbe: fix the process of adding crypto SA X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" By register definition, Ipsec Rx IPv4 address should to be written in the reg(0). Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ipsec.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/txgbe/txgbe_ipsec.c b/drivers/net/txgbe/txgbe_ipsec.c index 9f4eee408..a43b95aa2 100644 --- a/drivers/net/txgbe/txgbe_ipsec.c +++ b/drivers/net/txgbe/txgbe_ipsec.c @@ -145,11 +145,11 @@ txgbe_crypto_add_sa(struct txgbe_crypto_session *ic_session) reg_val = TXGBE_IPSRXIDX_ENA | TXGBE_IPSRXIDX_WRITE | TXGBE_IPSRXIDX_TB_IP | (ip_index << 3); if (priv->rx_ip_tbl[ip_index].ip.type == IPv4) { - wr32(hw, TXGBE_IPSRXADDR(0), 0); + uint32_t ipv4 = priv->rx_ip_tbl[ip_index].ip.ipv4; + wr32(hw, TXGBE_IPSRXADDR(0), rte_cpu_to_be_32(ipv4)); wr32(hw, TXGBE_IPSRXADDR(1), 0); wr32(hw, TXGBE_IPSRXADDR(2), 0); - wr32(hw, TXGBE_IPSRXADDR(3), - priv->rx_ip_tbl[ip_index].ip.ipv4); + wr32(hw, TXGBE_IPSRXADDR(3), 0); } else { wr32(hw, TXGBE_IPSRXADDR(0), priv->rx_ip_tbl[ip_index].ip.ipv6[0]);