From patchwork Mon Jan 31 18:08:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob Kollanukkaran X-Patchwork-Id: 106748 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C3216A0350; Mon, 31 Jan 2022 19:09:44 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 88DC4411FB; Mon, 31 Jan 2022 19:09:44 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 9F72C411B8 for ; Mon, 31 Jan 2022 19:09:43 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20VFt9Jc014555; Mon, 31 Jan 2022 10:09:16 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=ebxTcfOa/DWx+q3yxIX121OY/9b8O1s+3jfJuqPxmZM=; b=JLH8S8yBc39PdMoST0GqsNrEu6wHg+Ju2ign/dqQa1muP5JdHBAthUHPS0u4EpaKk2XG pj+8qfAYOFsETOjGZaKKggRIhtmHy0MKmwPg5V0wR27jh+TusEQMrm9uSxQ3GCPPgT6M kNsUX5Q7lPEY6n+G/bhUhA5s0ddHezesmE10aUEHzotGrFem5MWu0emysUdMqxIHW8DC PbEUN6iYAXx2hrqa/fcFI7qsz59dFgPxTaaTAFKeYuJQXVngkxxX67iiWCfznrkauhkz bw8X3YbQbXOh38rSdFEtVHdx5CtTXE9H7zD3p3HQsBc8+rGbd7ei7og6RvsChcn61bRL JA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3dxju4rg2g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 31 Jan 2022 10:09:15 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 31 Jan 2022 10:09:13 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 31 Jan 2022 10:09:13 -0800 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id D5AD63F7098; Mon, 31 Jan 2022 10:08:55 -0800 (PST) From: To: , Thomas Monjalon , Ferruh Yigit , Andrew Rybchenko , Ray Kinsella CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Jerin Jacob Subject: [dpdk-dev] [PATCH v3 1/2] ethdev: support queue-based priority flow control Date: Mon, 31 Jan 2022 23:38:58 +0530 Message-ID: <20220131180859.2662034-1-jerinj@marvell.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220113102718.3167282-1-jerinj@marvell.com> References: <20220113102718.3167282-1-jerinj@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: rEUe9bkfum2OYq5CKlya0_ssoVQW90Eq X-Proofpoint-ORIG-GUID: rEUe9bkfum2OYq5CKlya0_ssoVQW90Eq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-31_07,2022-01-31_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Jerin Jacob Based on device support and use-case need, there are two different ways to enable PFC. The first case is the port level PFC configuration, in this case, rte_eth_dev_priority_flow_ctrl_set() API shall be used to configure the PFC, and PFC frames will be generated using based on VLAN TC value. The second case is the queue level PFC configuration, in this case, Any packet field content can be used to steer the packet to the specific queue using rte_flow or RSS and then use rte_eth_dev_priority_flow_ctrl_queue_configure() to configure the TC mapping on each queue. Based on congestion selected on the specific queue, configured TC shall be used to generate PFC frames. Signed-off-by: Jerin Jacob Signed-off-by: Sunil Kumar Kori --- v2..v1: - Introduce rte_eth_dev_priority_flow_ctrl_queue_info_get() to avoid updates to rte_eth_dev_info - Removed devtools/libabigail.abignore changes - Address the comment from Ferruh in http://patches.dpdk.org/project/dpdk/patch/20220113102718.3167282-1-jerinj@marvell.com/ doc/guides/nics/features.rst | 7 +- doc/guides/rel_notes/release_22_03.rst | 6 ++ lib/ethdev/ethdev_driver.h | 12 ++- lib/ethdev/rte_ethdev.c | 132 +++++++++++++++++++++++++ lib/ethdev/rte_ethdev.h | 89 +++++++++++++++++ lib/ethdev/version.map | 4 + 6 files changed, 247 insertions(+), 3 deletions(-) diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst index 27be2d2576..1cacdc883a 100644 --- a/doc/guides/nics/features.rst +++ b/doc/guides/nics/features.rst @@ -379,9 +379,12 @@ Flow control Supports configuring link flow control. * **[implements] eth_dev_ops**: ``flow_ctrl_get``, ``flow_ctrl_set``, - ``priority_flow_ctrl_set``. + ``priority_flow_ctrl_set``, ``priority_flow_ctrl_queue_info_get``, + ``priority_flow_ctrl_queue_configure`` * **[related] API**: ``rte_eth_dev_flow_ctrl_get()``, ``rte_eth_dev_flow_ctrl_set()``, - ``rte_eth_dev_priority_flow_ctrl_set()``. + ``rte_eth_dev_priority_flow_ctrl_set()``, + ``rte_eth_dev_priority_flow_ctrl_queue_info_get()``, + ``rte_eth_dev_priority_flow_ctrl_queue_configure()``. .. _nic_features_rate_limitation: diff --git a/doc/guides/rel_notes/release_22_03.rst b/doc/guides/rel_notes/release_22_03.rst index 3bc0630c7c..e988c104e8 100644 --- a/doc/guides/rel_notes/release_22_03.rst +++ b/doc/guides/rel_notes/release_22_03.rst @@ -69,6 +69,12 @@ New Features The new API ``rte_event_eth_rx_adapter_event_port_get()`` was added. +* **Added an API to enable queue based priority flow ctrl(PFC).** + + New APIs, ``rte_eth_dev_priority_flow_ctrl_queue_info_get()`` and + ``rte_eth_dev_priority_flow_ctrl_queue_configure()``, was added. + + Removed Items ------------- diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h index d95605a355..320a364766 100644 --- a/lib/ethdev/ethdev_driver.h +++ b/lib/ethdev/ethdev_driver.h @@ -533,6 +533,13 @@ typedef int (*flow_ctrl_set_t)(struct rte_eth_dev *dev, typedef int (*priority_flow_ctrl_set_t)(struct rte_eth_dev *dev, struct rte_eth_pfc_conf *pfc_conf); +/** @internal Get info for queue based PFC on an Ethernet device. */ +typedef int (*priority_flow_ctrl_queue_info_get_t)( + struct rte_eth_dev *dev, struct rte_eth_pfc_queue_info *pfc_queue_info); +/** @internal Configure queue based PFC parameter on an Ethernet device. */ +typedef int (*priority_flow_ctrl_queue_config_t)( + struct rte_eth_dev *dev, struct rte_eth_pfc_queue_conf *pfc_queue_conf); + /** @internal Update RSS redirection table on an Ethernet device. */ typedef int (*reta_update_t)(struct rte_eth_dev *dev, struct rte_eth_rss_reta_entry64 *reta_conf, @@ -1080,7 +1087,10 @@ struct eth_dev_ops { flow_ctrl_set_t flow_ctrl_set; /**< Setup flow control */ /** Setup priority flow control */ priority_flow_ctrl_set_t priority_flow_ctrl_set; - + /** Priority flow control queue info get */ + priority_flow_ctrl_queue_info_get_t priority_flow_ctrl_queue_info_get; + /** Priority flow control queue configure */ + priority_flow_ctrl_queue_config_t priority_flow_ctrl_queue_config; /** Set Unicast Table Array */ eth_uc_hash_table_set_t uc_hash_table_set; /** Set Unicast hash bitmap */ diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c index a1d475a292..2ce38cd2c5 100644 --- a/lib/ethdev/rte_ethdev.c +++ b/lib/ethdev/rte_ethdev.c @@ -4022,6 +4022,138 @@ rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id, return -ENOTSUP; } +static inline int +validate_rx_pause_config(struct rte_eth_dev_info *dev_info, uint8_t tc_max, + struct rte_eth_pfc_queue_conf *pfc_queue_conf) +{ + if ((pfc_queue_conf->mode == RTE_ETH_FC_RX_PAUSE) || + (pfc_queue_conf->mode == RTE_ETH_FC_FULL)) { + if (pfc_queue_conf->rx_pause.tx_qid >= dev_info->nb_tx_queues) { + RTE_ETHDEV_LOG(ERR, "Tx queue not in range for Rx pause" + " (requested: %d configured: %d)\n", + pfc_queue_conf->rx_pause.tx_qid, + dev_info->nb_tx_queues); + return -EINVAL; + } + + if (pfc_queue_conf->rx_pause.tc >= tc_max) { + RTE_ETHDEV_LOG(ERR, "TC not in range for Rx pause" + " (requested: %d max: %d)\n", + pfc_queue_conf->rx_pause.tc, tc_max); + return -EINVAL; + } + } + + return 0; +} + +static inline int +validate_tx_pause_config(struct rte_eth_dev_info *dev_info, uint8_t tc_max, + struct rte_eth_pfc_queue_conf *pfc_queue_conf) +{ + if ((pfc_queue_conf->mode == RTE_ETH_FC_TX_PAUSE) || + (pfc_queue_conf->mode == RTE_ETH_FC_FULL)) { + if (pfc_queue_conf->tx_pause.rx_qid >= dev_info->nb_rx_queues) { + RTE_ETHDEV_LOG(ERR, "Rx queue not in range for Tx pause" + "(requested: %d configured: %d)\n", + pfc_queue_conf->tx_pause.rx_qid, + dev_info->nb_rx_queues); + return -EINVAL; + } + + if (pfc_queue_conf->tx_pause.tc >= tc_max) { + RTE_ETHDEV_LOG(ERR, "TC not in range for Tx pause" + "(requested: %d max: %d)\n", + pfc_queue_conf->tx_pause.tc, tc_max); + return -EINVAL; + } + } + + return 0; +} + +int +rte_eth_dev_priority_flow_ctrl_queue_info_get( + uint16_t port_id, struct rte_eth_pfc_queue_info *pfc_queue_info) +{ + struct rte_eth_dev *dev; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); + dev = &rte_eth_devices[port_id]; + + if (pfc_queue_info == NULL) { + RTE_ETHDEV_LOG(ERR, "PFC info param is NULL for port (%u)\n", + port_id); + return -EINVAL; + } + + if (*dev->dev_ops->priority_flow_ctrl_queue_info_get) + return eth_err(port_id, + (*dev->dev_ops->priority_flow_ctrl_queue_info_get)( + dev, pfc_queue_info)); + return -ENOTSUP; +} + +int +rte_eth_dev_priority_flow_ctrl_queue_configure( + uint16_t port_id, struct rte_eth_pfc_queue_conf *pfc_queue_conf) +{ + struct rte_eth_pfc_queue_info pfc_info; + struct rte_eth_dev_info dev_info; + struct rte_eth_dev *dev; + int ret; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); + dev = &rte_eth_devices[port_id]; + + if (pfc_queue_conf == NULL) { + RTE_ETHDEV_LOG(ERR, "PFC parameters are NULL for port (%u)\n", + port_id); + return -EINVAL; + } + + ret = rte_eth_dev_info_get(port_id, &dev_info); + if (ret != 0) + return ret; + + ret = rte_eth_dev_priority_flow_ctrl_queue_info_get(port_id, &pfc_info); + if (ret != 0) + return ret; + + if (pfc_info.capa == 0) { + RTE_ETHDEV_LOG(ERR, "Ethdev port %u does not support PFC\n", + port_id); + return -ENOTSUP; + } + + if (pfc_info.tc_max == 0) { + RTE_ETHDEV_LOG(ERR, + "Ethdev port %u does not support PFC TC values\n", + port_id); + return -ENOTSUP; + } + + if (pfc_info.capa & RTE_ETH_PFC_QUEUE_CAPA_RX_PAUSE) { + ret = validate_rx_pause_config(&dev_info, pfc_info.tc_max, + pfc_queue_conf); + if (ret != 0) + return ret; + } + + if (pfc_info.capa & RTE_ETH_PFC_QUEUE_CAPA_TX_PAUSE) { + ret = validate_tx_pause_config(&dev_info, pfc_info.tc_max, + pfc_queue_conf); + if (ret != 0) + return ret; + } + + if (*dev->dev_ops->priority_flow_ctrl_queue_config) + return eth_err(port_id, + (*dev->dev_ops->priority_flow_ctrl_queue_config)( + dev, pfc_queue_conf)); + return -ENOTSUP; +} + static int eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size) diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index fa299c8ad7..383ad1cdd7 100644 --- a/lib/ethdev/rte_ethdev.h +++ b/lib/ethdev/rte_ethdev.h @@ -1395,6 +1395,48 @@ struct rte_eth_pfc_conf { uint8_t priority; /**< VLAN User Priority. */ }; +/** Device supports Rx pause for queue based PFC. */ +#define RTE_ETH_PFC_QUEUE_CAPA_RX_PAUSE RTE_BIT64(0) +/** Device supports Tx pause for queue based PFC. */ +#define RTE_ETH_PFC_QUEUE_CAPA_TX_PAUSE RTE_BIT64(1) + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * A structure used to retrieve information of queue based PFC. + */ +struct rte_eth_pfc_queue_info { + /** + * Maximum supported traffic class as per PFC (802.1Qbb) specification. + */ + uint8_t tc_max; + /** PFC queue capabilities (RTE_ETH_PFC_QUEUE_CAPA_). */ + uint64_t capa; +}; + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * A structure used to configure Ethernet priority flow control parameter for + * ethdev queues. + */ +struct rte_eth_pfc_queue_conf { + enum rte_eth_fc_mode mode; /**< Link flow control mode */ + + struct { + uint16_t tx_qid; /**< Tx queue ID */ + uint8_t tc; /**< Traffic class as per PFC (802.1Qbb) spec */ + } rx_pause; /* Valid when (mode == FC_RX_PAUSE || mode == FC_FULL) */ + + struct { + uint16_t pause_time; /**< Pause quota in the Pause frame */ + uint16_t rx_qid; /**< Rx queue ID */ + uint8_t tc; /**< Traffic class as per PFC (802.1Qbb) spec */ + } tx_pause; /* Valid when (mode == FC_TX_PAUSE || mode == FC_FULL) */ +}; + /** * Tunnel type for device-specific classifier configuration. * @see rte_eth_udp_tunnel @@ -4144,6 +4186,53 @@ int rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id, int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr, uint32_t pool); +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice. + * + * Retrieve the information for queue based PFC. + * + * @param port_id + * The port identifier of the Ethernet device. + * @param pfc_queue_info + * A pointer to a structure of type *rte_eth_pfc_queue_info* to be filled with + * the information about queue based PFC. + * @return + * - (0) if successful. + * - (-ENOTSUP) if support for priority_flow_ctrl_queue_info_get does not exist. + * - (-ENODEV) if *port_id* invalid. + * - (-EINVAL) if bad parameter. + */ +__rte_experimental +int rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id, + struct rte_eth_pfc_queue_info *pfc_queue_info); +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice. + * + * Configure the queue based priority flow control for a given queue + * for Ethernet device. + * + * @note When an ethdev port switches to queue based PFC mode, the + * unconfigured queues shall be configured by the driver with + * default values such as lower priority value for TC etc. + * + * @param port_id + * The port identifier of the Ethernet device. + * @param pfc_queue_conf + * The pointer to the structure of the priority flow control parameters + * for the queue. + * @return + * - (0) if successful. + * - (-ENOTSUP) if hardware doesn't support queue based PFC mode. + * - (-ENODEV) if *port_id* invalid. + * - (-EINVAL) if bad parameter + * - (-EIO) if flow control setup queue failure + */ +__rte_experimental +int rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id, + struct rte_eth_pfc_queue_conf *pfc_queue_conf); + /** * Remove a MAC address from the internal array of addresses. * diff --git a/lib/ethdev/version.map b/lib/ethdev/version.map index c2fb0669a4..49523ebc45 100644 --- a/lib/ethdev/version.map +++ b/lib/ethdev/version.map @@ -256,6 +256,10 @@ EXPERIMENTAL { rte_flow_flex_item_create; rte_flow_flex_item_release; rte_flow_pick_transfer_proxy; + + # added in 22.03 + rte_eth_dev_priority_flow_ctrl_queue_configure; + rte_eth_dev_priority_flow_ctrl_queue_info_get; }; INTERNAL { From patchwork Mon Jan 31 18:08:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob Kollanukkaran X-Patchwork-Id: 106749 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DA1BBA0350; Mon, 31 Jan 2022 19:09:54 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C3A4241C27; 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Mon, 31 Jan 2022 10:09:41 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 31 Jan 2022 10:09:38 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 31 Jan 2022 10:09:38 -0800 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id A223B3F7098; Mon, 31 Jan 2022 10:09:20 -0800 (PST) From: To: , Xiaoyun Li , Aman Singh , Yuying Zhang CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [dpdk-dev] [PATCH v3 2/2] app/testpmd: add queue based pfc CLI options Date: Mon, 31 Jan 2022 23:38:59 +0530 Message-ID: <20220131180859.2662034-2-jerinj@marvell.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220131180859.2662034-1-jerinj@marvell.com> References: <20220113102718.3167282-1-jerinj@marvell.com> <20220131180859.2662034-1-jerinj@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: W5ayyZ1diLKEidxftxyTKnukMXo5vsvH X-Proofpoint-ORIG-GUID: W5ayyZ1diLKEidxftxyTKnukMXo5vsvH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-31_07,2022-01-31_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Sunil Kumar Kori Patch adds command line options to configure queue based priority flow control. - Syntax command is given as below: set pfc_queue_ctrl rx \ tx - Example command to configure queue based priority flow control on rx and tx side for port 0, Rx queue 0, Tx queue 0 with pause time 2047 testpmd> set pfc_queue_ctrl 0 rx on 0 0 tx on 0 0 2047 Signed-off-by: Sunil Kumar Kori --- v2..v1 - Sync up the implementation to use new APIs app/test-pmd/cmdline.c | 122 ++++++++++++++++++++ doc/guides/testpmd_app_ug/testpmd_funcs.rst | 22 ++++ 2 files changed, 144 insertions(+) diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c index e626b1c7d9..1af0321af0 100644 --- a/app/test-pmd/cmdline.c +++ b/app/test-pmd/cmdline.c @@ -544,6 +544,11 @@ static void cmd_help_long_parsed(void *parsed_result, " Set the priority flow control parameter on a" " port.\n\n" + "set pfc_queue_ctrl (port_id) rx (on|off) (tx_qid)" + " (tx_tc) tx (on|off) (rx_qid) (rx_tc) (pause_time)\n" + " Set the queue priority flow control parameter on a" + " given Rx and Tx queues of a port.\n\n" + "set stat_qmap (tx|rx) (port_id) (queue_id) (qmapping)\n" " Set statistics mapping (qmapping 0..15) for RX/TX" " queue on port.\n" @@ -7690,6 +7695,122 @@ cmdline_parse_inst_t cmd_priority_flow_control_set = { }, }; +struct cmd_queue_priority_flow_ctrl_set_result { + cmdline_fixed_string_t set; + cmdline_fixed_string_t pfc_queue_ctrl; + portid_t port_id; + cmdline_fixed_string_t rx; + cmdline_fixed_string_t rx_pfc_mode; + uint16_t tx_qid; + uint8_t tx_tc; + cmdline_fixed_string_t tx; + cmdline_fixed_string_t tx_pfc_mode; + uint16_t rx_qid; + uint8_t rx_tc; + uint16_t pause_time; +}; + +static void +cmd_queue_priority_flow_ctrl_set_parsed(void *parsed_result, + __rte_unused struct cmdline *cl, + __rte_unused void *data) +{ + struct cmd_queue_priority_flow_ctrl_set_result *res = parsed_result; + struct rte_eth_pfc_queue_conf pfc_queue_conf; + int rx_fc_enable, tx_fc_enable; + int ret; + + /* + * Rx on/off, flow control is enabled/disabled on RX side. This can + * indicate the RTE_ETH_FC_TX_PAUSE, Transmit pause frame at the Rx + * side. Tx on/off, flow control is enabled/disabled on TX side. This + * can indicate the RTE_ETH_FC_RX_PAUSE, Respond to the pause frame at + * the Tx side. + */ + static enum rte_eth_fc_mode rx_tx_onoff_2_mode[2][2] = { + {RTE_ETH_FC_NONE, RTE_ETH_FC_TX_PAUSE}, + {RTE_ETH_FC_RX_PAUSE, RTE_ETH_FC_FULL} + }; + + memset(&pfc_queue_conf, 0, sizeof(struct rte_eth_pfc_queue_conf)); + rx_fc_enable = (!strncmp(res->rx_pfc_mode, "on", 2)) ? 1 : 0; + tx_fc_enable = (!strncmp(res->tx_pfc_mode, "on", 2)) ? 1 : 0; + pfc_queue_conf.mode = rx_tx_onoff_2_mode[rx_fc_enable][tx_fc_enable]; + pfc_queue_conf.rx_pause.tc = res->tx_tc; + pfc_queue_conf.rx_pause.tx_qid = res->tx_qid; + pfc_queue_conf.tx_pause.tc = res->rx_tc; + pfc_queue_conf.tx_pause.rx_qid = res->rx_qid; + pfc_queue_conf.tx_pause.pause_time = res->pause_time; + + ret = rte_eth_dev_priority_flow_ctrl_queue_configure(res->port_id, + &pfc_queue_conf); + if (ret != 0) { + fprintf(stderr, + "bad queue priority flow control parameter, rc = %d\n", + ret); + } +} + +cmdline_parse_token_string_t cmd_q_pfc_set_set = + TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + set, "set"); +cmdline_parse_token_string_t cmd_q_pfc_set_flow_ctrl = + TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + pfc_queue_ctrl, "pfc_queue_ctrl"); +cmdline_parse_token_num_t cmd_q_pfc_set_portid = + TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + port_id, RTE_UINT16); +cmdline_parse_token_string_t cmd_q_pfc_set_rx = + TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + rx, "rx"); +cmdline_parse_token_string_t cmd_q_pfc_set_rx_mode = + TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + rx_pfc_mode, "on#off"); +cmdline_parse_token_num_t cmd_q_pfc_set_tx_qid = + TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + tx_qid, RTE_UINT16); +cmdline_parse_token_num_t cmd_q_pfc_set_tx_tc = + TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + tx_tc, RTE_UINT8); +cmdline_parse_token_string_t cmd_q_pfc_set_tx = + TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + tx, "tx"); +cmdline_parse_token_string_t cmd_q_pfc_set_tx_mode = + TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + tx_pfc_mode, "on#off"); +cmdline_parse_token_num_t cmd_q_pfc_set_rx_qid = + TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + rx_qid, RTE_UINT16); +cmdline_parse_token_num_t cmd_q_pfc_set_rx_tc = + TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + rx_tc, RTE_UINT8); +cmdline_parse_token_num_t cmd_q_pfc_set_pause_time = + TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result, + pause_time, RTE_UINT16); + +cmdline_parse_inst_t cmd_queue_priority_flow_control_set = { + .f = cmd_queue_priority_flow_ctrl_set_parsed, + .data = NULL, + .help_str = "set pfc_queue_ctrl rx " + "tx : " + "Configure the Ethernet queue priority flow control", + .tokens = { + (void *)&cmd_q_pfc_set_set, + (void *)&cmd_q_pfc_set_flow_ctrl, + (void *)&cmd_q_pfc_set_portid, + (void *)&cmd_q_pfc_set_rx, + (void *)&cmd_q_pfc_set_rx_mode, + (void *)&cmd_q_pfc_set_tx_qid, + (void *)&cmd_q_pfc_set_tx_tc, + (void *)&cmd_q_pfc_set_tx, + (void *)&cmd_q_pfc_set_tx_mode, + (void *)&cmd_q_pfc_set_rx_qid, + (void *)&cmd_q_pfc_set_rx_tc, + (void *)&cmd_q_pfc_set_pause_time, + NULL, + }, +}; + /* *** RESET CONFIGURATION *** */ struct cmd_reset_result { cmdline_fixed_string_t reset; @@ -17765,6 +17886,7 @@ cmdline_parse_ctx_t main_ctx[] = { (cmdline_parse_inst_t *)&cmd_link_flow_control_set_autoneg, (cmdline_parse_inst_t *)&cmd_link_flow_control_show, (cmdline_parse_inst_t *)&cmd_priority_flow_control_set, + (cmdline_parse_inst_t *)&cmd_queue_priority_flow_control_set, (cmdline_parse_inst_t *)&cmd_config_dcb, (cmdline_parse_inst_t *)&cmd_read_reg, (cmdline_parse_inst_t *)&cmd_read_reg_bit_field, diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst b/doc/guides/testpmd_app_ug/testpmd_funcs.rst index 94792d88cc..82333d518e 100644 --- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst +++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst @@ -1561,6 +1561,28 @@ Where: * ``priority`` (0-7): VLAN User Priority. +set pfc_queue_ctrl +~~~~~~~~~~~~~~~~~~ + +Set the priority flow control parameter on a given Rx and Tx queue of a port:: + + testpmd> set pfc_queue_ctrl rx (on|off) \ + tx (on|off) + +Where: + +* ``tx_qid`` (integer): Tx qid for which ``tx_tc`` will be applied and traffic + will be paused when PFC frame is received with ``tx_tc`` enabled. + +* ``tx_tc`` (0-15): TC for which traffic is to be paused for xmit. + +* ``rx_qid`` (integer): Rx qid for which threshold will be applied and PFC + frame will be generated with ``tx_tc`` when exceeds the threshold. + +* ``rx_tc`` (0-15): TC filled in PFC frame for which remote Tx is to be paused. + +* ``pause_time`` (integer): Pause quota filled in the PFC frame. + set stat_qmap ~~~~~~~~~~~~~