From patchwork Wed Feb 16 19:38:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timothy McDaniel X-Patchwork-Id: 107698 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 788EBA00BE; Wed, 16 Feb 2022 20:39:09 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 490E140150; Wed, 16 Feb 2022 20:39:09 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id D402C40042 for ; Wed, 16 Feb 2022 20:39:07 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645040348; x=1676576348; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=OX4o2nOqeVgiSEbrnRQTghQpT77EG1tnP/6clr5U/MQ=; b=HGyXwDmz5Eo7FxM8kkFtccgUo/2qsLS03X/2R0HnhFKu9WefyPhn/Tt/ Y1ZPeSFkdLoLPmvS/nyhnj165gYhl5ggA7eA/AGGy9C0N6NLUqyeu/Lsi Vt8Hk5cV6sIs2Q+uIFUPowxe5MeVrwp4leQzlLLWA0gRg7XL5c3Km4y5R G0oXm2WZNqb4wU5kkjzQC9WSi4+NHpPzMCi3a1eHuVCbK40Ea5HR3eVEH P7ZncDWS2Rzm6uVZUwLWapufrf7+kAGkJxy/vIzrmyCJOCNbjAAK6m9rc 6kXvUINU/j2A52NvrQ1wp8fNLk8Ywv9jvfbyq8nHtcaY4lYsv6vX/K0R3 Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10260"; a="275291075" X-IronPort-AV: E=Sophos;i="5.88,374,1635231600"; d="scan'208";a="275291075" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Feb 2022 11:38:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,374,1635231600"; d="scan'208";a="545132584" Received: from txanpdk03.an.intel.com ([10.123.117.78]) by orsmga008.jf.intel.com with ESMTP; 16 Feb 2022 11:38:33 -0800 From: Timothy McDaniel To: jerin.jacob@caviumnetworks.com Cc: dev@dpdk.org Subject: [PATCH 1/2] event/dlb2: update rolling mask used for dequeue Date: Wed, 16 Feb 2022 13:38:26 -0600 Message-Id: <20220216193827.2908858-1-timothy.mcdaniel@intel.com> X-Mailer: git-send-email 2.23.0 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Update the rolling mask used in dequeue operations. Fixes vector optimized dequeue. Fixes: 000a7b8e7582 ("event/dlb2: optimize dequeue operation") Signed-off-by: Timothy McDaniel --- drivers/event/dlb2/dlb2.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index d75f12e382..09abdd1660 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -3897,31 +3897,45 @@ dlb2_hw_dequeue_sparse(struct dlb2_eventdev *dlb2, while (num < max_num) { struct dlb2_dequeue_qe qes[DLB2_NUM_QES_PER_CACHE_LINE]; int num_avail; + if (use_scalar) { + int n_iter = 0; + uint64_t m_rshift, m_lshift, m2_rshift, m2_lshift; + num_avail = dlb2_recv_qe_sparse(qm_port, qes); num_avail = RTE_MIN(num_avail, max_num - num); dlb2_inc_cq_idx(qm_port, num_avail << 2); if (num_avail == DLB2_NUM_QES_PER_CACHE_LINE) - num += dlb2_process_dequeue_four_qes(ev_port, - qm_port, - &events[num], - &qes[0]); + n_iter = dlb2_process_dequeue_four_qes(ev_port, + qm_port, + &events[num], + &qes[0]); else if (num_avail) - num += dlb2_process_dequeue_qes(ev_port, + n_iter = dlb2_process_dequeue_qes(ev_port, qm_port, &events[num], &qes[0], num_avail); + num += n_iter; + /* update rolling_mask for vector code support */ + m_rshift = qm_port->cq_rolling_mask >> n_iter; + m_lshift = qm_port->cq_rolling_mask << (64 - n_iter); + m2_rshift = qm_port->cq_rolling_mask_2 >> n_iter; + m2_lshift = qm_port->cq_rolling_mask_2 << + (64 - n_iter); + qm_port->cq_rolling_mask = (m_rshift | m2_lshift); + qm_port->cq_rolling_mask_2 = (m2_rshift | m_lshift); } else { /* !use_scalar */ num_avail = dlb2_recv_qe_sparse_vec(qm_port, &events[num], max_num - num); - num += num_avail; dlb2_inc_cq_idx(qm_port, num_avail << 2); + num += num_avail; DLB2_INC_STAT(ev_port->stats.traffic.rx_ok, num_avail); } if (!num_avail) { - if (num > 0) + if ((timeout == 0) || (num > 0)) + /* Not waiting in any form or 1+ events recd */ break; else if (dlb2_dequeue_wait(dlb2, ev_port, qm_port, timeout, start_ticks)) From patchwork Wed Feb 16 19:38:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timothy McDaniel X-Patchwork-Id: 107699 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6EFDCA00BE; Wed, 16 Feb 2022 20:39:19 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5E10241177; Wed, 16 Feb 2022 20:39:19 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 6B86940042 for ; Wed, 16 Feb 2022 20:39:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645040358; x=1676576358; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i+7CxBUfAFnwH2hGh/Q5fIZFImXBSnJqwVroTu0kiQg=; b=Sdt9cNeK7m+XXc9zcWtBDUFdq6hQod/EgvgrPMpMLf67N1ND9Tm8o26E ReOWt3/fSrtWyX8DypmS/CjsUvYPOBxx1XsvvWFIhs+k3cpyngHBa+QfL yGdAdKt+LnEbCBdvp7FxXdD2Te6qYMEuz8RBVQ9MWkuarVMLDOceIjJos g0gQUKrqGKNjhfwCqV2Sh9QVg55Ms0s8doljfVZshOwGSRjWq51Y5+8d3 E80eEyvKVPs9J1Kg1YvbhaO5QvylbZVn4CCvj2yzCTgqYzH9eFWGXqUH6 cae9UYrNrIK16Ndqj/62CZ99Rj4y1B8eijEGAT683e9M9s6NGDPN6Gg5d w==; X-IronPort-AV: E=McAfee;i="6200,9189,10260"; a="275291128" X-IronPort-AV: E=Sophos;i="5.88,374,1635231600"; d="scan'208";a="275291128" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Feb 2022 11:38:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,374,1635231600"; d="scan'208";a="545132631" Received: from txanpdk03.an.intel.com ([10.123.117.78]) by orsmga008.jf.intel.com with ESMTP; 16 Feb 2022 11:38:37 -0800 From: Timothy McDaniel To: jerin.jacob@caviumnetworks.com Cc: dev@dpdk.org Subject: [PATCH 2/2] event/dlb2: poll HW CQ inflights before mapping queue Date: Wed, 16 Feb 2022 13:38:27 -0600 Message-Id: <20220216193827.2908858-2-timothy.mcdaniel@intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20220216193827.2908858-1-timothy.mcdaniel@intel.com> References: <20220216193827.2908858-1-timothy.mcdaniel@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When attempting to link a port and queue immediately after unlinking, the CQ inflights may not all be processed. Poll the h/w register for outstanding inflights instead of reading once, in case the inflights are still being processed. Also return EBUSY if the inflight processing is not completed in a suitable amount of time. Fixes: 1857f1922ce2 ("event/dlb2: use new implementation of resource file") Signed-off-by: Timothy McDaniel --- drivers/event/dlb2/pf/base/dlb2_resource.c | 23 ++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c b/drivers/event/dlb2/pf/base/dlb2_resource.c index 3661b940c3..d4c49c2992 100644 --- a/drivers/event/dlb2/pf/base/dlb2_resource.c +++ b/drivers/event/dlb2/pf/base/dlb2_resource.c @@ -2356,16 +2356,26 @@ static bool dlb2_domain_finish_unmap_port(struct dlb2_hw *hw, { u32 infl_cnt; int i; + const int max_iters = 1000; + const int iter_poll_us = 100; if (port->num_pending_removals == 0) return false; /* * The unmap requires all the CQ's outstanding inflights to be - * completed. + * completed. Poll up to 100ms. */ - infl_cnt = DLB2_CSR_RD(hw, DLB2_LSP_CQ_LDB_INFL_CNT(hw->ver, + for (i = 0; i < max_iters; i++) { + infl_cnt = DLB2_CSR_RD(hw, DLB2_LSP_CQ_LDB_INFL_CNT(hw->ver, port->id.phys_id)); + + if (DLB2_BITS_GET(infl_cnt, + DLB2_LSP_CQ_LDB_INFL_CNT_COUNT) == 0) + break; + rte_delay_us_sleep(iter_poll_us); + } + if (DLB2_BITS_GET(infl_cnt, DLB2_LSP_CQ_LDB_INFL_CNT_COUNT) > 0) return false; @@ -5316,6 +5326,7 @@ static void dlb2_log_map_qid(struct dlb2_hw *hw, * EINVAL - A requested resource is unavailable, invalid port or queue ID, or * the domain is not configured. * EFAULT - Internal error (resp->status not set). + * EBUSY - The requested port has outstanding detach operations. */ int dlb2_hw_map_qid(struct dlb2_hw *hw, u32 domain_id, @@ -5356,8 +5367,12 @@ int dlb2_hw_map_qid(struct dlb2_hw *hw, * attempt to complete them. This may be necessary to free up a QID * slot for this requested mapping. */ - if (port->num_pending_removals) - dlb2_domain_finish_unmap_port(hw, domain, port); + if (port->num_pending_removals) { + bool bool_ret; + bool_ret = dlb2_domain_finish_unmap_port(hw, domain, port); + if (!bool_ret) + return -EBUSY; + } ret = dlb2_verify_map_qid_slot_available(port, queue, resp); if (ret)