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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.236 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.236; helo=mail.nvidia.com; Received: from mail.nvidia.com (12.22.5.236) by DM6NAM11FT042.mail.protection.outlook.com (10.13.173.165) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5144.20 via Frontend Transport; Sun, 10 Apr 2022 10:31:32 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Sun, 10 Apr 2022 10:31:27 +0000 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Sun, 10 Apr 2022 03:31:24 -0700 From: Adham Masarwah To: CC: , , , , , Subject: [PATCH 1/2] net/mlx5: add support for set promiscuous modes in Windows Date: Sun, 10 Apr 2022 13:31:06 +0300 Message-ID: <20220410103107.66964-2-adham@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 MIME-Version: 1.0 X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3c946858-4bd1-41cb-9d52-08da1add483a X-MS-TrafficTypeDiagnostic: DM6PR12MB3609:EE_ X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Apr 2022 10:31:32.6992 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3c946858-4bd1-41cb-9d52-08da1add483a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT042.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3609 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Support of the set promiscuous modes by calling the new API In Mlx5DevX Lib. Added new glue API for Windows which will be used to communicate with Windows driver to enable/disable PROMISC or ALLMC. Signed-off-by: Adham Masarwah Tested-by: Idan Hackmon Acked-by: Matan Azard --- drivers/common/mlx5/windows/mlx5_glue.c | 31 +++++++++++++++++++++++++++++++ drivers/common/mlx5/windows/mlx5_glue.h | 6 ++++++ drivers/net/mlx5/windows/mlx5_os.c | 15 ++++++--------- 3 files changed, 43 insertions(+), 9 deletions(-) diff --git a/drivers/common/mlx5/windows/mlx5_glue.c b/drivers/common/mlx5/windows/mlx5_glue.c index 535487a8d4..73d63ffd98 100644 --- a/drivers/common/mlx5/windows/mlx5_glue.c +++ b/drivers/common/mlx5/windows/mlx5_glue.c @@ -328,6 +328,36 @@ mlx5_glue_devx_init_showdown_event(void *ctx) return 0; } +static int +mlx5_glue_devx_set_promisc_vport(void *ctx, uint32_t promisc_type, uint8_t f_enable) +{ +#ifdef HAVE_DEVX_SET_PROMISC_SUPPORT + int devx_promisc_type = MLX5_DEVX_SET_PROMISC_VPORT_PROMISC_MODE; + struct mlx5_context *mlx5_ctx; + int err; + + if (!ctx) { + errno = EINVAL; + return errno; + } + mlx5_ctx = (struct mlx5_context *)ctx; + if (promisc_type == MC_PROMISC) + devx_promisc_type = MLX5_DEVX_SET_PROMISC_VPORT_ALL_MULTICAST; + err = devx_set_promisc_vport(mlx5_ctx->devx_ctx, devx_promisc_type, f_enable); + if (err) { + errno = err; + return errno; + } + return 0; +#else + (void)promisc_type; + (void)f_enable; + (void)ctx; + DRV_LOG(WARNING, "%s: is not supported", __func__); + return -ENOTSUP; +#endif +} + alignas(RTE_CACHE_LINE_SIZE) const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue){ .version = MLX5_GLUE_VERSION, @@ -351,4 +381,5 @@ const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue){ .devx_query_eqn = mlx5_glue_devx_query_eqn, .query_rt_values = mlx5_glue_query_rt_values, .devx_init_showdown_event = mlx5_glue_devx_init_showdown_event, + .devx_set_promisc_vport = mlx5_glue_devx_set_promisc_vport, }; diff --git a/drivers/common/mlx5/windows/mlx5_glue.h b/drivers/common/mlx5/windows/mlx5_glue.h index db8f2e8319..eae8070b3f 100644 --- a/drivers/common/mlx5/windows/mlx5_glue.h +++ b/drivers/common/mlx5/windows/mlx5_glue.h @@ -49,6 +49,11 @@ struct mlx5dv_dr_action_dest_attr { }; #endif +enum { + ALL_PROMISC, + MC_PROMISC, +}; + /* LIB_GLUE_VERSION must be updated every time this structure is modified. */ struct mlx5_glue { const char *version; @@ -87,6 +92,7 @@ struct mlx5_glue { int (*devx_query_eqn)(void *context, uint32_t cpus, uint32_t *eqn); int (*query_rt_values)(void *ctx, void *devx_clock); int (*devx_init_showdown_event)(void *ctx); + int (*devx_set_promisc_vport)(void *ctx, uint32_t promisc_type, uint8_t f_enable); }; extern const struct mlx5_glue *mlx5_glue; diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c index c7bb81549e..77f04cc931 100644 --- a/drivers/net/mlx5/windows/mlx5_os.c +++ b/drivers/net/mlx5/windows/mlx5_os.c @@ -729,7 +729,6 @@ mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, /** * Set device promiscuous mode - * Currently it has no support under Windows. * * @param dev * Pointer to Ethernet device structure. @@ -742,10 +741,9 @@ mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, int mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) { - (void)dev; - (void)enable; - DRV_LOG(WARNING, "%s: is not supported", __func__); - return -ENOTSUP; + struct mlx5_priv *priv = dev->data->dev_private; + + return mlx5_glue->devx_set_promisc_vport(priv->sh->cdev->ctx, ALL_PROMISC, enable); } /** @@ -762,10 +760,9 @@ mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) int mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) { - (void)dev; - (void)enable; - DRV_LOG(WARNING, "%s: is not supported", __func__); - return -ENOTSUP; + struct mlx5_priv *priv = dev->data->dev_private; + + return mlx5_glue->devx_set_promisc_vport(priv->sh->cdev->ctx, MC_PROMISC, enable); } /** From patchwork Sun Apr 10 10:31:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adham Masarwah X-Patchwork-Id: 109554 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 02B2FA00BE; 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Sun, 10 Apr 2022 10:31:32 +0000 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Sun, 10 Apr 2022 03:31:29 -0700 From: Adham Masarwah To: CC: , , , , , Subject: [PATCH 2/2] net/mlx5: add support for set and get MTU in Windows Date: Sun, 10 Apr 2022 13:31:07 +0300 Message-ID: <20220410103107.66964-3-adham@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20220410103107.66964-2-adham@nvidia.com> References: <20220410103107.66964-2-adham@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 65e4d35e-4338-4d36-022e-08da1add4b99 X-MS-TrafficTypeDiagnostic: CH2PR12MB3685:EE_ X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Apr 2022 10:31:38.3353 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 65e4d35e-4338-4d36-022e-08da1add4b99 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.235]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT022.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB3685 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Mlx5Devx library has new API's for setting and getting MTU. Added new glue functions that wrap the new mlx5devx lib API's. Implemented the os_ethdev callbacks to use the new glue functions in Windows. Signed-off-by: Adham Masarwah Tested-by: Idan Hackmon Acked-by: Matan Azard --- drivers/common/mlx5/windows/mlx5_glue.c | 55 +++++++++++++++++++++++++++++++ drivers/common/mlx5/windows/mlx5_glue.h | 2 ++ drivers/net/mlx5/windows/mlx5_ethdev_os.c | 31 ++++++++++++++--- 3 files changed, 84 insertions(+), 4 deletions(-) diff --git a/drivers/common/mlx5/windows/mlx5_glue.c b/drivers/common/mlx5/windows/mlx5_glue.c index 73d63ffd98..6935811bf4 100644 --- a/drivers/common/mlx5/windows/mlx5_glue.c +++ b/drivers/common/mlx5/windows/mlx5_glue.c @@ -358,6 +358,59 @@ mlx5_glue_devx_set_promisc_vport(void *ctx, uint32_t promisc_type, uint8_t f_ena #endif } +static int +mlx5_glue_devx_get_mtu(void *ctx, uint32_t *mtu) +{ + int err = 0; + struct mlx5_context *mlx5_ctx; + + if (!ctx) { + errno = EINVAL; + return errno; + } + mlx5_ctx = (struct mlx5_context *)ctx; +#ifdef HAVE_DEVX_SET_GET_MTU_SUPPORT + err = devx_get_mtu(mlx5_ctx->devx_ctx, mtu); + if (err) { + errno = err; + return errno; + } +#else + *mtu = mlx5_ctx->mlx5_dev.mtu_bytes; +#endif + + return err; +} + +static int +mlx5_glue_devx_set_mtu(void *ctx, uint32_t mtu) +{ +#ifdef HAVE_DEVX_SET_GET_MTU_SUPPORT + struct mlx5_context *mlx5_ctx; + int err; + + if (!ctx) { + errno = EINVAL; + return errno; + } + mlx5_ctx = (struct mlx5_context *)ctx; + err = devx_set_mtu(mlx5_ctx->devx_ctx, mtu); + if (err) { + errno = err; + return errno; + } + return 0; +#else + (void)mtu; + (void)ctx; + DRV_LOG(WARNING, "%s: is not supported", __func__); + return -ENOTSUP; +#endif + +} + + + alignas(RTE_CACHE_LINE_SIZE) const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue){ .version = MLX5_GLUE_VERSION, @@ -382,4 +435,6 @@ const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue){ .query_rt_values = mlx5_glue_query_rt_values, .devx_init_showdown_event = mlx5_glue_devx_init_showdown_event, .devx_set_promisc_vport = mlx5_glue_devx_set_promisc_vport, + .devx_get_mtu = mlx5_glue_devx_get_mtu, + .devx_set_mtu = mlx5_glue_devx_set_mtu, }; diff --git a/drivers/common/mlx5/windows/mlx5_glue.h b/drivers/common/mlx5/windows/mlx5_glue.h index eae8070b3f..5ba324ebc4 100644 --- a/drivers/common/mlx5/windows/mlx5_glue.h +++ b/drivers/common/mlx5/windows/mlx5_glue.h @@ -93,6 +93,8 @@ struct mlx5_glue { int (*query_rt_values)(void *ctx, void *devx_clock); int (*devx_init_showdown_event)(void *ctx); int (*devx_set_promisc_vport)(void *ctx, uint32_t promisc_type, uint8_t f_enable); + int (*devx_get_mtu)(void *ctx, uint32_t *mtu); + int (*devx_set_mtu)(void *ctx, uint32_t mtu); }; extern const struct mlx5_glue *mlx5_glue; diff --git a/drivers/net/mlx5/windows/mlx5_ethdev_os.c b/drivers/net/mlx5/windows/mlx5_ethdev_os.c index c6315ce368..f97526580d 100644 --- a/drivers/net/mlx5/windows/mlx5_ethdev_os.c +++ b/drivers/net/mlx5/windows/mlx5_ethdev_os.c @@ -85,6 +85,8 @@ mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[MLX5_NAMESIZE]) int mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu) { + int err; + uint32_t curr_mtu; struct mlx5_priv *priv; mlx5_context_st *context_obj; @@ -94,7 +96,14 @@ mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu) } priv = dev->data->dev_private; context_obj = (mlx5_context_st *)priv->sh->cdev->ctx; - *mtu = context_obj->mlx5_dev.mtu_bytes; + + err = mlx5_glue->devx_get_mtu(context_obj, &curr_mtu); + if (err != 0) { + DRV_LOG(WARNING, "Could not get the MTU!"); + return err; + } + *mtu = (uint16_t)curr_mtu; + return 0; } @@ -112,9 +121,23 @@ mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu) int mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) { - RTE_SET_USED(dev); - RTE_SET_USED(mtu); - return -ENOTSUP; + int err; + struct mlx5_priv *priv; + mlx5_context_st *context_obj; + + if (!dev) { + rte_errno = EINVAL; + return -rte_errno; + } + priv = dev->data->dev_private; + context_obj = (mlx5_context_st *)priv->sh->cdev->ctx; + + err = mlx5_glue->devx_set_mtu(context_obj, mtu); + if (err != 0) { + DRV_LOG(WARNING, "Could not set the MTU!"); + return err; + } + return 0; } /*