From patchwork Thu May 5 12:27:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 110699 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5F29AA04FF; Thu, 5 May 2022 14:28:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8493F4283F; Thu, 5 May 2022 14:28:19 +0200 (CEST) Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by mails.dpdk.org (Postfix) with ESMTP id 4B53F40E2D; Thu, 5 May 2022 14:28:12 +0200 (CEST) Received: from kwepemi500012.china.huawei.com (unknown [172.30.72.54]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4KvCcl5lJmzfbDm; Thu, 5 May 2022 20:27:03 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by kwepemi500012.china.huawei.com (7.221.188.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 5 May 2022 20:28:08 +0800 From: "Min Hu (Connor)" To: CC: Huisong Li , , Min Hu , Yisen Zhuang , Lijun Ou Subject: [PATCH v2 1/7] net/hns3: fix order of clearing imissed register in PF Date: Thu, 5 May 2022 20:27:01 +0800 Message-ID: <20220505122707.61182-2-humin29@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220505122707.61182-1-humin29@huawei.com> References: <20220406092240.52900-1-humin29@huawei.com> <20220505122707.61182-1-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500012.china.huawei.com (7.221.188.12) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Huisong Li Clearing imissed registers in PF hardware depends on the 'drop_stats_mode' in struct hns3_hw. The variable is initialized after the "hns3_get_configuration". But, in current code, the clearing operation runs before the function. So this patch fixes this order. In addition, this patch extracts a public function to initialize and uninitialize statistics to improve the maintainability of these codes. Fixes: 3e9f3042d7c8 ("net/hns3: add imissed packet stats") Cc: stable@dpdk.org Signed-off-by: Huisong Li Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_ethdev.c | 13 +++---------- drivers/net/hns3/hns3_ethdev_vf.c | 13 +++---------- drivers/net/hns3/hns3_stats.c | 27 ++++++++++++++++++++++++--- drivers/net/hns3/hns3_stats.h | 5 ++--- 4 files changed, 32 insertions(+), 26 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 4e089e682f..5aed7046d8 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -4622,13 +4622,6 @@ hns3_init_pf(struct rte_eth_dev *eth_dev) goto err_cmd_init; } - /* Hardware statistics of imissed registers cleared. */ - ret = hns3_update_imissed_stats(hw, true); - if (ret) { - hns3_err(hw, "clear imissed stats failed, ret = %d", ret); - goto err_cmd_init; - } - hns3_config_all_msix_error(hw, true); ret = rte_intr_callback_register(pci_dev->intr_handle, @@ -4654,7 +4647,7 @@ hns3_init_pf(struct rte_eth_dev *eth_dev) goto err_get_config; } - ret = hns3_tqp_stats_init(hw); + ret = hns3_stats_init(hw); if (ret) goto err_get_config; @@ -4700,7 +4693,7 @@ hns3_init_pf(struct rte_eth_dev *eth_dev) err_fdir: hns3_uninit_umv_space(hw); err_init_hw: - hns3_tqp_stats_uninit(hw); + hns3_stats_uninit(hw); err_get_config: hns3_pf_disable_irq0(hw); rte_intr_disable(pci_dev->intr_handle); @@ -4734,7 +4727,7 @@ hns3_uninit_pf(struct rte_eth_dev *eth_dev) hns3_flow_uninit(eth_dev); hns3_fdir_filter_uninit(hns); hns3_uninit_umv_space(hw); - hns3_tqp_stats_uninit(hw); + hns3_stats_uninit(hw); hns3_config_mac_tnl_int(hw, false); hns3_pf_disable_irq0(hw); rte_intr_disable(pci_dev->intr_handle); diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index 9091706fe5..9e9fdc4144 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -1510,17 +1510,10 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev) goto err_get_config; } - ret = hns3_tqp_stats_init(hw); + ret = hns3_stats_init(hw); if (ret) goto err_get_config; - /* Hardware statistics of imissed registers cleared. */ - ret = hns3_update_imissed_stats(hw, true); - if (ret) { - hns3_err(hw, "clear imissed stats failed, ret = %d", ret); - goto err_set_tc_queue; - } - ret = hns3_queue_to_tc_mapping(hw, hw->tqps_num, hw->tqps_num); if (ret) { PMD_INIT_LOG(ERR, "failed to set tc info, ret = %d.", ret); @@ -1548,7 +1541,7 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev) return 0; err_set_tc_queue: - hns3_tqp_stats_uninit(hw); + hns3_stats_uninit(hw); err_get_config: hns3vf_disable_irq0(hw); @@ -1579,7 +1572,7 @@ hns3vf_uninit_vf(struct rte_eth_dev *eth_dev) (void)hns3vf_set_alive(hw, false); (void)hns3vf_set_promisc_mode(hw, false, false, false); hns3_flow_uninit(eth_dev); - hns3_tqp_stats_uninit(hw); + hns3_stats_uninit(hw); hns3vf_disable_irq0(hw); rte_intr_disable(pci_dev->intr_handle); hns3_intr_unregister(pci_dev->intr_handle, hns3vf_interrupt_handler, diff --git a/drivers/net/hns3/hns3_stats.c b/drivers/net/hns3/hns3_stats.c index 806720faff..e4a5dcf2f8 100644 --- a/drivers/net/hns3/hns3_stats.c +++ b/drivers/net/hns3/hns3_stats.c @@ -540,7 +540,7 @@ hns3_update_port_tx_ssu_drop_stats(struct hns3_hw *hw) return 0; } -int +static int hns3_update_imissed_stats(struct hns3_hw *hw, bool is_clear) { struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw); @@ -1476,7 +1476,7 @@ hns3_dev_xstats_reset(struct rte_eth_dev *dev) return 0; } -int +static int hns3_tqp_stats_init(struct hns3_hw *hw) { struct hns3_tqp_stats *tqp_stats = &hw->tqp_stats; @@ -1500,7 +1500,7 @@ hns3_tqp_stats_init(struct hns3_hw *hw) return 0; } -void +static void hns3_tqp_stats_uninit(struct hns3_hw *hw) { struct hns3_tqp_stats *tqp_stats = &hw->tqp_stats; @@ -1521,3 +1521,24 @@ hns3_tqp_stats_clear(struct hns3_hw *hw) memset(stats->rcb_rx_ring_pktnum, 0, sizeof(uint64_t) * hw->tqps_num); memset(stats->rcb_tx_ring_pktnum, 0, sizeof(uint64_t) * hw->tqps_num); } + +int +hns3_stats_init(struct hns3_hw *hw) +{ + int ret; + + /* Hardware statistics of imissed registers cleared. */ + ret = hns3_update_imissed_stats(hw, true); + if (ret) { + hns3_err(hw, "clear imissed stats failed, ret = %d", ret); + return ret; + } + + return hns3_tqp_stats_init(hw); +} + +void +hns3_stats_uninit(struct hns3_hw *hw) +{ + hns3_tqp_stats_uninit(hw); +} diff --git a/drivers/net/hns3/hns3_stats.h b/drivers/net/hns3/hns3_stats.h index c81d351082..e89dc97632 100644 --- a/drivers/net/hns3/hns3_stats.h +++ b/drivers/net/hns3/hns3_stats.h @@ -161,9 +161,8 @@ int hns3_dev_xstats_get_names_by_id(struct rte_eth_dev *dev, struct rte_eth_xstat_name *xstats_names, uint32_t size); int hns3_stats_reset(struct rte_eth_dev *dev); -int hns3_tqp_stats_init(struct hns3_hw *hw); -void hns3_tqp_stats_uninit(struct hns3_hw *hw); -int hns3_update_imissed_stats(struct hns3_hw *hw, bool is_clear); +int hns3_stats_init(struct hns3_hw *hw); +void hns3_stats_uninit(struct hns3_hw *hw); int hns3_query_mac_stats_reg_num(struct hns3_hw *hw); #endif /* _HNS3_STATS_H_ */ From patchwork Thu May 5 12:27:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 110696 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4A4DFA04FF; Thu, 5 May 2022 14:28:17 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 438BF427F1; Thu, 5 May 2022 14:28:15 +0200 (CEST) Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by mails.dpdk.org (Postfix) with ESMTP id 9757240E5A; Thu, 5 May 2022 14:28:12 +0200 (CEST) Received: from kwepemi500012.china.huawei.com (unknown [172.30.72.56]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4KvCdc0XHmzhYrm; Thu, 5 May 2022 20:27:48 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by kwepemi500012.china.huawei.com (7.221.188.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 5 May 2022 20:28:09 +0800 From: "Min Hu (Connor)" To: CC: Huisong Li , , Min Hu , Yisen Zhuang , Lijun Ou , Hao Chen , "Wei Hu (Xavier)" , Chunsong Feng , Ferruh Yigit Subject: [PATCH v2 2/7] net/hns3: fix MAC and queues HW statistics overflow Date: Thu, 5 May 2022 20:27:02 +0800 Message-ID: <20220505122707.61182-3-humin29@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220505122707.61182-1-humin29@huawei.com> References: <20220406092240.52900-1-humin29@huawei.com> <20220505122707.61182-1-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500012.china.huawei.com (7.221.188.12) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Huisong Li The MAC and queues statistics are 32-bit registers in hardware. If hardware statistics are not obtained for a long time, these statistics will be overflow. So PF and VF driver have to periodically obtain and save these statistics. Since the periodical task and the stats API are in different threads, we introduce a statistics lock to protect the statistics. Fixes: 8839c5e202f3 ("net/hns3: support device stats") Cc: stable@dpdk.org Signed-off-by: Huisong Li Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_ethdev.c | 6 +- drivers/net/hns3/hns3_ethdev.h | 6 ++ drivers/net/hns3/hns3_ethdev_vf.c | 6 +- drivers/net/hns3/hns3_stats.c | 144 +++++++++++++++++++++--------- drivers/net/hns3/hns3_stats.h | 1 + 5 files changed, 116 insertions(+), 47 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 5aed7046d8..1d9b19d83e 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -4364,10 +4364,12 @@ hns3_service_handler(void *param) struct hns3_adapter *hns = eth_dev->data->dev_private; struct hns3_hw *hw = &hns->hw; - if (!hns3_is_reset_pending(hns)) + if (!hns3_is_reset_pending(hns)) { hns3_update_linkstatus_and_event(hw, true); - else + hns3_update_hw_stats(hw); + } else { hns3_warn(hw, "Cancel the query when reset is pending"); + } rte_eal_alarm_set(HNS3_SERVICE_INTERVAL, hns3_service_handler, eth_dev); } diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index 9a0fa09b57..56f2cdd2cd 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -503,6 +503,12 @@ struct hns3_hw { uint32_t mac_stats_reg_num; struct hns3_rx_missed_stats imissed_stats; uint64_t oerror_stats; + /* + * The lock is used to protect statistics update in stats APIs and + * periodic task. + */ + rte_spinlock_t stats_lock; + uint32_t fw_version; uint16_t pf_vf_if_version; /* version of communication interface */ diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index 9e9fdc4144..f641e0dc36 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -1337,10 +1337,12 @@ hns3vf_service_handler(void *param) * Before querying the link status, check whether there is a reset * pending, and if so, abandon the query. */ - if (!hns3vf_is_reset_pending(hns)) + if (!hns3vf_is_reset_pending(hns)) { hns3vf_request_link_info(hw); - else + hns3_update_hw_stats(hw); + } else { hns3_warn(hw, "Cancel the query when reset is pending"); + } rte_eal_alarm_set(HNS3VF_SERVICE_INTERVAL, hns3vf_service_handler, eth_dev); diff --git a/drivers/net/hns3/hns3_stats.c b/drivers/net/hns3/hns3_stats.c index e4a5dcf2f8..2799ff4432 100644 --- a/drivers/net/hns3/hns3_stats.c +++ b/drivers/net/hns3/hns3_stats.c @@ -584,6 +584,28 @@ hns3_update_oerror_stats(struct hns3_hw *hw, bool is_clear) return 0; } +static void +hns3_rcb_rx_ring_stats_get(struct hns3_rx_queue *rxq, + struct hns3_tqp_stats *stats) +{ + uint32_t cnt; + + cnt = hns3_read_dev(rxq, HNS3_RING_RX_PKTNUM_RECORD_REG); + stats->rcb_rx_ring_pktnum_rcd += cnt; + stats->rcb_rx_ring_pktnum[rxq->queue_id] += cnt; +} + +static void +hns3_rcb_tx_ring_stats_get(struct hns3_tx_queue *txq, + struct hns3_tqp_stats *stats) +{ + uint32_t cnt; + + cnt = hns3_read_dev(txq, HNS3_RING_TX_PKTNUM_RECORD_REG); + stats->rcb_tx_ring_pktnum_rcd += cnt; + stats->rcb_tx_ring_pktnum[txq->queue_id] += cnt; +} + /* * Query tqp tx queue statistics ,opcode id: 0x0B03. * Query tqp rx queue statistics ,opcode id: 0x0B13. @@ -604,16 +626,14 @@ hns3_stats_get(struct rte_eth_dev *eth_dev, struct rte_eth_stats *rte_stats) struct hns3_tqp_stats *stats = &hw->tqp_stats; struct hns3_rx_queue *rxq; struct hns3_tx_queue *txq; - uint64_t cnt; uint16_t i; int ret; /* Update imissed stats */ ret = hns3_update_imissed_stats(hw, false); if (ret) { - hns3_err(hw, "update imissed stats failed, ret = %d", - ret); - return ret; + hns3_err(hw, "update imissed stats failed, ret = %d", ret); + goto out; } rte_stats->imissed = imissed_stats->rpu_rx_drop_cnt + imissed_stats->ssu_rx_drop_cnt; @@ -624,15 +644,12 @@ hns3_stats_get(struct rte_eth_dev *eth_dev, struct rte_eth_stats *rte_stats) if (rxq == NULL) continue; - cnt = hns3_read_dev(rxq, HNS3_RING_RX_PKTNUM_RECORD_REG); - /* - * Read hardware and software in adjacent positions to minimize - * the timing variance. - */ + rte_spinlock_lock(&hw->stats_lock); + hns3_rcb_rx_ring_stats_get(rxq, stats); + rte_spinlock_unlock(&hw->stats_lock); + rte_stats->ierrors += rxq->err_stats.l2_errors + rxq->err_stats.pkt_len_errors; - stats->rcb_rx_ring_pktnum_rcd += cnt; - stats->rcb_rx_ring_pktnum[i] += cnt; rte_stats->ibytes += rxq->basic_stats.bytes; } @@ -642,17 +659,16 @@ hns3_stats_get(struct rte_eth_dev *eth_dev, struct rte_eth_stats *rte_stats) if (txq == NULL) continue; - cnt = hns3_read_dev(txq, HNS3_RING_TX_PKTNUM_RECORD_REG); - stats->rcb_tx_ring_pktnum_rcd += cnt; - stats->rcb_tx_ring_pktnum[i] += cnt; + rte_spinlock_lock(&hw->stats_lock); + hns3_rcb_tx_ring_stats_get(txq, stats); + rte_spinlock_unlock(&hw->stats_lock); rte_stats->obytes += txq->basic_stats.bytes; } ret = hns3_update_oerror_stats(hw, false); if (ret) { - hns3_err(hw, "update oerror stats failed, ret = %d", - ret); - return ret; + hns3_err(hw, "update oerror stats failed, ret = %d", ret); + goto out; } rte_stats->oerrors = hw->oerror_stats; @@ -667,8 +683,8 @@ hns3_stats_get(struct rte_eth_dev *eth_dev, struct rte_eth_stats *rte_stats) rte_stats->opackets = stats->rcb_tx_ring_pktnum_rcd - rte_stats->oerrors; rte_stats->rx_nombuf = eth_dev->data->rx_mbuf_alloc_failed; - - return 0; +out: + return ret; } int @@ -688,7 +704,7 @@ hns3_stats_reset(struct rte_eth_dev *eth_dev) ret = hns3_update_imissed_stats(hw, true); if (ret) { hns3_err(hw, "clear imissed stats failed, ret = %d", ret); - return ret; + goto out; } /* @@ -697,9 +713,8 @@ hns3_stats_reset(struct rte_eth_dev *eth_dev) */ ret = hns3_update_oerror_stats(hw, true); if (ret) { - hns3_err(hw, "clear oerror stats failed, ret = %d", - ret); - return ret; + hns3_err(hw, "clear oerror stats failed, ret = %d", ret); + goto out; } for (i = 0; i < eth_dev->data->nb_rx_queues; i++) { @@ -717,6 +732,7 @@ hns3_stats_reset(struct rte_eth_dev *eth_dev) if (rxq == NULL) continue; + rte_spinlock_lock(&hw->stats_lock); memset(&rxq->basic_stats, 0, sizeof(struct hns3_rx_basic_stats)); @@ -724,6 +740,7 @@ hns3_stats_reset(struct rte_eth_dev *eth_dev) (void)hns3_read_dev(rxq, HNS3_RING_RX_PKTNUM_RECORD_REG); rxq->err_stats.pkt_len_errors = 0; rxq->err_stats.l2_errors = 0; + rte_spinlock_unlock(&hw->stats_lock); } /* Clear all the stats of a txq in a loop to keep them synchronized */ @@ -732,16 +749,20 @@ hns3_stats_reset(struct rte_eth_dev *eth_dev) if (txq == NULL) continue; + rte_spinlock_lock(&hw->stats_lock); memset(&txq->basic_stats, 0, sizeof(struct hns3_tx_basic_stats)); /* This register is read-clear */ (void)hns3_read_dev(txq, HNS3_RING_TX_PKTNUM_RECORD_REG); + rte_spinlock_unlock(&hw->stats_lock); } + rte_spinlock_lock(&hw->stats_lock); hns3_tqp_stats_clear(hw); - - return 0; + rte_spinlock_unlock(&hw->stats_lock); +out: + return ret; } static int @@ -908,7 +929,6 @@ hns3_rxq_basic_stats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, struct hns3_rx_basic_stats *rxq_stats; struct hns3_rx_queue *rxq; uint16_t i, j; - uint32_t cnt; char *val; for (i = 0; i < dev->data->nb_rx_queues; i++) { @@ -916,16 +936,10 @@ hns3_rxq_basic_stats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, if (rxq == NULL) continue; - cnt = hns3_read_dev(rxq, HNS3_RING_RX_PKTNUM_RECORD_REG); - /* - * Read hardware and software in adjacent positions to minimize - * the time difference. - */ + hns3_rcb_rx_ring_stats_get(rxq, stats); rxq_stats = &rxq->basic_stats; rxq_stats->errors = rxq->err_stats.l2_errors + rxq->err_stats.pkt_len_errors; - stats->rcb_rx_ring_pktnum_rcd += cnt; - stats->rcb_rx_ring_pktnum[i] += cnt; /* * If HW statistics are reset by stats_reset, but a lot of @@ -955,7 +969,6 @@ hns3_txq_basic_stats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, struct hns3_tx_basic_stats *txq_stats; struct hns3_tx_queue *txq; uint16_t i, j; - uint32_t cnt; char *val; for (i = 0; i < dev->data->nb_tx_queues; i++) { @@ -963,9 +976,7 @@ hns3_txq_basic_stats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, if (txq == NULL) continue; - cnt = hns3_read_dev(txq, HNS3_RING_TX_PKTNUM_RECORD_REG); - stats->rcb_tx_ring_pktnum_rcd += cnt; - stats->rcb_tx_ring_pktnum[i] += cnt; + hns3_rcb_tx_ring_stats_get(txq, stats); txq_stats = &txq->basic_stats; txq_stats->packets = stats->rcb_tx_ring_pktnum[i]; @@ -1050,6 +1061,7 @@ hns3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, count = 0; + rte_spinlock_lock(&hw->stats_lock); hns3_tqp_basic_stats_get(dev, xstats, &count); if (!hns->is_vf) { @@ -1057,6 +1069,7 @@ hns3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, ret = hns3_query_update_mac_stats(dev); if (ret < 0) { hns3_err(hw, "Update Mac stats fail : %d", ret); + rte_spinlock_unlock(&hw->stats_lock); return ret; } @@ -1068,11 +1081,11 @@ hns3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, count++; } } + rte_spinlock_unlock(&hw->stats_lock); ret = hns3_update_imissed_stats(hw, false); if (ret) { - hns3_err(hw, "update imissed stats failed, ret = %d", - ret); + hns3_err(hw, "update imissed stats failed, ret = %d", ret); return ret; } @@ -1101,8 +1114,10 @@ hns3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, } } + rte_spinlock_lock(&hw->stats_lock); hns3_tqp_dfx_stats_get(dev, xstats, &count); hns3_queue_stats_get(dev, xstats, &count); + rte_spinlock_unlock(&hw->stats_lock); return count; } @@ -1453,6 +1468,7 @@ int hns3_dev_xstats_reset(struct rte_eth_dev *dev) { struct hns3_adapter *hns = dev->data->dev_private; + struct hns3_hw *hw = &hns->hw; int ret; /* Clear tqp stats */ @@ -1460,20 +1476,22 @@ hns3_dev_xstats_reset(struct rte_eth_dev *dev) if (ret) return ret; + rte_spinlock_lock(&hw->stats_lock); hns3_tqp_dfx_stats_clear(dev); /* Clear reset stats */ memset(&hns->hw.reset.stats, 0, sizeof(struct hns3_reset_stats)); if (hns->is_vf) - return 0; + goto out; /* HW registers are cleared on read */ ret = hns3_mac_stats_reset(dev); - if (ret) - return ret; - return 0; +out: + rte_spinlock_unlock(&hw->stats_lock); + + return ret; } static int @@ -1527,6 +1545,7 @@ hns3_stats_init(struct hns3_hw *hw) { int ret; + rte_spinlock_init(&hw->stats_lock); /* Hardware statistics of imissed registers cleared. */ ret = hns3_update_imissed_stats(hw, true); if (ret) { @@ -1542,3 +1561,42 @@ hns3_stats_uninit(struct hns3_hw *hw) { hns3_tqp_stats_uninit(hw); } + +static void +hns3_update_queues_stats(struct hns3_hw *hw) +{ + struct rte_eth_dev_data *data = hw->data; + struct hns3_rx_queue *rxq; + struct hns3_tx_queue *txq; + uint16_t i; + + for (i = 0; i < data->nb_rx_queues; i++) { + rxq = data->rx_queues[i]; + if (rxq != NULL) + hns3_rcb_rx_ring_stats_get(rxq, &hw->tqp_stats); + } + + for (i = 0; i < data->nb_tx_queues; i++) { + txq = data->tx_queues[i]; + if (txq != NULL) + hns3_rcb_tx_ring_stats_get(txq, &hw->tqp_stats); + } +} + +/* + * Some hardware statistics registers are not 64-bit. If hardware statistics are + * not obtained for a long time, these statistics may be reversed. This function + * is used to update these hardware statistics in periodic task. + */ +void +hns3_update_hw_stats(struct hns3_hw *hw) +{ + struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw); + + rte_spinlock_lock(&hw->stats_lock); + if (!hns->is_vf) + hns3_update_mac_stats(hw); + + hns3_update_queues_stats(hw); + rte_spinlock_unlock(&hw->stats_lock); +} diff --git a/drivers/net/hns3/hns3_stats.h b/drivers/net/hns3/hns3_stats.h index e89dc97632..b5cd6188b4 100644 --- a/drivers/net/hns3/hns3_stats.h +++ b/drivers/net/hns3/hns3_stats.h @@ -164,5 +164,6 @@ int hns3_stats_reset(struct rte_eth_dev *dev); int hns3_stats_init(struct hns3_hw *hw); void hns3_stats_uninit(struct hns3_hw *hw); int hns3_query_mac_stats_reg_num(struct hns3_hw *hw); +void hns3_update_hw_stats(struct hns3_hw *hw); #endif /* _HNS3_STATS_H_ */ From patchwork Thu May 5 12:27:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 110697 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 937DBA04FF; Thu, 5 May 2022 14:28:27 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 992AD4282D; Thu, 5 May 2022 14:28:16 +0200 (CEST) Received: from szxga08-in.huawei.com (szxga08-in.huawei.com [45.249.212.255]) by mails.dpdk.org (Postfix) with ESMTP id C237A40E5A; Thu, 5 May 2022 14:28:14 +0200 (CEST) Received: from kwepemi500012.china.huawei.com (unknown [172.30.72.53]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4KvCcp4rhYz1JBdk; Thu, 5 May 2022 20:27:06 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by kwepemi500012.china.huawei.com (7.221.188.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 5 May 2022 20:28:10 +0800 From: "Min Hu (Connor)" To: CC: Huisong Li , , Min Hu , Yisen Zhuang , Lijun Ou , Chengwen Feng Subject: [PATCH v2 3/7] net/hns3: fix pseudo-sharing between threads Date: Thu, 5 May 2022 20:27:03 +0800 Message-ID: <20220505122707.61182-4-humin29@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220505122707.61182-1-humin29@huawei.com> References: <20220406092240.52900-1-humin29@huawei.com> <20220505122707.61182-1-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500012.china.huawei.com (7.221.188.12) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Huisong Li Some fields in the end of 'struct hns3_rx_queue' and 'struct hns3_tx_queue' are not accessed in the I/O path. But these fields may be accessed in other threads, which may lead to the problem of cache pseudo-sharing of IO threads. This patch add a cacheline alignment to avoid it. Fixes: 9261fd3caf1f ("net/hns3: improve IO path data cache usage") Cc: stable@dpdk.org Signed-off-by: Huisong Li Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_rxtx.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h index a000318357..62efc854e4 100644 --- a/drivers/net/hns3/hns3_rxtx.h +++ b/drivers/net/hns3/hns3_rxtx.h @@ -348,7 +348,7 @@ struct hns3_rx_queue { * The following fields are not accessed in the I/O path, so they are * placed at the end. */ - void *io_base; + void *io_base __rte_cache_aligned; struct hns3_adapter *hns; uint64_t rx_ring_phys_addr; /* RX ring DMA address */ const struct rte_memzone *mz; @@ -521,7 +521,7 @@ struct hns3_tx_queue { * The following fields are not accessed in the I/O path, so they are * placed at the end. */ - void *io_base; + void *io_base __rte_cache_aligned; struct hns3_adapter *hns; uint64_t tx_ring_phys_addr; /* TX ring DMA address */ const struct rte_memzone *mz; From patchwork Thu May 5 12:27:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 110700 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 83D01A04FF; Thu, 5 May 2022 14:28:49 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 81D5D42844; Thu, 5 May 2022 14:28:20 +0200 (CEST) Received: from szxga08-in.huawei.com (szxga08-in.huawei.com [45.249.212.255]) by mails.dpdk.org (Postfix) with ESMTP id 55BA542830; Thu, 5 May 2022 14:28:18 +0200 (CEST) Received: from kwepemi500012.china.huawei.com (unknown [172.30.72.54]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4KvCcq5TPRz1JBqH; Thu, 5 May 2022 20:27:07 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by kwepemi500012.china.huawei.com (7.221.188.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 5 May 2022 20:28:11 +0800 From: "Min Hu (Connor)" To: CC: Chengwen Feng , , Min Hu , Yisen Zhuang , Lijun Ou Subject: [PATCH v2 4/7] net/hns3: fix more mbufs are freed when Tx done cleanup Date: Thu, 5 May 2022 20:27:04 +0800 Message-ID: <20220505122707.61182-5-humin29@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220505122707.61182-1-humin29@huawei.com> References: <20220406092240.52900-1-humin29@huawei.com> <20220505122707.61182-1-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500012.china.huawei.com (7.221.188.12) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Chengwen Feng Currently, the hns3 PMD may free more mbufs than free_cnt parameter, this is an incorrect implementation. This patch fixes it. Fixes: 0b77e8f3d364 ("net/hns3: optimize Tx performance") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_rxtx.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index a28de06dfd..0c91e4721e 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -4595,7 +4595,7 @@ hns3_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) static int hns3_tx_done_cleanup_full(struct hns3_tx_queue *txq, uint32_t free_cnt) { - uint16_t round_free_cnt; + uint16_t round_cnt; uint32_t idx; if (free_cnt == 0 || free_cnt > txq->nb_tx_desc) @@ -4604,13 +4604,13 @@ hns3_tx_done_cleanup_full(struct hns3_tx_queue *txq, uint32_t free_cnt) if (txq->tx_rs_thresh == 0) return 0; - round_free_cnt = roundup(free_cnt, txq->tx_rs_thresh); - for (idx = 0; idx < round_free_cnt; idx += txq->tx_rs_thresh) { + round_cnt = rounddown(free_cnt, txq->tx_rs_thresh); + for (idx = 0; idx < round_cnt; idx += txq->tx_rs_thresh) { if (hns3_tx_free_useless_buffer(txq) != 0) break; } - return RTE_MIN(idx, free_cnt); + return idx; } int From patchwork Thu May 5 12:27:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 110702 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 75732A04FF; Thu, 5 May 2022 14:29:02 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8884A42855; Thu, 5 May 2022 14:28:22 +0200 (CEST) Received: from szxga03-in.huawei.com (szxga03-in.huawei.com [45.249.212.189]) by mails.dpdk.org (Postfix) with ESMTP id 1EBF040E2D; Thu, 5 May 2022 14:28:18 +0200 (CEST) Received: from kwepemi500012.china.huawei.com (unknown [172.30.72.56]) by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4KvCXh39h0zHnVB; Thu, 5 May 2022 20:23:32 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by kwepemi500012.china.huawei.com (7.221.188.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 5 May 2022 20:28:13 +0800 From: "Min Hu (Connor)" To: CC: Huisong Li , , Min Hu , Yisen Zhuang , Lijun Ou , Hao Chen , Chunsong Feng , "Wei Hu (Xavier)" Subject: [PATCH v2 5/7] net/hns3: fix RSS disable Date: Thu, 5 May 2022 20:27:05 +0800 Message-ID: <20220505122707.61182-6-humin29@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220505122707.61182-1-humin29@huawei.com> References: <20220406092240.52900-1-humin29@huawei.com> <20220505122707.61182-1-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500012.china.huawei.com (7.221.188.12) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Huisong Li Currently, hns3 PMD disable RSS by resetting redirection table when user set rss_hf to 0 so as to all packets go to queue 0. The implementation may cause following problems: 1) the same type packet may go to different queue on the case of disabling all tuples and partial tuples. The problem is determined by hardware design. 2) affect the configuration of redirection table and user experience. For hns3 hardware, the packets with RSS disabled are always go to the queue corresponding to first entry of the redirection table. Generally, disable RSS should be implemented by disabling all tuples, This patch fix the implementation. Fixes: c37ca66f2b27 ("net/hns3: support RSS") Cc: stable@dpdk.org Signed-off-by: Huisong Li Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_ethdev.c | 1 - drivers/net/hns3/hns3_flow.c | 6 +-- drivers/net/hns3/hns3_rss.c | 93 +++++++--------------------------- 3 files changed, 18 insertions(+), 82 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 1d9b19d83e..4d5a595aab 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -2015,7 +2015,6 @@ hns3_dev_configure(struct rte_eth_dev *dev) goto cfg_err; } - /* When RSS is not configured, redirect the packet queue 0 */ if ((uint32_t)mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) { conf->rxmode.offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH; rss_conf = conf->rx_adv_conf.rss_conf; diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c index aba07aaa6f..feabac9f41 100644 --- a/drivers/net/hns3/hns3_flow.c +++ b/drivers/net/hns3/hns3_flow.c @@ -1446,13 +1446,9 @@ hns3_disable_rss(struct hns3_hw *hw) { int ret; - /* Redirected the redirection table to queue 0 */ - ret = hns3_rss_reset_indir_table(hw); + ret = hns3_set_rss_tuple_by_rss_hf(hw, &hw->rss_info.rss_tuple_sets, 0); if (ret) return ret; - - /* Disable RSS */ - hw->rss_info.conf.types = 0; hw->rss_dis_flag = true; return 0; diff --git a/drivers/net/hns3/hns3_rss.c b/drivers/net/hns3/hns3_rss.c index 1493b10f96..1c703952b9 100644 --- a/drivers/net/hns3/hns3_rss.c +++ b/drivers/net/hns3/hns3_rss.c @@ -237,31 +237,6 @@ hns3_rss_set_algo_key(struct hns3_hw *hw, const uint8_t *key) return 0; } -/* - * Used to configure the tuple selection for RSS hash input. - */ -static int -hns3_rss_set_input_tuple(struct hns3_hw *hw) -{ - struct hns3_rss_conf *rss_config = &hw->rss_info; - struct hns3_rss_input_tuple_cmd *req; - struct hns3_cmd_desc desc_tuple; - int ret; - - hns3_cmd_setup_basic_desc(&desc_tuple, HNS3_OPC_RSS_INPUT_TUPLE, false); - - req = (struct hns3_rss_input_tuple_cmd *)desc_tuple.data; - - req->tuple_field = - rte_cpu_to_le_64(rss_config->rss_tuple_sets.rss_tuple_fields); - - ret = hns3_cmd_send(hw, &desc_tuple, 1); - if (ret) - hns3_err(hw, "Configure RSS input tuple mode failed %d", ret); - - return ret; -} - /* * rss_indirection_table command function, opcode:0x0D07. * Used to configure the indirection table of rss. @@ -382,6 +357,8 @@ hns3_set_rss_tuple_by_rss_hf(struct hns3_hw *hw, } tuple->rss_tuple_fields = rte_le_to_cpu_64(req->tuple_field); + /* Update supported flow types when set tuple success */ + hw->rss_info.conf.types = rss_hf; return 0; } @@ -402,7 +379,6 @@ hns3_dev_rss_hash_update(struct rte_eth_dev *dev, struct hns3_adapter *hns = dev->data->dev_private; struct hns3_hw *hw = &hns->hw; struct hns3_rss_tuple_cfg *tuple = &hw->rss_info.rss_tuple_sets; - struct hns3_rss_conf *rss_cfg = &hw->rss_info; uint8_t key_len = rss_conf->rss_key_len; uint64_t rss_hf = rss_conf->rss_hf; uint8_t *key = rss_conf->rss_key; @@ -416,22 +392,6 @@ hns3_dev_rss_hash_update(struct rte_eth_dev *dev, if (ret) goto conf_err; - if (rss_cfg->conf.types && rss_hf == 0) { - /* Disable RSS, reset indirection table by local variable */ - ret = hns3_rss_reset_indir_table(hw); - if (ret) - goto conf_err; - } else if (rss_hf && rss_cfg->conf.types == 0) { - /* Enable RSS, restore indirection table by hw's config */ - ret = hns3_set_rss_indir_table(hw, rss_cfg->rss_indirection_tbl, - hw->rss_ind_tbl_size); - if (ret) - goto conf_err; - } - - /* Update supported flow types when set tuple success */ - rss_cfg->conf.types = rss_hf; - if (key) { if (key_len != HNS3_RSS_KEY_SIZE) { hns3_err(hw, "The hash key len(%u) is invalid", @@ -697,7 +657,8 @@ hns3_config_rss(struct hns3_adapter *hns) struct hns3_hw *hw = &hns->hw; struct hns3_rss_conf *rss_cfg = &hw->rss_info; uint8_t *hash_key = rss_cfg->key; - int ret, ret1; + uint64_t rss_hf; + int ret; enum rte_eth_rx_mq_mode mq_mode = hw->data->dev_conf.rxmode.mq_mode; @@ -713,51 +674,31 @@ hns3_config_rss(struct hns3_adapter *hns) break; } - /* When RSS is off, redirect the packet queue 0 */ - if (((uint32_t)mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) == 0) - hns3_rss_uninit(hns); - /* Configure RSS hash algorithm and hash key offset */ ret = hns3_rss_set_algo_key(hw, hash_key); if (ret) return ret; - /* Configure the tuple selection for RSS hash input */ - ret = hns3_rss_set_input_tuple(hw); + ret = hns3_set_rss_indir_table(hw, rss_cfg->rss_indirection_tbl, + hw->rss_ind_tbl_size); if (ret) return ret; - /* - * When RSS is off, it doesn't need to configure rss redirection table - * to hardware. - */ - if (((uint32_t)mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) { - ret = hns3_set_rss_indir_table(hw, rss_cfg->rss_indirection_tbl, - hw->rss_ind_tbl_size); - if (ret) - goto rss_tuple_uninit; - } - ret = hns3_set_rss_tc_mode(hw); if (ret) - goto rss_indir_table_uninit; - - return ret; - -rss_indir_table_uninit: - if (((uint32_t)mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) { - ret1 = hns3_rss_reset_indir_table(hw); - if (ret1 != 0) - return ret; - } - -rss_tuple_uninit: - hns3_rss_tuple_uninit(hw); + return ret; - /* Disable RSS */ - hw->rss_info.conf.types = 0; + /* + * When muli-queue RSS mode flag is not set or unsupported tuples are + * set, disable all tuples. + */ + rss_hf = hw->rss_info.conf.types; + if (!((uint32_t)mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) || + !(rss_hf & HNS3_ETH_RSS_SUPPORT)) + rss_hf = 0; - return ret; + return hns3_set_rss_tuple_by_rss_hf(hw, &hw->rss_info.rss_tuple_sets, + rss_hf); } /* From patchwork Thu May 5 12:27:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 110698 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A6806A04FF; Thu, 5 May 2022 14:28:34 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 86E7842836; Thu, 5 May 2022 14:28:18 +0200 (CEST) Received: from szxga03-in.huawei.com (szxga03-in.huawei.com [45.249.212.189]) by mails.dpdk.org (Postfix) with ESMTP id 41BC442830; Thu, 5 May 2022 14:28:17 +0200 (CEST) Received: from kwepemi500012.china.huawei.com (unknown [172.30.72.53]) by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4KvCXj5VzbzHnVD; Thu, 5 May 2022 20:23:33 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by kwepemi500012.china.huawei.com (7.221.188.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 5 May 2022 20:28:14 +0800 From: "Min Hu (Connor)" To: CC: Huisong Li , , Min Hu , Yisen Zhuang , Lijun Ou , Ferruh Yigit , Chunsong Feng , Hao Chen Subject: [PATCH v2 6/7] net/hns3: fix undo rollback when update RSS hash Date: Thu, 5 May 2022 20:27:06 +0800 Message-ID: <20220505122707.61182-7-humin29@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220505122707.61182-1-humin29@huawei.com> References: <20220406092240.52900-1-humin29@huawei.com> <20220505122707.61182-1-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500012.china.huawei.com (7.221.188.12) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Huisong Li The RSS tuple isn't restored when RSS key length is invalid or setting algo key failed. This patch fixes it. Fixes: c37ca66f2b27 ("net/hns3: support RSS") Cc: stable@dpdk.org Signed-off-by: Huisong Li Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_rss.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/net/hns3/hns3_rss.c b/drivers/net/hns3/hns3_rss.c index 1c703952b9..4b2c24ace4 100644 --- a/drivers/net/hns3/hns3_rss.c +++ b/drivers/net/hns3/hns3_rss.c @@ -376,9 +376,9 @@ int hns3_dev_rss_hash_update(struct rte_eth_dev *dev, struct rte_eth_rss_conf *rss_conf) { - struct hns3_adapter *hns = dev->data->dev_private; - struct hns3_hw *hw = &hns->hw; + struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private); struct hns3_rss_tuple_cfg *tuple = &hw->rss_info.rss_tuple_sets; + uint64_t rss_hf_bk = hw->rss_info.conf.types; uint8_t key_len = rss_conf->rss_key_len; uint64_t rss_hf = rss_conf->rss_hf; uint8_t *key = rss_conf->rss_key; @@ -387,27 +387,29 @@ hns3_dev_rss_hash_update(struct rte_eth_dev *dev, if (hw->rss_dis_flag) return -EINVAL; + if (key && key_len != HNS3_RSS_KEY_SIZE) { + hns3_err(hw, "the hash key len(%u) is invalid, must be %u", + key_len, HNS3_RSS_KEY_SIZE); + return -EINVAL; + } + rte_spinlock_lock(&hw->lock); ret = hns3_set_rss_tuple_by_rss_hf(hw, tuple, rss_hf); if (ret) - goto conf_err; + goto set_tuple_fail; if (key) { - if (key_len != HNS3_RSS_KEY_SIZE) { - hns3_err(hw, "The hash key len(%u) is invalid", - key_len); - ret = -EINVAL; - goto conf_err; - } ret = hns3_rss_set_algo_key(hw, key); if (ret) - goto conf_err; + goto set_algo_key_fail; } rte_spinlock_unlock(&hw->lock); return 0; -conf_err: +set_algo_key_fail: + (void)hns3_set_rss_tuple_by_rss_hf(hw, tuple, rss_hf_bk); +set_tuple_fail: rte_spinlock_unlock(&hw->lock); return ret; } From patchwork Thu May 5 12:27:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 110701 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4E907A04FF; Thu, 5 May 2022 14:28:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8D62A42850; Thu, 5 May 2022 14:28:21 +0200 (CEST) Received: from szxga03-in.huawei.com (szxga03-in.huawei.com [45.249.212.189]) by mails.dpdk.org (Postfix) with ESMTP id 3CFD640E5A; Thu, 5 May 2022 14:28:18 +0200 (CEST) Received: from kwepemi500012.china.huawei.com (unknown [172.30.72.55]) by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4KvCXl17NlzHnVS; Thu, 5 May 2022 20:23:35 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by kwepemi500012.china.huawei.com (7.221.188.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 5 May 2022 20:28:16 +0800 From: "Min Hu (Connor)" To: CC: Huisong Li , , Min Hu , Yisen Zhuang , Lijun Ou , Ferruh Yigit , "Wei Hu (Xavier)" , Hao Chen Subject: [PATCH v2 7/7] net/hns3: remove redundant RSS tuple field Date: Thu, 5 May 2022 20:27:07 +0800 Message-ID: <20220505122707.61182-8-humin29@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220505122707.61182-1-humin29@huawei.com> References: <20220406092240.52900-1-humin29@huawei.com> <20220505122707.61182-1-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500012.china.huawei.com (7.221.188.12) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Huisong Li The 'rss_tuple_fields' in struct struct hns3_rss_conf::rss_tuple_sets is redundant. Because the enabled RSS tuple in PMD is already managed by the 'types' in struct hns3_rss_conf::conf. This patch removes this redundant variable. Fixes: c37ca66f2b27 ("net/hns3: support RSS") Cc: stable@dpdk.org Signed-off-by: Huisong Li Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_flow.c | 6 ++---- drivers/net/hns3/hns3_rss.c | 12 ++++-------- drivers/net/hns3/hns3_rss.h | 5 +---- 3 files changed, 7 insertions(+), 16 deletions(-) diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c index feabac9f41..317f91fc71 100644 --- a/drivers/net/hns3/hns3_flow.c +++ b/drivers/net/hns3/hns3_flow.c @@ -1446,7 +1446,7 @@ hns3_disable_rss(struct hns3_hw *hw) { int ret; - ret = hns3_set_rss_tuple_by_rss_hf(hw, &hw->rss_info.rss_tuple_sets, 0); + ret = hns3_set_rss_tuple_by_rss_hf(hw, 0); if (ret) return ret; hw->rss_dis_flag = true; @@ -1496,7 +1496,6 @@ hns3_parse_rss_algorithm(struct hns3_hw *hw, enum rte_eth_hash_function *func, static int hns3_hw_rss_hash_set(struct hns3_hw *hw, struct rte_flow_action_rss *rss_config) { - struct hns3_rss_tuple_cfg *tuple; int ret; hns3_adjust_rss_key(hw, rss_config); @@ -1512,8 +1511,7 @@ hns3_hw_rss_hash_set(struct hns3_hw *hw, struct rte_flow_action_rss *rss_config) hw->rss_info.conf.func = rss_config->func; - tuple = &hw->rss_info.rss_tuple_sets; - ret = hns3_set_rss_tuple_by_rss_hf(hw, tuple, rss_config->types); + ret = hns3_set_rss_tuple_by_rss_hf(hw, rss_config->types); if (ret) hns3_err(hw, "Update RSS tuples by rss hf failed %d", ret); diff --git a/drivers/net/hns3/hns3_rss.c b/drivers/net/hns3/hns3_rss.c index 4b2c24ace4..e149c16bfe 100644 --- a/drivers/net/hns3/hns3_rss.c +++ b/drivers/net/hns3/hns3_rss.c @@ -310,8 +310,7 @@ hns3_rss_reset_indir_table(struct hns3_hw *hw) } int -hns3_set_rss_tuple_by_rss_hf(struct hns3_hw *hw, - struct hns3_rss_tuple_cfg *tuple, uint64_t rss_hf) +hns3_set_rss_tuple_by_rss_hf(struct hns3_hw *hw, uint64_t rss_hf) { struct hns3_rss_input_tuple_cmd *req; struct hns3_cmd_desc desc; @@ -356,7 +355,6 @@ hns3_set_rss_tuple_by_rss_hf(struct hns3_hw *hw, return ret; } - tuple->rss_tuple_fields = rte_le_to_cpu_64(req->tuple_field); /* Update supported flow types when set tuple success */ hw->rss_info.conf.types = rss_hf; @@ -377,7 +375,6 @@ hns3_dev_rss_hash_update(struct rte_eth_dev *dev, struct rte_eth_rss_conf *rss_conf) { struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private); - struct hns3_rss_tuple_cfg *tuple = &hw->rss_info.rss_tuple_sets; uint64_t rss_hf_bk = hw->rss_info.conf.types; uint8_t key_len = rss_conf->rss_key_len; uint64_t rss_hf = rss_conf->rss_hf; @@ -394,7 +391,7 @@ hns3_dev_rss_hash_update(struct rte_eth_dev *dev, } rte_spinlock_lock(&hw->lock); - ret = hns3_set_rss_tuple_by_rss_hf(hw, tuple, rss_hf); + ret = hns3_set_rss_tuple_by_rss_hf(hw, rss_hf); if (ret) goto set_tuple_fail; @@ -408,7 +405,7 @@ hns3_dev_rss_hash_update(struct rte_eth_dev *dev, return 0; set_algo_key_fail: - (void)hns3_set_rss_tuple_by_rss_hf(hw, tuple, rss_hf_bk); + (void)hns3_set_rss_tuple_by_rss_hf(hw, rss_hf_bk); set_tuple_fail: rte_spinlock_unlock(&hw->lock); return ret; @@ -699,8 +696,7 @@ hns3_config_rss(struct hns3_adapter *hns) !(rss_hf & HNS3_ETH_RSS_SUPPORT)) rss_hf = 0; - return hns3_set_rss_tuple_by_rss_hf(hw, &hw->rss_info.rss_tuple_sets, - rss_hf); + return hns3_set_rss_tuple_by_rss_hf(hw, rss_hf); } /* diff --git a/drivers/net/hns3/hns3_rss.h b/drivers/net/hns3/hns3_rss.h index c4121207aa..55d5718ffc 100644 --- a/drivers/net/hns3/hns3_rss.h +++ b/drivers/net/hns3/hns3_rss.h @@ -43,7 +43,6 @@ struct hns3_rss_conf { struct rte_flow_action_rss conf; uint8_t hash_algo; /* hash function type defined by hardware */ uint8_t key[HNS3_RSS_KEY_SIZE]; /* Hash key */ - struct hns3_rss_tuple_cfg rss_tuple_sets; uint16_t rss_indirection_tbl[HNS3_RSS_IND_TBL_SIZE_MAX]; uint16_t queue[HNS3_RSS_QUEUES_BUFFER_NUM]; /* Queues indices to use */ bool valid; /* check if RSS rule is valid */ @@ -107,9 +106,7 @@ int hns3_set_rss_indir_table(struct hns3_hw *hw, uint16_t *indir, int hns3_rss_reset_indir_table(struct hns3_hw *hw); int hns3_config_rss(struct hns3_adapter *hns); void hns3_rss_uninit(struct hns3_adapter *hns); -int hns3_set_rss_tuple_by_rss_hf(struct hns3_hw *hw, - struct hns3_rss_tuple_cfg *tuple, - uint64_t rss_hf); +int hns3_set_rss_tuple_by_rss_hf(struct hns3_hw *hw, uint64_t rss_hf); int hns3_rss_set_algo_key(struct hns3_hw *hw, const uint8_t *key); int hns3_restore_rss_filter(struct rte_eth_dev *dev);