From patchwork Fri Jun 17 18:37:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 113017 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DB5C0A0032; Fri, 17 Jun 2022 20:49:16 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1E6D341614; Fri, 17 Jun 2022 20:49:12 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 5DB0140E2D for ; Fri, 17 Jun 2022 20:49:10 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655491750; x=1687027750; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=4is7k/W0Hz7+Fe4/DXvx0OdifPIOFErXElqXiJ6ErLU=; b=fGS71dW7YqhUCszUkMMPTyejAsddbkqPN5gdJWHLxAMOQ3VBy/RQlgis 5c/ZK8Qxye+p7kn3PQZygZRNQgVYAgIVMw2/P2lBFGqwUHFucfonO4/WD G8Asjq/Hur1eWUXDexE1X1v2V6txJbhacxCOuvHrFxjaQP0X/RaDxnjEu vEqWwIV1jO4zidvuyczyJ7anlyK9/rORIZYas2U0ZsC9/1to8XZGeflII XtJ1coqnKHvqVD7hM8fBKZ0pST86s5MIykNFnAZue5VD89NiQcln6h+Xo 3zVVpXTMO+fu3RzL/vrIVLtZJVzcA3US0eQWMvPtTY4w0ZD8+keUcH3Xk g==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="278333235" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="278333235" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jun 2022 11:49:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="560636023" Received: from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210]) by orsmga006.jf.intel.com with ESMTP; 17 Jun 2022 11:49:08 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com, hemant.agrawal@nxp.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, Nicolas Chautru Subject: [PATCH v2 1/5] bbdev: allow operation type enum for growth Date: Fri, 17 Jun 2022 11:37:16 -0700 Message-Id: <1655491040-183649-2-git-send-email-nicolas.chautru@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1655491040-183649-1-git-send-email-nicolas.chautru@intel.com> References: <1646785355-168133-3-git-send-email-nicolas.chautru@intel.com> <1655491040-183649-1-git-send-email-nicolas.chautru@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Updating the enum for rte_bbdev_op_type to allow to keep ABI compatible for enum insertion while adding padded maximum value for array need. Removing RTE_BBDEV_OP_TYPE_COUNT and instead exposing RTE_BBDEV_OP_TYPE_PADDED_MAX. Signed-off-by: Nicolas Chautru --- app/test-bbdev/test_bbdev.c | 2 +- app/test-bbdev/test_bbdev_perf.c | 4 ++-- examples/bbdev_app/main.c | 2 +- lib/bbdev/rte_bbdev.c | 9 +++++---- lib/bbdev/rte_bbdev_op.h | 2 +- 5 files changed, 10 insertions(+), 9 deletions(-) diff --git a/app/test-bbdev/test_bbdev.c b/app/test-bbdev/test_bbdev.c index ac06d73..1063f6e 100644 --- a/app/test-bbdev/test_bbdev.c +++ b/app/test-bbdev/test_bbdev.c @@ -521,7 +521,7 @@ struct bbdev_testsuite_params { rte_mempool_free(mp); TEST_ASSERT((mp = rte_bbdev_op_pool_create("Test_INV", - RTE_BBDEV_OP_TYPE_COUNT, size, cache_size, 0)) == NULL, + RTE_BBDEV_OP_TYPE_PADDED_MAX, size, cache_size, 0)) == NULL, "Failed test for rte_bbdev_op_pool_create: " "returned value is not NULL for invalid type"); diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c index fad3b1e..1abda2d 100644 --- a/app/test-bbdev/test_bbdev_perf.c +++ b/app/test-bbdev/test_bbdev_perf.c @@ -2428,13 +2428,13 @@ typedef int (test_case_function)(struct active_device *ad, /* Find capabilities */ const struct rte_bbdev_op_cap *cap = info.drv.capabilities; - for (i = 0; i < RTE_BBDEV_OP_TYPE_COUNT; i++) { + do { if (cap->type == test_vector.op_type) { capabilities = cap; break; } cap++; - } + } while (cap->type != RTE_BBDEV_OP_NONE); TEST_ASSERT_NOT_NULL(capabilities, "Couldn't find capabilities"); diff --git a/examples/bbdev_app/main.c b/examples/bbdev_app/main.c index fc7e8b8..ef0ba76 100644 --- a/examples/bbdev_app/main.c +++ b/examples/bbdev_app/main.c @@ -1041,7 +1041,7 @@ uint16_t bbdev_parse_number(const char *mask) void *sigret; struct app_config_params app_params = def_app_config; struct rte_mempool *ethdev_mbuf_mempool, *bbdev_mbuf_mempool; - struct rte_mempool *bbdev_op_pools[RTE_BBDEV_OP_TYPE_COUNT]; + struct rte_mempool *bbdev_op_pools[RTE_BBDEV_OP_TYPE_PADDED_MAX]; struct lcore_conf lcore_conf[RTE_MAX_LCORE] = { {0} }; struct lcore_statistics lcore_stats[RTE_MAX_LCORE] = { {0} }; struct stats_lcore_params stats_lcore; diff --git a/lib/bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c index aaee7b7..22bd894 100644 --- a/lib/bbdev/rte_bbdev.c +++ b/lib/bbdev/rte_bbdev.c @@ -23,6 +23,8 @@ #define DEV_NAME "BBDEV" +/* Number of supported operation types */ +#define BBDEV_OP_TYPE_COUNT 5 /* BBDev library logging ID */ RTE_LOG_REGISTER_DEFAULT(bbdev_logtype, NOTICE); @@ -890,10 +892,10 @@ struct rte_mempool * return NULL; } - if (type >= RTE_BBDEV_OP_TYPE_COUNT) { + if (type >= BBDEV_OP_TYPE_COUNT) { rte_bbdev_log(ERR, "Invalid op type (%u), should be less than %u", - type, RTE_BBDEV_OP_TYPE_COUNT); + type, BBDEV_OP_TYPE_COUNT); return NULL; } @@ -1122,10 +1124,9 @@ struct rte_mempool * "RTE_BBDEV_OP_TURBO_DEC", "RTE_BBDEV_OP_TURBO_ENC", "RTE_BBDEV_OP_LDPC_DEC", - "RTE_BBDEV_OP_LDPC_ENC", }; - if (op_type < RTE_BBDEV_OP_TYPE_COUNT) + if (op_type < BBDEV_OP_TYPE_COUNT) return op_types[op_type]; rte_bbdev_log(ERR, "Invalid operation type"); diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h index 6d56133..cd82418 100644 --- a/lib/bbdev/rte_bbdev_op.h +++ b/lib/bbdev/rte_bbdev_op.h @@ -748,7 +748,7 @@ enum rte_bbdev_op_type { RTE_BBDEV_OP_TURBO_ENC, /**< Turbo encode */ RTE_BBDEV_OP_LDPC_DEC, /**< LDPC decode */ RTE_BBDEV_OP_LDPC_ENC, /**< LDPC encode */ - RTE_BBDEV_OP_TYPE_COUNT, /**< Count of different op types */ + RTE_BBDEV_OP_TYPE_PADDED_MAX = 8, /**< Maximum op type number including padding */ }; /** Bit indexes of possible errors reported through status field */ From patchwork Fri Jun 17 18:37:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 113018 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2E2DDA0032; Fri, 17 Jun 2022 20:49:23 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2816D42802; Fri, 17 Jun 2022 20:49:13 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id A3A6B40F19 for ; Fri, 17 Jun 2022 20:49:10 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655491750; x=1687027750; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=rC07xRFsnJBcDhGGpJ0CYUNPmmY3f0AM0oWsdEYJx4c=; b=FjkYQVhwUc3JyLUK/4Gk5IJtiK+SxvkOI4SS3bSsJpnIdSMewTF+tZW3 YJcs2J0oZKPLuTbSrWJVngO0jKlbUSA/KCU/+/jfz154y6jRROsSHP5fw sbrBh/1TgQFg4KXhH8F0h7Af/rRYYOZZwdZlzWRtPTrPkAutd+jL9jHXG p5SM+ACgdIzpfUpO0FaAL7/yn+u0sWZOgotP2jTG+azyQLdcBKCqsjt45 K4Kr8Layj1n4cbi8hGuKD6ldyIIq+CmvPVs6a1e4anZ5uWIs8yadCCsBt SaGh/JYeW+PRSlbAiOlZeVYeDzHyHXNFNx4kFLfQYEzLETa6l/mlx1xw1 g==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="278333237" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="278333237" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jun 2022 11:49:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="560636027" Received: from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210]) by orsmga006.jf.intel.com with ESMTP; 17 Jun 2022 11:49:08 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com, hemant.agrawal@nxp.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, Nicolas Chautru Subject: [PATCH v2 2/5] bbdev: add device status info Date: Fri, 17 Jun 2022 11:37:17 -0700 Message-Id: <1655491040-183649-3-git-send-email-nicolas.chautru@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1655491040-183649-1-git-send-email-nicolas.chautru@intel.com> References: <1646785355-168133-3-git-send-email-nicolas.chautru@intel.com> <1655491040-183649-1-git-send-email-nicolas.chautru@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added device status information, so that the PMD can expose information related to the underlying accelerator device status. Minor order change in structure to fit into padding hole. Signed-off-by: Nicolas Chautru --- drivers/baseband/acc100/rte_acc100_pmd.c | 1 + drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 1 + drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 1 + drivers/baseband/la12xx/bbdev_la12xx.c | 1 + drivers/baseband/null/bbdev_null.c | 1 + drivers/baseband/turbo_sw/bbdev_turbo_software.c | 1 + lib/bbdev/rte_bbdev.c | 21 +++++++++++++ lib/bbdev/rte_bbdev.h | 35 ++++++++++++++++++++-- lib/bbdev/version.map | 6 ++++ 9 files changed, 66 insertions(+), 2 deletions(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index de7e4bc..c4a164e 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -1060,6 +1060,7 @@ /* Read and save the populated config from ACC100 registers */ fetch_acc100_config(dev); + dev_info->device_status = RTE_BBDEV_DEV_NOSTATUS; /* This isn't ideal because it reports the maximum number of queues but * does not provide info on how many can be uplink/downlink or different diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c index 82ae6ba..fa74a14 100644 --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c @@ -369,6 +369,7 @@ dev_info->capabilities = bbdev_capabilities; dev_info->cpu_flag_reqs = NULL; dev_info->data_endianness = RTE_LITTLE_ENDIAN; + dev_info->device_status = RTE_BBDEV_DEV_NOSTATUS; /* Calculates number of queues assigned to device */ dev_info->max_num_queues = 0; diff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c index 21d3529..92c0624 100644 --- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c +++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c @@ -645,6 +645,7 @@ struct __rte_cache_aligned fpga_queue { dev_info->capabilities = bbdev_capabilities; dev_info->cpu_flag_reqs = NULL; dev_info->data_endianness = RTE_LITTLE_ENDIAN; + dev_info->device_status = RTE_BBDEV_DEV_NOSTATUS; /* Calculates number of queues assigned to device */ dev_info->max_num_queues = 0; diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c b/drivers/baseband/la12xx/bbdev_la12xx.c index 4d1bd16..310a1c4 100644 --- a/drivers/baseband/la12xx/bbdev_la12xx.c +++ b/drivers/baseband/la12xx/bbdev_la12xx.c @@ -100,6 +100,7 @@ struct bbdev_la12xx_params { dev_info->capabilities = bbdev_capabilities; dev_info->cpu_flag_reqs = NULL; dev_info->min_alignment = 64; + dev_info->device_status = RTE_BBDEV_DEV_NOSTATUS; rte_bbdev_log_debug("got device info from %u", dev->data->dev_id); } diff --git a/drivers/baseband/null/bbdev_null.c b/drivers/baseband/null/bbdev_null.c index 248e129..bcdf269 100644 --- a/drivers/baseband/null/bbdev_null.c +++ b/drivers/baseband/null/bbdev_null.c @@ -82,6 +82,7 @@ struct bbdev_queue { * here for code completeness. */ dev_info->data_endianness = RTE_LITTLE_ENDIAN; + dev_info->device_status = RTE_BBDEV_DEV_NOSTATUS; rte_bbdev_log_debug("got device info from %u", dev->data->dev_id); } diff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c b/drivers/baseband/turbo_sw/bbdev_turbo_software.c index af7bc41..00d108a 100644 --- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c +++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c @@ -254,6 +254,7 @@ struct turbo_sw_queue { dev_info->min_alignment = 64; dev_info->harq_buffer_size = 0; dev_info->data_endianness = RTE_LITTLE_ENDIAN; + dev_info->device_status = RTE_BBDEV_DEV_NOSTATUS; rte_bbdev_log_debug("got device info from %u\n", dev->data->dev_id); } diff --git a/lib/bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c index 22bd894..14d7456 100644 --- a/lib/bbdev/rte_bbdev.c +++ b/lib/bbdev/rte_bbdev.c @@ -1132,3 +1132,24 @@ struct rte_mempool * rte_bbdev_log(ERR, "Invalid operation type"); return NULL; } + +const char * +rte_bbdev_device_status_str(enum rte_bbdev_device_status status) +{ + static const char * const dev_sta_string[] = { + "RTE_BBDEV_DEV_NOSTATUS", + "RTE_BBDEV_DEV_RESET", + "RTE_BBDEV_DEV_CONFIGURED", + "RTE_BBDEV_DEV_ACTIVE", + "RTE_BBDEV_DEV_FATAL_ERR", + "RTE_BBDEV_DEV_RESTART_REQ", + "RTE_BBDEV_DEV_RECONFIG_REQ", + "RTE_BBDEV_DEV_CORRECT_ERR", + }; + + if (status < RTE_BBDEV_DEV_COUNT) + return dev_sta_string[status]; + + rte_bbdev_log(ERR, "Invalid device status"); + return NULL; +} diff --git a/lib/bbdev/rte_bbdev.h b/lib/bbdev/rte_bbdev.h index b88c881..29c3cd4 100644 --- a/lib/bbdev/rte_bbdev.h +++ b/lib/bbdev/rte_bbdev.h @@ -223,6 +223,21 @@ struct rte_bbdev_queue_conf { int rte_bbdev_queue_stop(uint16_t dev_id, uint16_t queue_id); +/** + * Flags indicate the status of the device + */ +enum rte_bbdev_device_status { + RTE_BBDEV_DEV_NOSTATUS, /**< Nothing to report */ + RTE_BBDEV_DEV_RESET, /**< Device in reset and unconfigure state */ + RTE_BBDEV_DEV_CONFIGURED, /**< Device is configured and ready to use */ + RTE_BBDEV_DEV_ACTIVE, /**< Device is configured and VF is being used */ + RTE_BBDEV_DEV_FATAL_ERR, /**< Device has hit a fatal uncorrectable error */ + RTE_BBDEV_DEV_RESTART_REQ, /**< Device requires application to restart */ + RTE_BBDEV_DEV_RECONFIG_REQ, /**< Device requires application to reconfig queues */ + RTE_BBDEV_DEV_CORRECT_ERR, /**< Warning of a correctable error event happened */ + RTE_BBDEV_DEV_COUNT +}; + /** Device statistics. */ struct rte_bbdev_stats { uint64_t enqueued_count; /**< Count of all operations enqueued */ @@ -285,12 +300,14 @@ struct rte_bbdev_driver_info { /** Set if device supports per-queue interrupts */ bool queue_intr_supported; /** Minimum alignment of buffers, in bytes */ - uint16_t min_alignment; - /** HARQ memory available in kB */ + /** Device Status */ + enum rte_bbdev_device_status device_status; uint32_t harq_buffer_size; /** Byte endianness (RTE_BIG_ENDIAN/RTE_LITTLE_ENDIAN) supported * for input/output data */ + uint16_t min_alignment; + /** HARQ memory available in kB */ uint8_t data_endianness; /** Default queue configuration used if none is supplied */ struct rte_bbdev_queue_conf default_queue_conf; @@ -827,6 +844,20 @@ typedef void (*rte_bbdev_cb_fn)(uint16_t dev_id, rte_bbdev_queue_intr_ctl(uint16_t dev_id, uint16_t queue_id, int epfd, int op, void *data); +/** + * Converts device status from enum to string + * + * @param status + * Device status as enum + * + * @returns + * Operation type as string or NULL if op_type is invalid + * + */ +__rte_experimental +const char* +rte_bbdev_device_status_str(enum rte_bbdev_device_status status); + #ifdef __cplusplus } #endif diff --git a/lib/bbdev/version.map b/lib/bbdev/version.map index cce3f3c..9ac3643 100644 --- a/lib/bbdev/version.map +++ b/lib/bbdev/version.map @@ -39,3 +39,9 @@ DPDK_22 { local: *; }; + +EXPERIMENTAL { + global: + + rte_bbdev_device_status_str; +}; From patchwork Fri Jun 17 18:37:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 113019 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CD95AA0032; Fri, 17 Jun 2022 20:49:28 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 15A4D4281C; Fri, 17 Jun 2022 20:49:14 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 0077840E2D for ; Fri, 17 Jun 2022 20:49:10 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655491751; x=1687027751; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=xUlq0a8AGN0tGH9hMBZnjrxLbB1Au8iCdsvwuPGcgrg=; b=gzdFqhQxgm+CsA7KrN2mkHWr6LYX9XcdNvU6XzPIDg5bEoReNsVV4l84 mHuJzWflEWLfHFAoyeAC2KQUqCJcgcSflFX5BPQj1yIGPgtPkHW6HgqE/ gdOdILUac2Q335Zg7z8kN0+YCDWO2Qk3EP2V2cijyyOH+nm2jThinEG4x ggxB1VhI3smlD6a1rXjpSn8S9429DR4KNcluNzsAcKkpXa4u9A70qbFao 7RejyeRPa1MCFm/m29yQs/B55PeRPflBZJzWrP8uZN7TBaJ4n6GZ4w0+G M6J4oIIs9EMgK34qy3aHAuO0jYwk7YIUyIKBaiSCxY3OhRISJc7gCskXX w==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="278333241" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="278333241" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jun 2022 11:49:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="560636030" Received: from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210]) by orsmga006.jf.intel.com with ESMTP; 17 Jun 2022 11:49:08 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com, hemant.agrawal@nxp.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, Nicolas Chautru Subject: [PATCH v2 3/5] bbdev: add device info on queue topology Date: Fri, 17 Jun 2022 11:37:18 -0700 Message-Id: <1655491040-183649-4-git-send-email-nicolas.chautru@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1655491040-183649-1-git-send-email-nicolas.chautru@intel.com> References: <1646785355-168133-3-git-send-email-nicolas.chautru@intel.com> <1655491040-183649-1-git-send-email-nicolas.chautru@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Adding more options in the API to expose the number of queues exposed and related priority. Signed-off-by: Nicolas Chautru --- lib/bbdev/rte_bbdev.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/bbdev/rte_bbdev.h b/lib/bbdev/rte_bbdev.h index 29c3cd4..9fd7fb0 100644 --- a/lib/bbdev/rte_bbdev.h +++ b/lib/bbdev/rte_bbdev.h @@ -289,6 +289,10 @@ struct rte_bbdev_driver_info { /** Maximum number of queues supported by the device */ unsigned int max_num_queues; + /** Maximum number of queues supported per operation type */ + unsigned int num_queues[RTE_BBDEV_OP_TYPE_PADDED_MAX]; + /** Priority level supported per operation type */ + unsigned int queue_priority[RTE_BBDEV_OP_TYPE_PADDED_MAX]; /** Queue size limit (queue size must also be power of 2) */ uint32_t queue_size_lim; /** Set if device off-loads operation to hardware */ From patchwork Fri Jun 17 18:37:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 113020 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4E9BCA0032; Fri, 17 Jun 2022 20:49:34 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 20E3F4282C; Fri, 17 Jun 2022 20:49:15 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 6D30A40F19 for ; Fri, 17 Jun 2022 20:49:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655491751; x=1687027751; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=PXZOo0pDfW+y55HSXSgTxGKmo+7Es6NUDdo1+bzldHY=; b=aPpk6doyKyQvyqbKlQqsJo9uHFnmjXBXk8ofWwEAPtK261j2nSGGtokt g0L3ZuzryPFCRdwa1Op+ykwymmDgaa5THpq1YNpnlISy01qwsd7j4XPT8 iYDCQkYHZdxXqkhNB6wNRfY+cv6asRVvnL8PtQW4xKhACOcaG45/hhRfO lZk1P21lnOBkXrIrnta83Mr3cONJrJlZc5KHkPN6bioCgjywP0cIwMBMP prc7Ugg3ytZx0DST4//yqbifiYbRaAZkmT6e2RNzBofQbD4WvmowzmfOg V8fnyxWT485oF8gU4WFuY/RFg+1N6FAmjywjmx/ZxxmZJbNj7E/BXYVM+ g==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="278333245" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="278333245" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jun 2022 11:49:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="560636034" Received: from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210]) by orsmga006.jf.intel.com with ESMTP; 17 Jun 2022 11:49:09 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com, hemant.agrawal@nxp.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, Nicolas Chautru Subject: [PATCH v2 4/5] drivers/baseband: update PMDs to expose queue per operation Date: Fri, 17 Jun 2022 11:37:19 -0700 Message-Id: <1655491040-183649-5-git-send-email-nicolas.chautru@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1655491040-183649-1-git-send-email-nicolas.chautru@intel.com> References: <1646785355-168133-3-git-send-email-nicolas.chautru@intel.com> <1655491040-183649-1-git-send-email-nicolas.chautru@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support in existing bbdev PMDs for the explicit number of queue and priority for each operation type configured on the device. Signed-off-by: Nicolas Chautru --- drivers/baseband/acc100/rte_acc100_pmd.c | 29 +++++++++++++--------- drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 8 ++++++ drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 8 ++++++ drivers/baseband/la12xx/bbdev_la12xx.c | 7 ++++++ drivers/baseband/turbo_sw/bbdev_turbo_software.c | 11 ++++++++ 5 files changed, 51 insertions(+), 12 deletions(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index c4a164e..3836ae1 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -966,6 +966,7 @@ struct rte_bbdev_driver_info *dev_info) { struct acc100_device *d = dev->data->dev_private; + int i; static const struct rte_bbdev_op_cap bbdev_capabilities[] = { { @@ -1062,19 +1063,23 @@ fetch_acc100_config(dev); dev_info->device_status = RTE_BBDEV_DEV_NOSTATUS; - /* This isn't ideal because it reports the maximum number of queues but - * does not provide info on how many can be uplink/downlink or different - * priorities - */ - dev_info->max_num_queues = - d->acc100_conf.q_dl_5g.num_aqs_per_groups * - d->acc100_conf.q_dl_5g.num_qgroups + - d->acc100_conf.q_ul_5g.num_aqs_per_groups * - d->acc100_conf.q_ul_5g.num_qgroups + - d->acc100_conf.q_dl_4g.num_aqs_per_groups * - d->acc100_conf.q_dl_4g.num_qgroups + - d->acc100_conf.q_ul_4g.num_aqs_per_groups * + /* Expose number of queues */ + dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = d->acc100_conf.q_ul_4g.num_aqs_per_groups * d->acc100_conf.q_ul_4g.num_qgroups; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = d->acc100_conf.q_dl_4g.num_aqs_per_groups * + d->acc100_conf.q_dl_4g.num_qgroups; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = d->acc100_conf.q_ul_5g.num_aqs_per_groups * + d->acc100_conf.q_ul_5g.num_qgroups; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = d->acc100_conf.q_dl_5g.num_aqs_per_groups * + d->acc100_conf.q_dl_5g.num_qgroups; + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = d->acc100_conf.q_ul_4g.num_qgroups; + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = d->acc100_conf.q_dl_4g.num_qgroups; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = d->acc100_conf.q_ul_5g.num_qgroups; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = d->acc100_conf.q_dl_5g.num_qgroups; + dev_info->max_num_queues = 0; + for (i = RTE_BBDEV_OP_TURBO_DEC; i < RTE_BBDEV_OP_LDPC_ENC; i++) + dev_info->max_num_queues += dev_info->num_queues[i]; dev_info->queue_size_lim = ACC100_MAX_QUEUE_DEPTH; dev_info->hardware_accelerated = true; dev_info->max_dl_queue_priority = diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c index fa74a14..bf27630 100644 --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c @@ -379,6 +379,14 @@ if (hw_q_id != FPGA_INVALID_HW_QUEUE_ID) dev_info->max_num_queues++; } + /* Expose number of queue per operation type */ + dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = 0; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = dev_info->max_num_queues / 2; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = dev_info->max_num_queues / 2; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = 1; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = 1; } /** diff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c index 92c0624..5560f73 100644 --- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c +++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c @@ -655,6 +655,14 @@ struct __rte_cache_aligned fpga_queue { if (hw_q_id != FPGA_INVALID_HW_QUEUE_ID) dev_info->max_num_queues++; } + /* Expose number of queue per operation type */ + dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = dev_info->max_num_queues / 2; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = dev_info->max_num_queues / 2; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = 0; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = 0; + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = 1; + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = 1; } /** diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c b/drivers/baseband/la12xx/bbdev_la12xx.c index 310a1c4..8c847ed 100644 --- a/drivers/baseband/la12xx/bbdev_la12xx.c +++ b/drivers/baseband/la12xx/bbdev_la12xx.c @@ -102,6 +102,13 @@ struct bbdev_la12xx_params { dev_info->min_alignment = 64; dev_info->device_status = RTE_BBDEV_DEV_NOSTATUS; + dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = 0; + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = 0; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = LA12XX_MAX_QUEUES / 2; + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = LA12XX_MAX_QUEUES / 2; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = 1; + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = 1; rte_bbdev_log_debug("got device info from %u", dev->data->dev_id); } diff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c b/drivers/baseband/turbo_sw/bbdev_turbo_software.c index 00d108a..387307f 100644 --- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c +++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c @@ -256,6 +256,17 @@ struct turbo_sw_queue { dev_info->data_endianness = RTE_LITTLE_ENDIAN; dev_info->device_status = RTE_BBDEV_DEV_NOSTATUS; + const struct rte_bbdev_op_cap *op_cap = bbdev_capabilities; + int num_op_type = 0; + for (; op_cap->type != RTE_BBDEV_OP_NONE; ++op_cap) + num_op_type++; + op_cap = bbdev_capabilities; + if (num_op_type > 0) { + int num_queue_per_type = dev_info->max_num_queues / num_op_type; + for (; op_cap->type != RTE_BBDEV_OP_NONE; ++op_cap) + dev_info->num_queues[op_cap->type] = num_queue_per_type; + } + rte_bbdev_log_debug("got device info from %u\n", dev->data->dev_id); } From patchwork Fri Jun 17 18:37:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 113021 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C08A8A0032; Fri, 17 Jun 2022 20:49:39 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 23E4742B6C; Fri, 17 Jun 2022 20:49:16 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 9DB9641141 for ; Fri, 17 Jun 2022 20:49:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655491751; x=1687027751; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=55Hro8J1Plap646nNsb6BKIEN+c87zqIXg7irA+1khw=; b=lxjuDZCrlWsLXQLSFQNtOLf51MeK4zYLP2ETxQO+05a7NHowMZZiWzcM 6QtCA4gASHW1HaAPTZ2MinRBdYUHITqqlstlNk7MmPUjJgZnDxJTynuxy eEhYKN6wUc7bjIu98ZTmgCpqP2wCbaz/5V5iedsoPU4fqJQ76q86pL5Ib qWGU0V3YoVGVlIxpZFujahRDXTNCTOke744dlcBh3i5dVoeq5WlnR7QWy cN4ulFRabx/WmEbo0ATpip0Wjn6D7yqOnC9sxES1m5DbSVcS0ir4m5W7O cIYgukplcEhANwWszI2SPaOSbbCNsd3tZtVYG3TJiIbkiw2QoHiq3vaUf g==; X-IronPort-AV: E=McAfee;i="6400,9594,10380"; a="278333248" X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="278333248" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jun 2022 11:49:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,306,1650956400"; d="scan'208";a="560636039" Received: from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210]) by orsmga006.jf.intel.com with ESMTP; 17 Jun 2022 11:49:09 -0700 From: Nicolas Chautru To: dev@dpdk.org, thomas@monjalon.net, gakhil@marvell.com, hemant.agrawal@nxp.com Cc: maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu, bruce.richardson@intel.com, david.marchand@redhat.com, stephen@networkplumber.org, Nicolas Chautru Subject: [PATCH v2 5/5] bbdev: add new operation for FFT processing Date: Fri, 17 Jun 2022 11:37:20 -0700 Message-Id: <1655491040-183649-6-git-send-email-nicolas.chautru@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1655491040-183649-1-git-send-email-nicolas.chautru@intel.com> References: <1646785355-168133-3-git-send-email-nicolas.chautru@intel.com> <1655491040-183649-1-git-send-email-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Extension of bbdev operation to support FFT based operations. Signed-off-by: Nicolas Chautru Acked-by: Hemant Agrawal --- doc/guides/prog_guide/bbdev.rst | 130 +++++++++++++++++++++++++++++++++++ lib/bbdev/rte_bbdev.c | 11 ++- lib/bbdev/rte_bbdev.h | 76 ++++++++++++++++++++ lib/bbdev/rte_bbdev_op.h | 149 ++++++++++++++++++++++++++++++++++++++++ lib/bbdev/version.map | 4 ++ 5 files changed, 369 insertions(+), 1 deletion(-) diff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst index 70fa01a..4a055b5 100644 --- a/doc/guides/prog_guide/bbdev.rst +++ b/doc/guides/prog_guide/bbdev.rst @@ -1118,6 +1118,136 @@ Figure :numref:`figure_turbo_tb_decode` above showing the Turbo decoding of CBs using BBDEV interface in TB-mode is also valid for LDPC decode. +BBDEV FFT Operation +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +This operation allows to run a combination of DFT and/or IDFT and/or time-domain windowing. +These can be used in a modular fashion (using bypass modes) or as a processing pipeline +which can be used for FFT-based baseband signal processing. +In more details it allows : +- to process the data first through an IDFT of adjustable size and padding; +- to perform the windowing as a programmable cyclic shift offset of the data followed by a +pointwise multiplication by a time domain window; +- to process the related data through a DFT of adjustable size and depadding for each such cyclic +shift output. + +A flexible number of Rx antennas are being processed in parallel with the same configuration. +The API allows more generally for flexibility in what the PMD may support (cabability flags) and +flexibility to adjust some of the parameters of the processing. + +The operation/capability flags that can be set for each FFT operation are given below. + + **NOTE:** The actual operation flags that may be used with a specific + BBDEV PMD are dependent on the driver capabilities as reported via + ``rte_bbdev_info_get()``, and may be a subset of those below. + ++--------------------------------------------------------------------+ +|Description of FFT capability flags | ++====================================================================+ +|RTE_BBDEV_FFT_WINDOWING | +| Set to enable/support windowing in time domain | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_CS_ADJUSTMENT | +| Set to enable/support the cyclic shift time offset adjustment | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_DFT_BYPASS | +| Set to bypass the DFT and use directly the IDFT as an option | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_IDFT_BYPASS | +| Set to bypass the IDFT and use directly the DFT as an option | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_WINDOWING_BYPASS | +| Set to bypass the time domain windowing as an option | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_POWER_MEAS | +| Set to provide an optional power measument of the DFT output | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_FP16_INPUT | +| Set if the input data shall use FP16 format instead of INT16 | ++--------------------------------------------------------------------+ +|RTE_BBDEV_FFT_FP16_OUTPUT | +| Set if the output data shall use FP16 format instead of INT16 | ++--------------------------------------------------------------------+ + +The structure passed for each FFT operation is given below, +with the operation flags forming a bitmask in the ``op_flags`` field. + +.. code-block:: c + + struct rte_bbdev_op_fft { + struct rte_bbdev_op_data base_input; + struct rte_bbdev_op_data base_output; + struct rte_bbdev_op_data power_meas_output; + uint32_t op_flags; + uint16_t input_sequence_size; + uint16_t input_leading_padding; + uint16_t output_sequence_size; + uint16_t output_leading_depadding; + uint8_t window_index[RTE_BBDEV_MAX_CS_2]; + uint16_t cs_bitmap; + uint8_t num_antennas_log2; + uint8_t idft_log2; + uint8_t dft_log2; + int8_t cs_time_adjustment; + int8_t idft_shift; + int8_t dft_shift; + uint16_t ncs_reciprocal; + uint16_t power_shift; + uint16_t fp16_exp_adjust; + }; + +The FFT parameters are set out in the table below. + ++----------------------+--------------------------------------------------------------+ +|Parameter |Description | ++======================+==============================================================+ +|base_input |input data | ++----------------------+--------------------------------------------------------------+ +|base_output |output data | ++----------------------+--------------------------------------------------------------+ +|power_meas_output |optional output data with power measurement on DFT output | ++----------------------+--------------------------------------------------------------+ +|op_flags |bitmask of all active operation capabilities | ++----------------------+--------------------------------------------------------------+ +|input_sequence_size |size of the input sequence in 32-bits points per antenna | ++----------------------+--------------------------------------------------------------+ +|input_leading_padding |number of points padded at the start of input data | ++----------------------+--------------------------------------------------------------+ +|output_sequence_size |size of the output sequence per antenna and cyclic shift | ++----------------------+--------------------------------------------------------------+ +|output_depadding |number of points depadded at the start of output data | ++----------------------+--------------------------------------------------------------+ +|window_index |optional windowing profile index used for each cyclic shift | ++----------------------+--------------------------------------------------------------+ +|cs_bitmap |bitmap of the cyclic shift output requested (LSB for index 0) | ++----------------------+--------------------------------------------------------------+ +|num_antennas_log2 |number of antennas as a log2 (10 maps to 1024...) | ++----------------------+--------------------------------------------------------------+ +|idft_log2 |iDFT size as a log2 | ++----------------------+--------------------------------------------------------------+ +|dft_log2 |DFT size as a log2 | ++----------------------+--------------------------------------------------------------+ +|cs_time_adjustment |adjustment of time position of all the cyclic shift output | ++----------------------+--------------------------------------------------------------+ +|idft_shift |shift down of signal level post iDFT | ++----------------------+--------------------------------------------------------------+ +|dft_shift |shift down of signal level post DFT | ++----------------------+--------------------------------------------------------------+ +|ncs_reciprocal |inverse of max number of CS normalized to 15b (ie. 231 for 12)| ++----------------------+--------------------------------------------------------------+ +|power_shift |shift down of level of power measurement when enabled | ++----------------------+--------------------------------------------------------------+ +|fp16_exp_adjust |value added to FP16 exponent at conversion from INT16 | ++----------------------+--------------------------------------------------------------+ + +The mbuf input ``base_input`` is mandatory for all BBDEV PMDs and is the +incoming data for the processing. Its size may not fit into an actual mbuf, but the +structure is used to pass iova address. +The mbuf output ``output`` is mandatory and is output of the FFT processing chain. +Each point is a complex number of 32bits : either as 2 INT16 or as 2 FP16 based when the option +supported. +The data layout is based on contiguous concatenation of output data first by cyclic shift then +by antenna. Sample code ----------- diff --git a/lib/bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c index 14d7456..e90aeaa 100644 --- a/lib/bbdev/rte_bbdev.c +++ b/lib/bbdev/rte_bbdev.c @@ -24,7 +24,7 @@ #define DEV_NAME "BBDEV" /* Number of supported operation types */ -#define BBDEV_OP_TYPE_COUNT 5 +#define BBDEV_OP_TYPE_COUNT 6 /* BBDev library logging ID */ RTE_LOG_REGISTER_DEFAULT(bbdev_logtype, NOTICE); @@ -852,6 +852,9 @@ struct rte_bbdev * case RTE_BBDEV_OP_LDPC_ENC: result = sizeof(struct rte_bbdev_enc_op); break; + case RTE_BBDEV_OP_FFT: + result = sizeof(struct rte_bbdev_fft_op); + break; default: break; } @@ -875,6 +878,10 @@ struct rte_bbdev * struct rte_bbdev_enc_op *op = element; memset(op, 0, mempool->elt_size); op->mempool = mempool; + } else if (type == RTE_BBDEV_OP_FFT) { + struct rte_bbdev_fft_op *op = element; + memset(op, 0, mempool->elt_size); + op->mempool = mempool; } } @@ -1124,6 +1131,8 @@ struct rte_mempool * "RTE_BBDEV_OP_TURBO_DEC", "RTE_BBDEV_OP_TURBO_ENC", "RTE_BBDEV_OP_LDPC_DEC", + "RTE_BBDEV_OP_LDPC_ENC", + "RTE_BBDEV_OP_FFT", }; if (op_type < BBDEV_OP_TYPE_COUNT) diff --git a/lib/bbdev/rte_bbdev.h b/lib/bbdev/rte_bbdev.h index 9fd7fb0..20cd2d9 100644 --- a/lib/bbdev/rte_bbdev.h +++ b/lib/bbdev/rte_bbdev.h @@ -401,6 +401,12 @@ typedef uint16_t (*rte_bbdev_enqueue_dec_ops_t)( struct rte_bbdev_dec_op **ops, uint16_t num); +/** @internal Enqueue fft operations for processing on queue of a device. */ +typedef uint16_t (*rte_bbdev_enqueue_fft_ops_t)( + struct rte_bbdev_queue_data *q_data, + struct rte_bbdev_fft_op **ops, + uint16_t num); + /** @internal Dequeue encode operations from a queue of a device. */ typedef uint16_t (*rte_bbdev_dequeue_enc_ops_t)( struct rte_bbdev_queue_data *q_data, @@ -411,6 +417,11 @@ typedef uint16_t (*rte_bbdev_dequeue_dec_ops_t)( struct rte_bbdev_queue_data *q_data, struct rte_bbdev_dec_op **ops, uint16_t num); +/** @internal Dequeue fft operations from a queue of a device. */ +typedef uint16_t (*rte_bbdev_dequeue_fft_ops_t)( + struct rte_bbdev_queue_data *q_data, + struct rte_bbdev_fft_op **ops, uint16_t num); + #define RTE_BBDEV_NAME_MAX_LEN 64 /**< Max length of device name */ /** @@ -459,6 +470,10 @@ struct __rte_cache_aligned rte_bbdev { rte_bbdev_dequeue_enc_ops_t dequeue_ldpc_enc_ops; /** Dequeue decode function */ rte_bbdev_dequeue_dec_ops_t dequeue_ldpc_dec_ops; + /** Enqueue FFT function */ + rte_bbdev_enqueue_fft_ops_t enqueue_fft_ops; + /** Dequeue FFT function */ + rte_bbdev_dequeue_fft_ops_t dequeue_fft_ops; const struct rte_bbdev_ops *dev_ops; /**< Functions exported by PMD */ struct rte_bbdev_data *data; /**< Pointer to device data */ enum rte_bbdev_state state; /**< If device is currently used or not */ @@ -591,6 +606,36 @@ struct __rte_cache_aligned rte_bbdev { return dev->enqueue_ldpc_dec_ops(q_data, ops, num_ops); } +/** + * Enqueue a burst of fft operations to a queue of the device. + * This functions only enqueues as many operations as currently possible and + * does not block until @p num_ops entries in the queue are available. + * This function does not provide any error notification to avoid the + * corresponding overhead. + * + * @param dev_id + * The identifier of the device. + * @param queue_id + * The index of the queue. + * @param ops + * Pointer array containing operations to be enqueued Must have at least + * @p num_ops entries + * @param num_ops + * The maximum number of operations to enqueue. + * + * @return + * The number of operations actually enqueued (this is the number of processed + * entries in the @p ops array). + */ +__rte_experimental +static inline uint16_t +rte_bbdev_enqueue_fft_ops(uint16_t dev_id, uint16_t queue_id, + struct rte_bbdev_fft_op **ops, uint16_t num_ops) +{ + struct rte_bbdev *dev = &rte_bbdev_devices[dev_id]; + struct rte_bbdev_queue_data *q_data = &dev->data->queues[queue_id]; + return dev->enqueue_fft_ops(q_data, ops, num_ops); +} /** * Dequeue a burst of processed encode operations from a queue of the device. @@ -716,6 +761,37 @@ struct __rte_cache_aligned rte_bbdev { return dev->dequeue_ldpc_dec_ops(q_data, ops, num_ops); } +/** + * Dequeue a burst of fft operations from a queue of the device. + * This functions returns only the current contents of the queue, and does not + * block until @ num_ops is available. + * This function does not provide any error notification to avoid the + * corresponding overhead. + * + * @param dev_id + * The identifier of the device. + * @param queue_id + * The index of the queue. + * @param ops + * Pointer array where operations will be dequeued to. Must have at least + * @p num_ops entries + * @param num_ops + * The maximum number of operations to dequeue. + * + * @return + * The number of operations actually dequeued (this is the number of entries + * copied into the @p ops array). + */ +__rte_experimental +static inline uint16_t +rte_bbdev_dequeue_fft_ops(uint16_t dev_id, uint16_t queue_id, + struct rte_bbdev_fft_op **ops, uint16_t num_ops) +{ + struct rte_bbdev *dev = &rte_bbdev_devices[dev_id]; + struct rte_bbdev_queue_data *q_data = &dev->data->queues[queue_id]; + return dev->dequeue_fft_ops(q_data, ops, num_ops); +} + /** Definitions of device event types */ enum rte_bbdev_event_type { RTE_BBDEV_EVENT_UNKNOWN, /**< unknown event type */ diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h index cd82418..3e46f1d 100644 --- a/lib/bbdev/rte_bbdev_op.h +++ b/lib/bbdev/rte_bbdev_op.h @@ -47,6 +47,8 @@ #define RTE_BBDEV_TURBO_MAX_CODE_BLOCKS (64) /* LDPC: Maximum number of Code Blocks in Transport Block.*/ #define RTE_BBDEV_LDPC_MAX_CODE_BLOCKS (256) +/* 12 CS maximum */ +#define RTE_BBDEV_MAX_CS_2 (6) /** Flags for turbo decoder operation and capability structure */ enum rte_bbdev_op_td_flag_bitmasks { @@ -211,6 +213,26 @@ enum rte_bbdev_op_ldpcenc_flag_bitmasks { RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7) }; +/** Flags for DFT operation and capability structure */ +enum rte_bbdev_op_fft_flag_bitmasks { + /** Flexible windowing capability */ + RTE_BBDEV_FFT_WINDOWING = (1ULL << 0), + /** Flexible adjustment of Cyclic Shift time offset */ + RTE_BBDEV_FFT_CS_ADJUSTMENT = (1ULL << 1), + /** Set for bypass the DFT and get directly into iDFT input */ + RTE_BBDEV_FFT_DFT_BYPASS = (1ULL << 2), + /** Set for bypass the IDFT and get directly the DFT output */ + RTE_BBDEV_FFT_IDFT_BYPASS = (1ULL << 3), + /** Set for bypass time domain windowing */ + RTE_BBDEV_FFT_WINDOWING_BYPASS = (1ULL << 4), + /** Set for optional power measurement on DFT output */ + RTE_BBDEV_FFT_POWER_MEAS = (1ULL << 5), + /** Set if the input data used FP16 format */ + RTE_BBDEV_FFT_FP16_INPUT = (1ULL << 6), + /** Set if the output data uses FP16 format */ + RTE_BBDEV_FFT_FP16_OUTPUT = (1ULL << 7) +}; + /** Flags for the Code Block/Transport block mode */ enum rte_bbdev_op_cb_mode { /** One operation is one or fraction of one transport block */ @@ -689,6 +711,55 @@ struct rte_bbdev_op_ldpc_enc { }; }; +/** Operation structure for FFT processing. + * + * The operation processes the data for multiple antennas in a single call + * (.i.e for all the REs belonging to a given SRS sequence for instance) + * + * The output mbuf data structure is expected to be allocated by the + * application with enough room for the output data. + */ +struct rte_bbdev_op_fft { + /** Input data starting from first antenna */ + struct rte_bbdev_op_data base_input; + /** Output data starting from first antenna and first cyclic shift */ + struct rte_bbdev_op_data base_output; + /** Optional power measurement output data */ + struct rte_bbdev_op_data power_meas_output; + /** Flags from rte_bbdev_op_fft_flag_bitmasks */ + uint32_t op_flags; + /** Input sequence size in 32-bits points */ + uint16_t input_sequence_size; + /** Padding at the start of the sequence */ + uint16_t input_leading_padding; + /** Output sequence size in 32-bits points */ + uint16_t output_sequence_size; + /** Depadding at the start of the DFT output */ + uint16_t output_leading_depadding; + /** Window index being used for each cyclic shift output */ + uint8_t window_index[RTE_BBDEV_MAX_CS_2]; + /** Bitmap of the cyclic shift output requested */ + uint16_t cs_bitmap; + /** Number of antennas as a log2 – 8 to 128 */ + uint8_t num_antennas_log2; + /** iDFT size as a log2 - 32 to 2048 */ + uint8_t idft_log2; + /** DFT size as a log2 - 8 to 2048 */ + uint8_t dft_log2; + /** Adjustment of position of the cyclic shifts - -31 to 31 */ + int8_t cs_time_adjustment; + /** iDFT shift down */ + int8_t idft_shift; + /** DFT shift down */ + int8_t dft_shift; + /** NCS reciprocal factor */ + uint16_t ncs_reciprocal; + /** power measurement out shift down */ + uint16_t power_shift; + /** Adjust the FP6 exponent for INT<->FP16 conversion */ + uint16_t fp16_exp_adjust; +}; + /** List of the capabilities for the Turbo Decoder */ struct rte_bbdev_op_cap_turbo_dec { /** Flags from rte_bbdev_op_td_flag_bitmasks */ @@ -741,6 +812,16 @@ struct rte_bbdev_op_cap_ldpc_enc { uint16_t num_buffers_dst; }; +/** List of the capabilities for the FFT */ +struct rte_bbdev_op_cap_fft { + /** Flags from rte_bbdev_op_ldpcenc_flag_bitmasks */ + uint32_t capability_flags; + /** Num input code block buffers */ + uint16_t num_buffers_src; + /** Num output code block buffers */ + uint16_t num_buffers_dst; +}; + /** Different operation types supported by the device */ enum rte_bbdev_op_type { RTE_BBDEV_OP_NONE, /**< Dummy operation that does nothing */ @@ -748,6 +829,7 @@ enum rte_bbdev_op_type { RTE_BBDEV_OP_TURBO_ENC, /**< Turbo encode */ RTE_BBDEV_OP_LDPC_DEC, /**< LDPC decode */ RTE_BBDEV_OP_LDPC_ENC, /**< LDPC encode */ + RTE_BBDEV_OP_FFT, /**< FFT */ RTE_BBDEV_OP_TYPE_PADDED_MAX = 8, /**< Maximum op type number including padding */ }; @@ -791,6 +873,18 @@ struct rte_bbdev_dec_op { }; }; +/** Structure specifying a single fft operation */ +struct rte_bbdev_fft_op { + /** Status of operation that was performed */ + int status; + /** Mempool which op instance is in */ + struct rte_mempool *mempool; + /** Opaque pointer for user data */ + void *opaque_data; + /** Contains turbo decoder specific parameters */ + struct rte_bbdev_op_fft fft; +}; + /** Operation capabilities supported by a device */ struct rte_bbdev_op_cap { enum rte_bbdev_op_type type; /**< Type of operation */ @@ -799,6 +893,7 @@ struct rte_bbdev_op_cap { struct rte_bbdev_op_cap_turbo_enc turbo_enc; struct rte_bbdev_op_cap_ldpc_dec ldpc_dec; struct rte_bbdev_op_cap_ldpc_enc ldpc_enc; + struct rte_bbdev_op_cap_fft fft; } cap; /**< Operation-type specific capabilities */ }; @@ -918,6 +1013,42 @@ struct rte_mempool * } /** + * Bulk allocate fft operations from a mempool with parameter defaults reset. + * + * @param mempool + * Operation mempool, created by rte_bbdev_op_pool_create(). + * @param ops + * Output array to place allocated operations + * @param num_ops + * Number of operations to allocate + * + * @returns + * - 0 on success + * - EINVAL if invalid mempool is provided + */ +__rte_experimental +static inline int +rte_bbdev_fft_op_alloc_bulk(struct rte_mempool *mempool, + struct rte_bbdev_fft_op **ops, uint16_t num_ops) +{ + struct rte_bbdev_op_pool_private *priv; + int ret; + + /* Check type */ + priv = (struct rte_bbdev_op_pool_private *) + rte_mempool_get_priv(mempool); + if (unlikely(priv->type != RTE_BBDEV_OP_FFT)) + return -EINVAL; + + /* Get elements */ + ret = rte_mempool_get_bulk(mempool, (void **)ops, num_ops); + if (unlikely(ret < 0)) + return ret; + + return 0; +} + +/** * Free decode operation structures that were allocated by * rte_bbdev_dec_op_alloc_bulk(). * All structures must belong to the same mempool. @@ -951,6 +1082,24 @@ struct rte_mempool * rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); } +/** + * Free encode operation structures that were allocated by + * rte_bbdev_fft_op_alloc_bulk(). + * All structures must belong to the same mempool. + * + * @param ops + * Operation structures + * @param num_ops + * Number of structures + */ +__rte_experimental +static inline void +rte_bbdev_fft_op_free_bulk(struct rte_bbdev_fft_op **ops, unsigned int num_ops) +{ + if (num_ops > 0) + rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); +} + #ifdef __cplusplus } #endif diff --git a/lib/bbdev/version.map b/lib/bbdev/version.map index 9ac3643..efae50b 100644 --- a/lib/bbdev/version.map +++ b/lib/bbdev/version.map @@ -44,4 +44,8 @@ EXPERIMENTAL { global: rte_bbdev_device_status_str; + rte_bbdev_enqueue_fft_ops; + rte_bbdev_dequeue_fft_ops; + rte_bbdev_fft_op_alloc_bulk; + rte_bbdev_fft_op_free_bulk; };