From patchwork Wed Aug 10 07:07:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Naga Harish K, S V" X-Patchwork-Id: 114797 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 55A98A0540; Wed, 10 Aug 2022 09:07:29 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DE48540A87; Wed, 10 Aug 2022 09:07:28 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mails.dpdk.org (Postfix) with ESMTP id 860AE4068E for ; Wed, 10 Aug 2022 09:07:26 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660115246; x=1691651246; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ByrjgIcSAsNTxpTxFF8Z+4VrQ3Ia6SyD1lk/DC5MYX0=; b=H90AseKzWMdT4XEuIf+P8k0cYXIy9oobRL0HEQeKWOvcNn/0IVJTWTz+ A3tVc4ZM9VjJj0vWDG2dwTDMbDUOajBHillk7lCZA/t1EM17Vob0ZjS2K k0uKWJmqL6+9J3cuNkO5MAIVGTxB1CkPVq11Fuub8tknHfIjqWhXMLxLF iPPf2SF40Tvjni4hWjTRigVCJQDKTxYwirPLaJQmmw+QzVNj6ylawvorF nHdfC7qcxUtBXPJ+kZF0WvNLbZvB3CzHO5C262z/tV5+8XFC6RhUtXUTq PohJW1V71a8zNDeYVjWewZXxxYPsJ4T2WASoRbxv/qn7V1D1socUIa2Eq A==; X-IronPort-AV: E=McAfee;i="6400,9594,10434"; a="270791106" X-IronPort-AV: E=Sophos;i="5.93,226,1654585200"; d="scan'208";a="270791106" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2022 00:07:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,226,1654585200"; d="scan'208";a="664773478" Received: from txandevlnx322.an.intel.com ([10.123.117.44]) by fmsmga008.fm.intel.com with ESMTP; 10 Aug 2022 00:07:25 -0700 From: Naga Harish K S V To: erik.g.carrillo@intel.com, jerinj@marvell.com Cc: pbhagavatula@marvell.com, sthotton@marvell.com, dev@dpdk.org Subject: [PATCH v2 1/4] eventdev/timer: add periodic event timer support Date: Wed, 10 Aug 2022 02:07:21 -0500 Message-Id: <20220810070722.3110873-1-s.v.naga.harish.k@intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20220803162542.3145559-1-s.v.naga.harish.k@intel.com> References: <20220803162542.3145559-1-s.v.naga.harish.k@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds support to configure and use periodic event timers in software timer adapter. The structure ``rte_event_timer_adapter_stats`` is extended by adding a new field, ``evtim_drop_count``. This stat represents the number of times an event_timer expiry event is dropped by the event timer adapter. Signed-off-by: Naga Harish K S V --- lib/eventdev/rte_event_timer_adapter.c | 86 ++++++++++++++++++-------- lib/eventdev/rte_event_timer_adapter.h | 2 + lib/eventdev/rte_eventdev.c | 6 +- 3 files changed, 67 insertions(+), 27 deletions(-) diff --git a/lib/eventdev/rte_event_timer_adapter.c b/lib/eventdev/rte_event_timer_adapter.c index e0d978d641..0de88dfc0f 100644 --- a/lib/eventdev/rte_event_timer_adapter.c +++ b/lib/eventdev/rte_event_timer_adapter.c @@ -53,6 +53,14 @@ static const struct event_timer_adapter_ops swtim_ops; #define EVTIM_SVC_LOG_DBG(...) (void)0 #endif +static inline enum rte_timer_type +get_event_timer_type(const struct rte_event_timer_adapter *adapter) +{ + return (adapter->data->conf.flags & + RTE_EVENT_TIMER_ADAPTER_F_PERIODIC) ? + PERIODICAL : SINGLE; +} + static int default_port_conf_cb(uint16_t id, uint8_t event_dev_id, uint8_t *event_port_id, void *conf_arg) @@ -195,10 +203,11 @@ rte_event_timer_adapter_create_ext( adapter->data->conf = *conf; /* copy conf structure */ /* Query eventdev PMD for timer adapter capabilities and ops */ - ret = dev->dev_ops->timer_adapter_caps_get(dev, + ret = dev->dev_ops->timer_adapter_caps_get ? + dev->dev_ops->timer_adapter_caps_get(dev, adapter->data->conf.flags, &adapter->data->caps, - &adapter->ops); + &adapter->ops) : 0; if (ret < 0) { rte_errno = -ret; goto free_memzone; @@ -348,10 +357,11 @@ rte_event_timer_adapter_lookup(uint16_t adapter_id) dev = &rte_eventdevs[adapter->data->event_dev_id]; /* Query eventdev PMD for timer adapter capabilities and ops */ - ret = dev->dev_ops->timer_adapter_caps_get(dev, + ret = dev->dev_ops->timer_adapter_caps_get ? + dev->dev_ops->timer_adapter_caps_get(dev, adapter->data->conf.flags, &adapter->data->caps, - &adapter->ops); + &adapter->ops) : 0; if (ret < 0) { rte_errno = EINVAL; return NULL; @@ -612,35 +622,44 @@ swtim_callback(struct rte_timer *tim) uint64_t opaque; int ret; int n_lcores; + enum rte_timer_type type; opaque = evtim->impl_opaque[1]; adapter = (struct rte_event_timer_adapter *)(uintptr_t)opaque; sw = swtim_pmd_priv(adapter); + type = get_event_timer_type(adapter); + + if (unlikely(sw->in_use[lcore].v == 0)) { + sw->in_use[lcore].v = 1; + n_lcores = __atomic_fetch_add(&sw->n_poll_lcores, 1, + __ATOMIC_RELAXED); + __atomic_store_n(&sw->poll_lcores[n_lcores], lcore, + __ATOMIC_RELAXED); + } ret = event_buffer_add(&sw->buffer, &evtim->ev); if (ret < 0) { - /* If event buffer is full, put timer back in list with - * immediate expiry value, so that we process it again on the - * next iteration. - */ - ret = rte_timer_alt_reset(sw->timer_data_id, tim, 0, SINGLE, - lcore, NULL, evtim); - if (ret < 0) { - EVTIM_LOG_DBG("event buffer full, failed to reset " - "timer with immediate expiry value"); + if (type == SINGLE) { + /* If event buffer is full, put timer back in list with + * immediate expiry value, so that we process it again + * on the next iteration. + */ + ret = rte_timer_alt_reset(sw->timer_data_id, tim, 0, + SINGLE, lcore, NULL, evtim); + if (ret < 0) { + EVTIM_LOG_DBG("event buffer full, failed to " + "reset timer with immediate " + "expiry value"); + } else { + sw->stats.evtim_retry_count++; + EVTIM_LOG_DBG("event buffer full, resetting " + "rte_timer with immediate " + "expiry value"); + } } else { - sw->stats.evtim_retry_count++; - EVTIM_LOG_DBG("event buffer full, resetting rte_timer " - "with immediate expiry value"); + sw->stats.evtim_drop_count++; } - if (unlikely(sw->in_use[lcore].v == 0)) { - sw->in_use[lcore].v = 1; - n_lcores = __atomic_fetch_add(&sw->n_poll_lcores, 1, - __ATOMIC_RELAXED); - __atomic_store_n(&sw->poll_lcores[n_lcores], lcore, - __ATOMIC_RELAXED); - } } else { EVTIM_BUF_LOG_DBG("buffered an event timer expiry event"); @@ -654,10 +673,15 @@ swtim_callback(struct rte_timer *tim) sw->n_expired_timers = 0; } - sw->expired_timers[sw->n_expired_timers++] = tim; + /* Don't free rte_timer for a periodic event timer until + * it is cancelled + */ + if (type == SINGLE) + sw->expired_timers[sw->n_expired_timers++] = tim; sw->stats.evtim_exp_count++; - __atomic_store_n(&evtim->state, RTE_EVENT_TIMER_NOT_ARMED, + if (type == SINGLE) + __atomic_store_n(&evtim->state, RTE_EVENT_TIMER_NOT_ARMED, __ATOMIC_RELEASE); } @@ -947,6 +971,12 @@ swtim_uninit(struct rte_event_timer_adapter *adapter) swtim_free_tim, sw); + ret = rte_timer_data_dealloc(sw->timer_data_id); + if (ret < 0) { + EVTIM_LOG_ERR("failed to deallocate timer data instance"); + return ret; + } + ret = rte_service_component_unregister(sw->service_id); if (ret < 0) { EVTIM_LOG_ERR("failed to unregister service component"); @@ -1053,6 +1083,7 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter, /* Timer list for this lcore is not in use. */ uint16_t exp_state = 0; enum rte_event_timer_state n_state; + enum rte_timer_type type = SINGLE; #ifdef RTE_LIBRTE_EVENTDEV_DEBUG /* Check that the service is running. */ @@ -1092,6 +1123,9 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter, return 0; } + /* update timer type for periodic adapter */ + type = get_event_timer_type(adapter); + for (i = 0; i < nb_evtims; i++) { n_state = __atomic_load_n(&evtims[i]->state, __ATOMIC_ACQUIRE); if (n_state == RTE_EVENT_TIMER_ARMED) { @@ -1135,7 +1169,7 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter, cycles = get_timeout_cycles(evtims[i], adapter); ret = rte_timer_alt_reset(sw->timer_data_id, tim, cycles, - SINGLE, lcore_id, NULL, evtims[i]); + type, lcore_id, NULL, evtims[i]); if (ret < 0) { /* tim was in RUNNING or CONFIG state */ __atomic_store_n(&evtims[i]->state, diff --git a/lib/eventdev/rte_event_timer_adapter.h b/lib/eventdev/rte_event_timer_adapter.h index eab8e59a57..cd10db19e4 100644 --- a/lib/eventdev/rte_event_timer_adapter.h +++ b/lib/eventdev/rte_event_timer_adapter.h @@ -193,6 +193,8 @@ struct rte_event_timer_adapter_stats { /**< Event timer retry count */ uint64_t adapter_tick_count; /**< Tick count for the adapter, at its resolution */ + uint64_t evtim_drop_count; + /**< event timer expiries dropped */ }; struct rte_event_timer_adapter; diff --git a/lib/eventdev/rte_eventdev.c b/lib/eventdev/rte_eventdev.c index 1dc4f966be..4a2a1178da 100644 --- a/lib/eventdev/rte_eventdev.c +++ b/lib/eventdev/rte_eventdev.c @@ -139,7 +139,11 @@ rte_event_timer_adapter_caps_get(uint8_t dev_id, uint32_t *caps) if (caps == NULL) return -EINVAL; - *caps = 0; + + if (dev->dev_ops->timer_adapter_caps_get == NULL) + *caps = RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC; + else + *caps = 0; return dev->dev_ops->timer_adapter_caps_get ? (*dev->dev_ops->timer_adapter_caps_get)(dev, From patchwork Wed Aug 10 07:09:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Naga Harish K, S V" X-Patchwork-Id: 114799 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2EC7DA0540; Wed, 10 Aug 2022 09:09:53 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 03DB140A87; Wed, 10 Aug 2022 09:09:53 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id D45E54068E for ; Wed, 10 Aug 2022 09:09:51 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660115392; x=1691651392; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; 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RTE_SET_USED(flags); - *caps = 0; + *caps = RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC; /* Use default SW ops */ *ops = NULL; From patchwork Wed Aug 10 07:09:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Naga Harish K, S V" X-Patchwork-Id: 114800 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 27C0AA0540; Wed, 10 Aug 2022 09:10:23 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1627140DDE; Wed, 10 Aug 2022 09:10:23 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 2E5574068E; Wed, 10 Aug 2022 09:10:21 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; 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10 Aug 2022 00:10:00 -0700 From: Naga Harish K S V To: erik.g.carrillo@intel.com Cc: dev@dpdk.org, stable@dpdk.org Subject: [PATCH v2 3/4] timer: fix function to stop all timers Date: Wed, 10 Aug 2022 02:09:58 -0500 Message-Id: <20220810070958.3111119-1-s.v.naga.harish.k@intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20220803162651.3145945-1-s.v.naga.harish.k@intel.com> References: <20220803162651.3145945-1-s.v.naga.harish.k@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org There is a possibility of deadlock in this API, as same spinlock is tried to be acquired in nested manner. In timer_del function, if the previous owner and current owner lcore are different, the lock is tried to be acquired even though the same lock is already acquired by the caller of timer_del function. This patch removes the acquisition of nested locking. Fixes: 821c51267bcd63a ("timer: add function to stop all timers in a list") Cc: stable@dpdk.org Signed-off-by: Naga Harish K S V --- lib/timer/rte_timer.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/lib/timer/rte_timer.c b/lib/timer/rte_timer.c index 9994813d0d..85d67573eb 100644 --- a/lib/timer/rte_timer.c +++ b/lib/timer/rte_timer.c @@ -580,7 +580,7 @@ rte_timer_reset_sync(struct rte_timer *tim, uint64_t ticks, } static int -__rte_timer_stop(struct rte_timer *tim, int local_is_locked, +__rte_timer_stop(struct rte_timer *tim, struct rte_timer_data *timer_data) { union rte_timer_status prev_status, status; @@ -602,7 +602,7 @@ __rte_timer_stop(struct rte_timer *tim, int local_is_locked, /* remove it from list */ if (prev_status.state == RTE_TIMER_PENDING) { - timer_del(tim, prev_status, local_is_locked, priv_timer); + timer_del(tim, prev_status, 0, priv_timer); __TIMER_STAT_ADD(priv_timer, pending, -1); } @@ -631,7 +631,7 @@ rte_timer_alt_stop(uint32_t timer_data_id, struct rte_timer *tim) TIMER_DATA_VALID_GET_OR_ERR_RET(timer_data_id, timer_data, -EINVAL); - return __rte_timer_stop(tim, 0, timer_data); + return __rte_timer_stop(tim, timer_data); } /* loop until rte_timer_stop() succeed */ @@ -987,21 +987,16 @@ rte_timer_stop_all(uint32_t timer_data_id, unsigned int *walk_lcores, walk_lcore = walk_lcores[i]; priv_timer = &timer_data->priv_timer[walk_lcore]; - rte_spinlock_lock(&priv_timer->list_lock); - for (tim = priv_timer->pending_head.sl_next[0]; tim != NULL; tim = next_tim) { next_tim = tim->sl_next[0]; - /* Call timer_stop with lock held */ - __rte_timer_stop(tim, 1, timer_data); + __rte_timer_stop(tim, timer_data); if (f) f(tim, f_arg); } - - rte_spinlock_unlock(&priv_timer->list_lock); } return 0; From patchwork Wed Aug 10 07:07:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Naga Harish K, S V" X-Patchwork-Id: 114798 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 22A03A0540; Wed, 10 Aug 2022 09:07:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1D4BD42BCA; Wed, 10 Aug 2022 09:07:31 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mails.dpdk.org (Postfix) with ESMTP id 7B70E4068E for ; Wed, 10 Aug 2022 09:07:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660115248; x=1691651248; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PjQ+ikNOEbXxCahYTaxey2C1bisMM2EmSzql4Rx9vh0=; b=IihX/aDnIjIcvbql4FGHv7ldzwHTxr+ow/MaXJA6oO/LgMV9aJL8eIye 2b3eS6C9pIrsSt9Pkai3K9FgpUu5h17qUf4riegX/Ios4Y+G94W8rHMFo xRoAipGhw+OhtI2ArGw784M4KVXURCrvv8lc4W6gItD9OrphUlN64FEfM Aw/gfR1U7Gwod+P4kHvXoYCozFTMKi5QS061OLjt7LOEdueoIjPZ1Otej JCMlFItTWG5dz72ysmwvTPj0wLXfOCxHG0vyb7WkoysPY0No7iQPHvmT0 tKczDfiYQgSNYY76vTR++HRIiEhFfWYLUjqT3rLlgPJ2P/cIaj4ydBkgt g==; X-IronPort-AV: E=McAfee;i="6400,9594,10434"; a="270791116" X-IronPort-AV: E=Sophos;i="5.93,226,1654585200"; d="scan'208";a="270791116" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2022 00:07:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,226,1654585200"; d="scan'208";a="664773506" Received: from txandevlnx322.an.intel.com ([10.123.117.44]) by fmsmga008.fm.intel.com with ESMTP; 10 Aug 2022 00:07:27 -0700 From: Naga Harish K S V To: erik.g.carrillo@intel.com, jerinj@marvell.com Cc: pbhagavatula@marvell.com, sthotton@marvell.com, dev@dpdk.org Subject: [PATCH v2 4/4] test/event: update periodic event timer tests Date: Wed, 10 Aug 2022 02:07:22 -0500 Message-Id: <20220810070722.3110873-2-s.v.naga.harish.k@intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20220810070722.3110873-1-s.v.naga.harish.k@intel.com> References: <20220803162542.3145559-1-s.v.naga.harish.k@intel.com> <20220810070722.3110873-1-s.v.naga.harish.k@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch updates the software timer adapter tests to configure and use periodic event timers. Signed-off-by: Naga Harish K S V --- app/test/test_event_timer_adapter.c | 41 ++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 4 deletions(-) diff --git a/app/test/test_event_timer_adapter.c b/app/test/test_event_timer_adapter.c index d6170bb589..654c412836 100644 --- a/app/test/test_event_timer_adapter.c +++ b/app/test/test_event_timer_adapter.c @@ -386,11 +386,22 @@ timdev_setup_msec(void) static int timdev_setup_msec_periodic(void) { + uint32_t caps = 0; + uint64_t max_tmo_ns; + uint64_t flags = RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES | RTE_EVENT_TIMER_ADAPTER_F_PERIODIC; + TEST_ASSERT_SUCCESS(rte_event_timer_adapter_caps_get(evdev, &caps), + "failed to get adapter capabilities"); + + if (caps & RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT) + max_tmo_ns = 0; + else + max_tmo_ns = 180 * NSECPERSEC; + /* Periodic mode with 100 ms resolution */ - return _timdev_setup(0, NSECPERSEC / 10, flags); + return _timdev_setup(max_tmo_ns, NSECPERSEC / 10, flags); } static int @@ -409,7 +420,7 @@ timdev_setup_sec_periodic(void) RTE_EVENT_TIMER_ADAPTER_F_PERIODIC; /* Periodic mode with 1 sec resolution */ - return _timdev_setup(0, NSECPERSEC, flags); + return _timdev_setup(180 * NSECPERSEC, NSECPERSEC, flags); } static int @@ -561,12 +572,23 @@ test_timer_arm(void) static inline int test_timer_arm_periodic(void) { + uint32_t caps = 0; + uint32_t timeout_count = 0; + TEST_ASSERT_SUCCESS(_arm_timers(1, MAX_TIMERS), "Failed to arm timers"); /* With a resolution of 100ms and wait time of 1sec, * there will be 10 * MAX_TIMERS periodic timer triggers. */ - TEST_ASSERT_SUCCESS(_wait_timer_triggers(1, 10 * MAX_TIMERS, 0), + TEST_ASSERT_SUCCESS(rte_event_timer_adapter_caps_get(evdev, &caps), + "failed to get adapter capabilities"); + + if (caps & RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT) + timeout_count = 10; + else + timeout_count = 9; + + TEST_ASSERT_SUCCESS(_wait_timer_triggers(1, timeout_count * MAX_TIMERS, 0), "Timer triggered count doesn't match arm count"); return TEST_SUCCESS; } @@ -649,12 +671,23 @@ test_timer_arm_burst(void) static inline int test_timer_arm_burst_periodic(void) { + uint32_t caps = 0; + uint32_t timeout_count = 0; + TEST_ASSERT_SUCCESS(_arm_timers_burst(1, MAX_TIMERS), "Failed to arm timers"); /* With a resolution of 100ms and wait time of 1sec, * there will be 10 * MAX_TIMERS periodic timer triggers. */ - TEST_ASSERT_SUCCESS(_wait_timer_triggers(1, 10 * MAX_TIMERS, 0), + TEST_ASSERT_SUCCESS(rte_event_timer_adapter_caps_get(evdev, &caps), + "failed to get adapter capabilities"); + + if (caps & RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT) + timeout_count = 10; + else + timeout_count = 9; + + TEST_ASSERT_SUCCESS(_wait_timer_triggers(1, timeout_count * MAX_TIMERS, 0), "Timer triggered count doesn't match arm count"); return TEST_SUCCESS;