From patchwork Thu Aug 11 15:36:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Naga Harish K, S V" X-Patchwork-Id: 114842 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 24793A0548; Thu, 11 Aug 2022 17:36:45 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C3F14427F2; Thu, 11 Aug 2022 17:36:44 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 64EA4410FC for ; Thu, 11 Aug 2022 17:36:43 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660232203; x=1691768203; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vdc/Mejg8CoOGMYXi2r8MBaFlBYTbnR3O+nrur+2DY4=; b=EOt3Ls/sm/A51GJ72GfkUmx0iKlwTLXh6nKVdMAILZAqUnSmZax9UBBj Uv75RGineqwYRlmvvb1gpOJKLBqQ0M7yZBCj8jl79tGY1AY5KtfN51pg+ IfYFqRC9Q8pbw0jTAkdDQo0wvL2HhSNrIl3wcvG74xy+G7DTWQbKUZmK2 SN7HVB0wQRR44y1cQ4Ho+v/0xnbph48+8aMCF7QfVzYBoCiBo1w+T0zhq M8ZTKRKS3CRqfKzfNomOfz2YMMBwy7vd75iVLJCpBDpR9Wha+R8Gcx0M0 t/ZQfNBP0epBZi3CICMl6GKSzF859zs5cOzfOc+Nuv+N7G3zXCm5wOrge Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10436"; a="292641417" X-IronPort-AV: E=Sophos;i="5.93,230,1654585200"; d="scan'208";a="292641417" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2022 08:36:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,230,1654585200"; d="scan'208";a="665427731" Received: from txandevlnx322.an.intel.com ([10.123.117.44]) by fmsmga008.fm.intel.com with ESMTP; 11 Aug 2022 08:36:41 -0700 From: Naga Harish K S V To: erik.g.carrillo@intel.com, jerinj@marvell.com Cc: pbhagavatula@marvell.com, sthotton@marvell.com, dev@dpdk.org Subject: [PATCH v3 1/4] eventdev/timer: add periodic event timer support Date: Thu, 11 Aug 2022 10:36:37 -0500 Message-Id: <20220811153638.3992403-1-s.v.naga.harish.k@intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20220810070722.3110873-1-s.v.naga.harish.k@intel.com> References: <20220810070722.3110873-1-s.v.naga.harish.k@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds support to configure and use periodic event timers in software timer adapter. The structure ``rte_event_timer_adapter_stats`` is extended by adding a new field, ``evtim_drop_count``. This stat represents the number of times an event_timer expiry event is dropped by the event timer adapter. Signed-off-by: Naga Harish K S V --- lib/eventdev/rte_event_timer_adapter.c | 106 ++++++++++++++++--------- lib/eventdev/rte_event_timer_adapter.h | 2 + lib/eventdev/rte_eventdev.c | 6 +- 3 files changed, 77 insertions(+), 37 deletions(-) diff --git a/lib/eventdev/rte_event_timer_adapter.c b/lib/eventdev/rte_event_timer_adapter.c index e0d978d641..d2480060c5 100644 --- a/lib/eventdev/rte_event_timer_adapter.c +++ b/lib/eventdev/rte_event_timer_adapter.c @@ -53,6 +53,14 @@ static const struct event_timer_adapter_ops swtim_ops; #define EVTIM_SVC_LOG_DBG(...) (void)0 #endif +static inline enum rte_timer_type +get_timer_type(const struct rte_event_timer_adapter *adapter) +{ + return (adapter->data->conf.flags & + RTE_EVENT_TIMER_ADAPTER_F_PERIODIC) ? + PERIODICAL : SINGLE; +} + static int default_port_conf_cb(uint16_t id, uint8_t event_dev_id, uint8_t *event_port_id, void *conf_arg) @@ -195,13 +203,14 @@ rte_event_timer_adapter_create_ext( adapter->data->conf = *conf; /* copy conf structure */ /* Query eventdev PMD for timer adapter capabilities and ops */ - ret = dev->dev_ops->timer_adapter_caps_get(dev, - adapter->data->conf.flags, - &adapter->data->caps, - &adapter->ops); - if (ret < 0) { - rte_errno = -ret; - goto free_memzone; + if (dev->dev_ops->timer_adapter_caps_get) { + ret = dev->dev_ops->timer_adapter_caps_get(dev, + adapter->data->conf.flags, + &adapter->data->caps, &adapter->ops); + if (ret < 0) { + rte_errno = -ret; + goto free_memzone; + } } if (!(adapter->data->caps & @@ -348,13 +357,14 @@ rte_event_timer_adapter_lookup(uint16_t adapter_id) dev = &rte_eventdevs[adapter->data->event_dev_id]; /* Query eventdev PMD for timer adapter capabilities and ops */ - ret = dev->dev_ops->timer_adapter_caps_get(dev, - adapter->data->conf.flags, - &adapter->data->caps, - &adapter->ops); - if (ret < 0) { - rte_errno = EINVAL; - return NULL; + if (dev->dev_ops->timer_adapter_caps_get) { + ret = dev->dev_ops->timer_adapter_caps_get(dev, + adapter->data->conf.flags, + &adapter->data->caps, &adapter->ops); + if (ret < 0) { + rte_errno = EINVAL; + return NULL; + } } /* If eventdev PMD did not provide ops, use default software @@ -612,35 +622,44 @@ swtim_callback(struct rte_timer *tim) uint64_t opaque; int ret; int n_lcores; + enum rte_timer_type type; opaque = evtim->impl_opaque[1]; adapter = (struct rte_event_timer_adapter *)(uintptr_t)opaque; sw = swtim_pmd_priv(adapter); + type = get_timer_type(adapter); + + if (unlikely(sw->in_use[lcore].v == 0)) { + sw->in_use[lcore].v = 1; + n_lcores = __atomic_fetch_add(&sw->n_poll_lcores, 1, + __ATOMIC_RELAXED); + __atomic_store_n(&sw->poll_lcores[n_lcores], lcore, + __ATOMIC_RELAXED); + } ret = event_buffer_add(&sw->buffer, &evtim->ev); if (ret < 0) { - /* If event buffer is full, put timer back in list with - * immediate expiry value, so that we process it again on the - * next iteration. - */ - ret = rte_timer_alt_reset(sw->timer_data_id, tim, 0, SINGLE, - lcore, NULL, evtim); - if (ret < 0) { - EVTIM_LOG_DBG("event buffer full, failed to reset " - "timer with immediate expiry value"); + if (type == SINGLE) { + /* If event buffer is full, put timer back in list with + * immediate expiry value, so that we process it again + * on the next iteration. + */ + ret = rte_timer_alt_reset(sw->timer_data_id, tim, 0, + SINGLE, lcore, NULL, evtim); + if (ret < 0) { + EVTIM_LOG_DBG("event buffer full, failed to " + "reset timer with immediate " + "expiry value"); + } else { + sw->stats.evtim_retry_count++; + EVTIM_LOG_DBG("event buffer full, resetting " + "rte_timer with immediate " + "expiry value"); + } } else { - sw->stats.evtim_retry_count++; - EVTIM_LOG_DBG("event buffer full, resetting rte_timer " - "with immediate expiry value"); + sw->stats.evtim_drop_count++; } - if (unlikely(sw->in_use[lcore].v == 0)) { - sw->in_use[lcore].v = 1; - n_lcores = __atomic_fetch_add(&sw->n_poll_lcores, 1, - __ATOMIC_RELAXED); - __atomic_store_n(&sw->poll_lcores[n_lcores], lcore, - __ATOMIC_RELAXED); - } } else { EVTIM_BUF_LOG_DBG("buffered an event timer expiry event"); @@ -654,10 +673,15 @@ swtim_callback(struct rte_timer *tim) sw->n_expired_timers = 0; } - sw->expired_timers[sw->n_expired_timers++] = tim; + /* Don't free rte_timer for a periodic event timer until + * it is cancelled + */ + if (type == SINGLE) + sw->expired_timers[sw->n_expired_timers++] = tim; sw->stats.evtim_exp_count++; - __atomic_store_n(&evtim->state, RTE_EVENT_TIMER_NOT_ARMED, + if (type == SINGLE) + __atomic_store_n(&evtim->state, RTE_EVENT_TIMER_NOT_ARMED, __ATOMIC_RELEASE); } @@ -947,6 +971,12 @@ swtim_uninit(struct rte_event_timer_adapter *adapter) swtim_free_tim, sw); + ret = rte_timer_data_dealloc(sw->timer_data_id); + if (ret < 0) { + EVTIM_LOG_ERR("failed to deallocate timer data instance"); + return ret; + } + ret = rte_service_component_unregister(sw->service_id); if (ret < 0) { EVTIM_LOG_ERR("failed to unregister service component"); @@ -1053,6 +1083,7 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter, /* Timer list for this lcore is not in use. */ uint16_t exp_state = 0; enum rte_event_timer_state n_state; + enum rte_timer_type type = SINGLE; #ifdef RTE_LIBRTE_EVENTDEV_DEBUG /* Check that the service is running. */ @@ -1092,6 +1123,9 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter, return 0; } + /* update timer type for periodic adapter */ + type = get_timer_type(adapter); + for (i = 0; i < nb_evtims; i++) { n_state = __atomic_load_n(&evtims[i]->state, __ATOMIC_ACQUIRE); if (n_state == RTE_EVENT_TIMER_ARMED) { @@ -1135,7 +1169,7 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter, cycles = get_timeout_cycles(evtims[i], adapter); ret = rte_timer_alt_reset(sw->timer_data_id, tim, cycles, - SINGLE, lcore_id, NULL, evtims[i]); + type, lcore_id, NULL, evtims[i]); if (ret < 0) { /* tim was in RUNNING or CONFIG state */ __atomic_store_n(&evtims[i]->state, diff --git a/lib/eventdev/rte_event_timer_adapter.h b/lib/eventdev/rte_event_timer_adapter.h index eab8e59a57..cd10db19e4 100644 --- a/lib/eventdev/rte_event_timer_adapter.h +++ b/lib/eventdev/rte_event_timer_adapter.h @@ -193,6 +193,8 @@ struct rte_event_timer_adapter_stats { /**< Event timer retry count */ uint64_t adapter_tick_count; /**< Tick count for the adapter, at its resolution */ + uint64_t evtim_drop_count; + /**< event timer expiries dropped */ }; struct rte_event_timer_adapter; diff --git a/lib/eventdev/rte_eventdev.c b/lib/eventdev/rte_eventdev.c index 1dc4f966be..4a2a1178da 100644 --- a/lib/eventdev/rte_eventdev.c +++ b/lib/eventdev/rte_eventdev.c @@ -139,7 +139,11 @@ rte_event_timer_adapter_caps_get(uint8_t dev_id, uint32_t *caps) if (caps == NULL) return -EINVAL; - *caps = 0; + + if (dev->dev_ops->timer_adapter_caps_get == NULL) + *caps = RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC; + else + *caps = 0; return dev->dev_ops->timer_adapter_caps_get ? (*dev->dev_ops->timer_adapter_caps_get)(dev, From patchwork Thu Aug 11 15:37:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Naga Harish K, S V" X-Patchwork-Id: 114844 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 17742A0548; Thu, 11 Aug 2022 17:37:08 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0A6E342BDF; Thu, 11 Aug 2022 17:37:08 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 9AAF742BFD for ; Thu, 11 Aug 2022 17:37:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660232226; x=1691768226; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=F67hkLC5e3IQUVR4Wb3tpVykcuHsjpYuPQOKwn1CIEo=; b=E5Z9L+Go0bHQ90KBChKsiFj83kE1+WNoKO7zXijtBRcfsft0auIxTXMx f/Y4qXM7IdR70qkgEMZL9NsvKZF37dR8coNM3RbIaVRUeqh4Xt2RhnsC/ 3Xd1D/PW/6FHW6/Qzc3dcyWXbiF/hZ4EqlsgOLOUYAF475TNuMyKWc6bq DE8hZhu9DZY5+gupyfhq7Q66sB/rlJaSIWgS4HJdAsAL//3YC0SwSfRmE VxxZZCnwE8Mu7/Tgazm2q8GWGd1zaGAPQIYeMzTv5Jig9OTFyBIHYjhuB tg8DOTNEzZOuoHgAsOCQdX0iQC4dxkKhgb1KdSsjVjWvmb10eBel47RIC A==; X-IronPort-AV: E=McAfee;i="6400,9594,10436"; a="355384752" X-IronPort-AV: E=Sophos;i="5.93,230,1654585200"; d="scan'208";a="355384752" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2022 08:37:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,230,1654585200"; d="scan'208";a="634274525" Received: from txandevlnx322.an.intel.com ([10.123.117.44]) by orsmga008.jf.intel.com with ESMTP; 11 Aug 2022 08:37:05 -0700 From: Naga Harish K S V To: erik.g.carrillo@intel.com, jerinj@marvell.com, harry.van.haaren@intel.com Cc: dev@dpdk.org Subject: [PATCH v3 2/4] event/sw: report periodic event timer capability Date: Thu, 11 Aug 2022 10:37:03 -0500 Message-Id: <20220811153703.3992464-1-s.v.naga.harish.k@intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20220810070943.3111058-1-s.v.naga.harish.k@intel.com> References: <20220810070943.3111058-1-s.v.naga.harish.k@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org update the software eventdev pmd timer_adapter_caps_get callback function to report the support of periodic event timer capability Signed-off-by: Naga Harish K S V --- drivers/event/sw/sw_evdev.c | 2 +- lib/eventdev/eventdev_pmd.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/event/sw/sw_evdev.c b/drivers/event/sw/sw_evdev.c index f93313b31b..6eddf8bd93 100644 --- a/drivers/event/sw/sw_evdev.c +++ b/drivers/event/sw/sw_evdev.c @@ -564,7 +564,7 @@ sw_timer_adapter_caps_get(const struct rte_eventdev *dev, uint64_t flags, { RTE_SET_USED(dev); RTE_SET_USED(flags); - *caps = 0; + *caps = RTE_EVENT_TIMER_ADAPTER_SW_CAP; /* Use default SW ops */ *ops = NULL; diff --git a/lib/eventdev/eventdev_pmd.h b/lib/eventdev/eventdev_pmd.h index 69402668d8..9d43b73570 100644 --- a/lib/eventdev/eventdev_pmd.h +++ b/lib/eventdev/eventdev_pmd.h @@ -77,6 +77,9 @@ extern "C" { #define RTE_EVENT_CRYPTO_ADAPTER_SW_CAP \ RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA +#define RTE_EVENT_TIMER_ADAPTER_SW_CAP \ + RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC + /**< Ethernet Rx adapter cap to return If the packet transfers from * the ethdev to eventdev use a SW service function */ From patchwork Thu Aug 11 15:37:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Naga Harish K, S V" X-Patchwork-Id: 114845 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 477EDA0548; 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a="353122495" X-IronPort-AV: E=Sophos;i="5.93,230,1654585200"; d="scan'208";a="353122495" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2022 08:37:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,230,1654585200"; d="scan'208";a="581716852" Received: from txandevlnx322.an.intel.com ([10.123.117.44]) by orsmga006.jf.intel.com with ESMTP; 11 Aug 2022 08:37:19 -0700 From: Naga Harish K S V To: erik.g.carrillo@intel.com Cc: dev@dpdk.org, stable@dpdk.org Subject: [PATCH v3 3/4] timer: fix function to stop all timers Date: Thu, 11 Aug 2022 10:37:17 -0500 Message-Id: <20220811153717.3992516-1-s.v.naga.harish.k@intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20220810070958.3111119-1-s.v.naga.harish.k@intel.com> References: <20220810070958.3111119-1-s.v.naga.harish.k@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org There is a possibility of deadlock in this API, as same spinlock is tried to be acquired in nested manner. If the lcore that is stopping the timer is different from the lcore that owns the timer, the timer list lock is acquired in timer_del(), even if local_is_locked is true. Because the same lock was already acquired in rte_timer_stop_all(), the thread will hang. This patch removes the acquisition of nested lock. Fixes: 821c51267bcd63a ("timer: add function to stop all timers in a list") Cc: stable@dpdk.org Signed-off-by: Naga Harish K S V --- lib/timer/rte_timer.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/lib/timer/rte_timer.c b/lib/timer/rte_timer.c index 9994813d0d..85d67573eb 100644 --- a/lib/timer/rte_timer.c +++ b/lib/timer/rte_timer.c @@ -580,7 +580,7 @@ rte_timer_reset_sync(struct rte_timer *tim, uint64_t ticks, } static int -__rte_timer_stop(struct rte_timer *tim, int local_is_locked, +__rte_timer_stop(struct rte_timer *tim, struct rte_timer_data *timer_data) { union rte_timer_status prev_status, status; @@ -602,7 +602,7 @@ __rte_timer_stop(struct rte_timer *tim, int local_is_locked, /* remove it from list */ if (prev_status.state == RTE_TIMER_PENDING) { - timer_del(tim, prev_status, local_is_locked, priv_timer); + timer_del(tim, prev_status, 0, priv_timer); __TIMER_STAT_ADD(priv_timer, pending, -1); } @@ -631,7 +631,7 @@ rte_timer_alt_stop(uint32_t timer_data_id, struct rte_timer *tim) TIMER_DATA_VALID_GET_OR_ERR_RET(timer_data_id, timer_data, -EINVAL); - return __rte_timer_stop(tim, 0, timer_data); + return __rte_timer_stop(tim, timer_data); } /* loop until rte_timer_stop() succeed */ @@ -987,21 +987,16 @@ rte_timer_stop_all(uint32_t timer_data_id, unsigned int *walk_lcores, walk_lcore = walk_lcores[i]; priv_timer = &timer_data->priv_timer[walk_lcore]; - rte_spinlock_lock(&priv_timer->list_lock); - for (tim = priv_timer->pending_head.sl_next[0]; tim != NULL; tim = next_tim) { next_tim = tim->sl_next[0]; - /* Call timer_stop with lock held */ - __rte_timer_stop(tim, 1, timer_data); + __rte_timer_stop(tim, timer_data); if (f) f(tim, f_arg); } - - rte_spinlock_unlock(&priv_timer->list_lock); } return 0; From patchwork Thu Aug 11 15:36:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Naga Harish K, S V" X-Patchwork-Id: 114843 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 51790A0548; Thu, 11 Aug 2022 17:36:49 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9AE2142BE8; Thu, 11 Aug 2022 17:36:46 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id EF67942B98 for ; Thu, 11 Aug 2022 17:36:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660232205; x=1691768205; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PjQ+ikNOEbXxCahYTaxey2C1bisMM2EmSzql4Rx9vh0=; b=ef7zz18hDy4oL4M2idU2GCW9B1Ysf+xs6KTI3/T6Vsvk/fjl2a7em8Yv zqGteYIIceyFuAE+HCQMzqMYI1Cu7C16c1Od5eUXQALzn+c9WeH/31vdE URUKnUQ/1KSkT4gNSoik/Wfs1g8arMkPFpAbXhc+ar50LZhK8czkJqa7i e0rJ5gWP6LdrtM89SjTJmuZbPVAovM36Zyw0Rr7BXLwvk7ybwBnnY/9p3 ZCz+yM/RMHji26Ek2sAce9RuQdQ7o0NtNKubgDDWvld1jddldbYN4TvtA hfaBYVjbudL4doO3GlDJkr2vsnIB2rqY9Do/bB7UP2i38vRYcefVzP9hO g==; X-IronPort-AV: E=McAfee;i="6400,9594,10436"; a="292641431" X-IronPort-AV: E=Sophos;i="5.93,230,1654585200"; d="scan'208";a="292641431" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2022 08:36:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,230,1654585200"; d="scan'208";a="665427749" Received: from txandevlnx322.an.intel.com ([10.123.117.44]) by fmsmga008.fm.intel.com with ESMTP; 11 Aug 2022 08:36:43 -0700 From: Naga Harish K S V To: erik.g.carrillo@intel.com, jerinj@marvell.com Cc: pbhagavatula@marvell.com, sthotton@marvell.com, dev@dpdk.org Subject: [PATCH v3 4/4] test/event: update periodic event timer tests Date: Thu, 11 Aug 2022 10:36:38 -0500 Message-Id: <20220811153638.3992403-2-s.v.naga.harish.k@intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20220811153638.3992403-1-s.v.naga.harish.k@intel.com> References: <20220810070722.3110873-1-s.v.naga.harish.k@intel.com> <20220811153638.3992403-1-s.v.naga.harish.k@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch updates the software timer adapter tests to configure and use periodic event timers. Signed-off-by: Naga Harish K S V --- app/test/test_event_timer_adapter.c | 41 ++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 4 deletions(-) diff --git a/app/test/test_event_timer_adapter.c b/app/test/test_event_timer_adapter.c index d6170bb589..654c412836 100644 --- a/app/test/test_event_timer_adapter.c +++ b/app/test/test_event_timer_adapter.c @@ -386,11 +386,22 @@ timdev_setup_msec(void) static int timdev_setup_msec_periodic(void) { + uint32_t caps = 0; + uint64_t max_tmo_ns; + uint64_t flags = RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES | RTE_EVENT_TIMER_ADAPTER_F_PERIODIC; + TEST_ASSERT_SUCCESS(rte_event_timer_adapter_caps_get(evdev, &caps), + "failed to get adapter capabilities"); + + if (caps & RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT) + max_tmo_ns = 0; + else + max_tmo_ns = 180 * NSECPERSEC; + /* Periodic mode with 100 ms resolution */ - return _timdev_setup(0, NSECPERSEC / 10, flags); + return _timdev_setup(max_tmo_ns, NSECPERSEC / 10, flags); } static int @@ -409,7 +420,7 @@ timdev_setup_sec_periodic(void) RTE_EVENT_TIMER_ADAPTER_F_PERIODIC; /* Periodic mode with 1 sec resolution */ - return _timdev_setup(0, NSECPERSEC, flags); + return _timdev_setup(180 * NSECPERSEC, NSECPERSEC, flags); } static int @@ -561,12 +572,23 @@ test_timer_arm(void) static inline int test_timer_arm_periodic(void) { + uint32_t caps = 0; + uint32_t timeout_count = 0; + TEST_ASSERT_SUCCESS(_arm_timers(1, MAX_TIMERS), "Failed to arm timers"); /* With a resolution of 100ms and wait time of 1sec, * there will be 10 * MAX_TIMERS periodic timer triggers. */ - TEST_ASSERT_SUCCESS(_wait_timer_triggers(1, 10 * MAX_TIMERS, 0), + TEST_ASSERT_SUCCESS(rte_event_timer_adapter_caps_get(evdev, &caps), + "failed to get adapter capabilities"); + + if (caps & RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT) + timeout_count = 10; + else + timeout_count = 9; + + TEST_ASSERT_SUCCESS(_wait_timer_triggers(1, timeout_count * MAX_TIMERS, 0), "Timer triggered count doesn't match arm count"); return TEST_SUCCESS; } @@ -649,12 +671,23 @@ test_timer_arm_burst(void) static inline int test_timer_arm_burst_periodic(void) { + uint32_t caps = 0; + uint32_t timeout_count = 0; + TEST_ASSERT_SUCCESS(_arm_timers_burst(1, MAX_TIMERS), "Failed to arm timers"); /* With a resolution of 100ms and wait time of 1sec, * there will be 10 * MAX_TIMERS periodic timer triggers. */ - TEST_ASSERT_SUCCESS(_wait_timer_triggers(1, 10 * MAX_TIMERS, 0), + TEST_ASSERT_SUCCESS(rte_event_timer_adapter_caps_get(evdev, &caps), + "failed to get adapter capabilities"); + + if (caps & RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT) + timeout_count = 10; + else + timeout_count = 9; + + TEST_ASSERT_SUCCESS(_wait_timer_triggers(1, timeout_count * MAX_TIMERS, 0), "Timer triggered count doesn't match arm count"); return TEST_SUCCESS;