From patchwork Thu Sep 1 06:16:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanumanth Pothula X-Patchwork-Id: 115699 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A3CEBA0032; Thu, 1 Sep 2022 08:16:17 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4A18E40684; Thu, 1 Sep 2022 08:16:17 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 2A16940395 for ; Thu, 1 Sep 2022 08:16:14 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2811ZQKW020801 for ; Wed, 31 Aug 2022 23:16:14 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=cr8tEhXM277JIWeMTqeVIgtgBJYZL/OVIjiQpYloiiY=; b=AGDa54XoRh7wk8XVTB8wzyWTTE/+Az+gTdFp0xscVUG4RnAHAs3fywhkyKgvdPGQLDE+ KLd7valGgzo1XD9i1hS1437JoTYMRkhwy2hnstgvpG5Yu/w/i2wSzTFiezEGFDbf5Adm 3oKc9aZxFrN7c0VojAyIoU2yXe32VkttCLpaoh40eJEBT+Y8D7oo54+p2SbUraeJnH3e 70tRCCvw4+SrXhzHfqnDTesi8SDvD0ePf3JYoMVzuAXvpelR8mfQjQdlQDlaCWgsHxQA 2jvQQp1SgJLW9bUhEg6GITFGt5mCxrf7wE6ird8pgFq1648iUYawJmS9qz8F/hlenB0h Eg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3jak730v5g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 31 Aug 2022 23:16:14 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 31 Aug 2022 23:16:12 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 31 Aug 2022 23:16:12 -0700 Received: from localhost.localdomain (unknown [10.28.36.155]) by maili.marvell.com (Postfix) with ESMTP id 8A9F25B6927; Wed, 31 Aug 2022 23:16:10 -0700 (PDT) From: Hanumanth Pothula To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , , Subject: [PATCH v1 1/1] net/cnxk: resolve fail to set large Rx/Tx queues Date: Thu, 1 Sep 2022 11:46:06 +0530 Message-ID: <20220901061606.2507989-1-hpothula@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-GUID: uDnDuMePbiHxSQ3Nin6FN7Do1rKMdOQI X-Proofpoint-ORIG-GUID: uDnDuMePbiHxSQ3Nin6FN7Do1rKMdOQI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-09-01_04,2022-08-31_03,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org While configuring NIX, local variables 'nb_rxq' and 'nb_txq' are declared as 8bit variables, leading to an integer overflow when an application sends Rxq/Txq value greater than 255. Hence, declare local variables, 'nb_rxq' and 'nb_txq' as 16bit variable. Also, during the cleanup, make sure PFC tree is not created. Signed-off-by: Hanumanth Pothula --- drivers/net/cnxk/cnxk_ethdev.c | 2 +- drivers/net/cnxk/cnxk_ethdev_ops.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index cfcc4df916..c0a8e901a3 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -1074,7 +1074,7 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) struct roc_nix_fc_cfg fc_cfg = {0}; struct roc_nix *nix = &dev->nix; struct rte_ether_addr *ea; - uint8_t nb_rxq, nb_txq; + uint16_t nb_rxq, nb_txq; uint64_t rx_cfg; void *qs; int rc; diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c index 1592971073..b417d61771 100644 --- a/drivers/net/cnxk/cnxk_ethdev_ops.c +++ b/drivers/net/cnxk/cnxk_ethdev_ops.c @@ -1142,8 +1142,10 @@ nix_priority_flow_ctrl_sq_conf(struct rte_eth_dev *eth_dev, uint16_t qid, if (qid >= eth_dev->data->nb_tx_queues) return -ENOTSUP; - /* Check if RX pause frame is enabled or not */ - if (!pfc->rx_pause_en) { + /* Check if RX pause frame is enabled or not and + * confirm user requested for PFC. + */ + if (!pfc->rx_pause_en && rx_pause) { if ((roc_nix_tm_tree_type_get(nix) == ROC_NIX_TM_DEFAULT) && eth_dev->data->nb_tx_queues > 1) { /*