From patchwork Wed Sep 21 13:56:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 116556 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 98256A00C3; Wed, 21 Sep 2022 15:56:55 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8CF10410EE; Wed, 21 Sep 2022 15:56:55 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 34A2A4014F for ; Wed, 21 Sep 2022 15:56:54 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28LBPsxC032700; Wed, 21 Sep 2022 06:56:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=xIFhZYJpffqhi+vB1AimKC47Mz8DcnvjirE04YK9CFA=; b=RbSn8namXC3hMOexutmEWL2jXEIO/C5DbkeUtIUjmYWGF/ORrwujTq8Irvg0FeqDn6FM YG4QtrAEL/XcCGGN7vmAVXigKgiQz+ix4xWwOdpLkO6AqH2Vu86FlDTvmnQavJ9lXqq2 7agVPXl0HrzaU5QbwD0mhFwjc1YiuedD/WdCOUlZ2vw0/Ft4BODVHkoBp8FkeBN2ORi4 hn3kK5qBEAmx7yKdZNwEtMXeUkF/5maCVBDoxEBTuDnEsSPsbGrei2r9SDXSI2qLE+n4 zoToddYOfQ3hvtTuq/AEZs9qp1lKEkpK0Ar9xglP+fGex2TwYhZhtkNqVteiSGJxzsEA yQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3jr1qmgghn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 21 Sep 2022 06:56:50 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 21 Sep 2022 06:56:48 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Wed, 21 Sep 2022 06:56:48 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id 31B1A3F7051; Wed, 21 Sep 2022 06:56:42 -0700 (PDT) From: Shijith Thotton To: CC: , Shijith Thotton , , , , , , , , , Nicolas Chautru , Ciara Power , Konstantin Ananyev , Chengwen Feng , Kevin Laatz , Reshma Pattan , Maxime Coquelin , Chenbo Xia Subject: [PATCH v3 1/5] build: add meson option to configure IOVA mode as VA Date: Wed, 21 Sep 2022 19:26:17 +0530 Message-ID: <4fbe435f0d86ef1bc7930bdb5847f41e2042f693.1663767715.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: <20220907134340.3629224-1-sthotton@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: IQ8zZm7KYPyHrhmXVjWBY7z2NhN0KR0N X-Proofpoint-ORIG-GUID: IQ8zZm7KYPyHrhmXVjWBY7z2NhN0KR0N X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-21_08,2022-09-20_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org IOVA mode in DPDK is either PA or VA. The new build option iova_as_va configures the mode to VA at compile time and prevents setting it to PA at runtime. For now, all drivers which are not always enabled are disabled with this option. Supported driver can set the flag pmd_iova_as_va in its build file to enable build. mbuf structure holds the physical (PA) and virtual address (VA) of a buffer. if IOVA mode is set to VA, PA is redundant as it is the same as VA. So PA field need not be updated and marked invalid if the build is configured to use only VA. Signed-off-by: Shijith Thotton --- app/test-bbdev/test_bbdev_perf.c | 2 +- app/test-crypto-perf/cperf_test_common.c | 5 +-- app/test/test_bpf.c | 2 +- app/test/test_dmadev.c | 33 ++++++--------- app/test/test_mbuf.c | 12 +++--- app/test/test_pcapng.c | 2 +- config/meson.build | 1 + drivers/meson.build | 6 +++ lib/eal/linux/eal.c | 7 +++ lib/mbuf/rte_mbuf.c | 8 ++-- lib/mbuf/rte_mbuf.h | 17 +++++--- lib/mbuf/rte_mbuf_core.h | 10 +++++ lib/vhost/vhost.h | 2 +- lib/vhost/vhost_crypto.c | 54 ++++++++++++++++++------ meson_options.txt | 2 + 15 files changed, 109 insertions(+), 54 deletions(-) diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c index 8fab52d821..f6aa25b67d 100644 --- a/app/test-bbdev/test_bbdev_perf.c +++ b/app/test-bbdev/test_bbdev_perf.c @@ -1001,7 +1001,7 @@ init_op_data_objs(struct rte_bbdev_op_data *bufs, seg->length); memcpy(data, seg->addr, seg->length); m_head->buf_addr = data; - m_head->buf_iova = rte_malloc_virt2iova(data); + rte_mbuf_iova_set(m_head, rte_malloc_virt2iova(data)); m_head->data_off = 0; m_head->data_len = seg->length; } else { diff --git a/app/test-crypto-perf/cperf_test_common.c b/app/test-crypto-perf/cperf_test_common.c index 00aadc9a47..27646cd619 100644 --- a/app/test-crypto-perf/cperf_test_common.c +++ b/app/test-crypto-perf/cperf_test_common.c @@ -26,8 +26,7 @@ fill_single_seg_mbuf(struct rte_mbuf *m, struct rte_mempool *mp, /* start of buffer is after mbuf structure and priv data */ m->priv_size = 0; m->buf_addr = (char *)m + mbuf_hdr_size; - m->buf_iova = rte_mempool_virt2iova(obj) + - mbuf_offset + mbuf_hdr_size; + rte_mbuf_iova_set(m, rte_mempool_virt2iova(obj) + mbuf_offset + mbuf_hdr_size); m->buf_len = segment_sz; m->data_len = data_len; m->pkt_len = data_len; @@ -58,7 +57,7 @@ fill_multi_seg_mbuf(struct rte_mbuf *m, struct rte_mempool *mp, /* start of buffer is after mbuf structure and priv data */ m->priv_size = 0; m->buf_addr = (char *)m + mbuf_hdr_size; - m->buf_iova = next_seg_phys_addr; + rte_mbuf_iova_set(m, next_seg_phys_addr); next_seg_phys_addr += mbuf_hdr_size + segment_sz; m->buf_len = segment_sz; m->data_len = data_len; diff --git a/app/test/test_bpf.c b/app/test/test_bpf.c index 97f500809e..f5af5e8a3f 100644 --- a/app/test/test_bpf.c +++ b/app/test/test_bpf.c @@ -2600,7 +2600,7 @@ dummy_mbuf_prep(struct rte_mbuf *mb, uint8_t buf[], uint32_t buf_len, uint8_t *db; mb->buf_addr = buf; - mb->buf_iova = (uintptr_t)buf; + rte_mbuf_iova_set(mb, (uintptr_t)buf); mb->buf_len = buf_len; rte_mbuf_refcnt_set(mb, 1); diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c index 9e8e101f40..8306947eda 100644 --- a/app/test/test_dmadev.c +++ b/app/test/test_dmadev.c @@ -110,8 +110,8 @@ do_multi_copies(int16_t dev_id, uint16_t vchan, for (j = 0; j < COPY_LEN/sizeof(uint64_t); j++) src_data[j] = rte_rand(); - if (rte_dma_copy(dev_id, vchan, srcs[i]->buf_iova + srcs[i]->data_off, - dsts[i]->buf_iova + dsts[i]->data_off, COPY_LEN, 0) != id_count++) + if (rte_dma_copy(dev_id, vchan, rte_pktmbuf_iova_offset(srcs[i], 0), + rte_pktmbuf_iova_offset(dsts[i], 0), COPY_LEN, 0) != id_count++) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", i); } rte_dma_submit(dev_id, vchan); @@ -317,9 +317,8 @@ test_failure_in_full_burst(int16_t dev_id, uint16_t vchan, bool fence, rte_dma_stats_get(dev_id, vchan, &baseline); /* get a baseline set of stats */ for (i = 0; i < COMP_BURST_SZ; i++) { int id = rte_dma_copy(dev_id, vchan, - (i == fail_idx ? 0 : (srcs[i]->buf_iova + srcs[i]->data_off)), - dsts[i]->buf_iova + dsts[i]->data_off, - COPY_LEN, OPT_FENCE(i)); + (i == fail_idx ? 0 : rte_pktmbuf_iova_offset(srcs[i], 0)), + rte_pktmbuf_iova_offset(dsts[i], 0), COPY_LEN, OPT_FENCE(i)); if (id < 0) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", i); if (i == fail_idx) @@ -407,9 +406,8 @@ test_individual_status_query_with_failure(int16_t dev_id, uint16_t vchan, bool f for (j = 0; j < COMP_BURST_SZ; j++) { int id = rte_dma_copy(dev_id, vchan, - (j == fail_idx ? 0 : (srcs[j]->buf_iova + srcs[j]->data_off)), - dsts[j]->buf_iova + dsts[j]->data_off, - COPY_LEN, OPT_FENCE(j)); + (j == fail_idx ? 0 : rte_pktmbuf_iova_offset(srcs[j], 0)), + rte_pktmbuf_iova_offset(dsts[j], 0), COPY_LEN, OPT_FENCE(j)); if (id < 0) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", j); if (j == fail_idx) @@ -470,9 +468,8 @@ test_single_item_status_query_with_failure(int16_t dev_id, uint16_t vchan, for (j = 0; j < COMP_BURST_SZ; j++) { int id = rte_dma_copy(dev_id, vchan, - (j == fail_idx ? 0 : (srcs[j]->buf_iova + srcs[j]->data_off)), - dsts[j]->buf_iova + dsts[j]->data_off, - COPY_LEN, 0); + (j == fail_idx ? 0 : rte_pktmbuf_iova_offset(srcs[j], 0)), + rte_pktmbuf_iova_offset(dsts[j], 0), COPY_LEN, 0); if (id < 0) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", j); if (j == fail_idx) @@ -529,15 +526,14 @@ test_multi_failure(int16_t dev_id, uint16_t vchan, struct rte_mbuf **srcs, struc /* enqueue and gather completions in one go */ for (j = 0; j < COMP_BURST_SZ; j++) { - uintptr_t src = srcs[j]->buf_iova + srcs[j]->data_off; + uintptr_t src = rte_pktmbuf_iova_offset(srcs[j], 0); /* set up for failure if the current index is anywhere is the fails array */ for (i = 0; i < num_fail; i++) if (j == fail[i]) src = 0; - int id = rte_dma_copy(dev_id, vchan, - src, dsts[j]->buf_iova + dsts[j]->data_off, - COPY_LEN, 0); + int id = rte_dma_copy(dev_id, vchan, src, rte_pktmbuf_iova_offset(dsts[j], 0), + COPY_LEN, 0); if (id < 0) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", j); } @@ -565,15 +561,14 @@ test_multi_failure(int16_t dev_id, uint16_t vchan, struct rte_mbuf **srcs, struc /* enqueue and gather completions in bursts, but getting errors one at a time */ for (j = 0; j < COMP_BURST_SZ; j++) { - uintptr_t src = srcs[j]->buf_iova + srcs[j]->data_off; + uintptr_t src = rte_pktmbuf_iova_offset(srcs[j], 0); /* set up for failure if the current index is anywhere is the fails array */ for (i = 0; i < num_fail; i++) if (j == fail[i]) src = 0; - int id = rte_dma_copy(dev_id, vchan, - src, dsts[j]->buf_iova + dsts[j]->data_off, - COPY_LEN, 0); + int id = rte_dma_copy(dev_id, vchan, src, rte_pktmbuf_iova_offset(dsts[j], 0), + COPY_LEN, 0); if (id < 0) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", j); } diff --git a/app/test/test_mbuf.c b/app/test/test_mbuf.c index e09b2549ca..45431f2c9c 100644 --- a/app/test/test_mbuf.c +++ b/app/test/test_mbuf.c @@ -1232,11 +1232,13 @@ test_failing_mbuf_sanity_check(struct rte_mempool *pktmbuf_pool) return -1; } - badbuf = *buf; - badbuf.buf_iova = 0; - if (verify_mbuf_check_panics(&badbuf)) { - printf("Error with bad-physaddr mbuf test\n"); - return -1; + if (!RTE_IOVA_AS_VA) { + badbuf = *buf; + rte_mbuf_iova_set(&badbuf, 0); + if (verify_mbuf_check_panics(&badbuf)) { + printf("Error with bad-physaddr mbuf test\n"); + return -1; + } } badbuf = *buf; diff --git a/app/test/test_pcapng.c b/app/test/test_pcapng.c index 320dacea34..abbf00f6da 100644 --- a/app/test/test_pcapng.c +++ b/app/test/test_pcapng.c @@ -40,7 +40,7 @@ dummy_mbuf_prep(struct rte_mbuf *mb, uint8_t buf[], uint32_t buf_len, uint8_t *db; mb->buf_addr = buf; - mb->buf_iova = (uintptr_t)buf; + rte_mbuf_iova_set(mb, (uintptr_t)buf); mb->buf_len = buf_len; rte_mbuf_refcnt_set(mb, 1); diff --git a/config/meson.build b/config/meson.build index 7f7b6c92fd..6b6c3e7eb6 100644 --- a/config/meson.build +++ b/config/meson.build @@ -309,6 +309,7 @@ endif if get_option('mbuf_refcnt_atomic') dpdk_conf.set('RTE_MBUF_REFCNT_ATOMIC', true) endif +dpdk_conf.set10('RTE_IOVA_AS_VA', get_option('iova_as_va')) compile_time_cpuflags = [] subdir(arch_subdir) diff --git a/drivers/meson.build b/drivers/meson.build index 376a64f4da..989770cffd 100644 --- a/drivers/meson.build +++ b/drivers/meson.build @@ -105,6 +105,7 @@ foreach subpath:subdirs ext_deps = [] pkgconfig_extra_libs = [] testpmd_sources = [] + pmd_iova_as_va = false if not enable_drivers.contains(drv_path) build = false @@ -122,6 +123,11 @@ foreach subpath:subdirs # pull in driver directory which should update all the local variables subdir(drv_path) + if dpdk_conf.get('RTE_IOVA_AS_VA') == 1 and not pmd_iova_as_va and not always_enable.contains(drv_path) + build = false + reason = 'driver does not support IOVA as VA mode' + endif + # get dependency objs from strings shared_deps = ext_deps static_deps = ext_deps diff --git a/lib/eal/linux/eal.c b/lib/eal/linux/eal.c index 37d29643a5..b70c4dcc5f 100644 --- a/lib/eal/linux/eal.c +++ b/lib/eal/linux/eal.c @@ -1127,6 +1127,13 @@ rte_eal_init(int argc, char **argv) return -1; } + if (rte_eal_iova_mode() == RTE_IOVA_PA && RTE_IOVA_AS_VA) { + rte_eal_init_alert( + "Cannot use IOVA as 'PA' since build is configured to use only 'VA'"); + rte_errno = EINVAL; + return -1; + } + RTE_LOG(INFO, EAL, "Selected IOVA mode '%s'\n", rte_eal_iova_mode() == RTE_IOVA_PA ? "PA" : "VA"); diff --git a/lib/mbuf/rte_mbuf.c b/lib/mbuf/rte_mbuf.c index a2307cebe6..5af290c53a 100644 --- a/lib/mbuf/rte_mbuf.c +++ b/lib/mbuf/rte_mbuf.c @@ -89,7 +89,7 @@ rte_pktmbuf_init(struct rte_mempool *mp, /* start of buffer is after mbuf structure and priv data */ m->priv_size = priv_size; m->buf_addr = (char *)m + mbuf_size; - m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size; + rte_mbuf_iova_set(m, rte_mempool_virt2iova(m) + mbuf_size); m->buf_len = (uint16_t)buf_len; /* keep some headroom between start of buffer and data */ @@ -187,8 +187,8 @@ __rte_pktmbuf_init_extmem(struct rte_mempool *mp, RTE_ASSERT(ctx->off + ext_mem->elt_size <= ext_mem->buf_len); m->buf_addr = RTE_PTR_ADD(ext_mem->buf_ptr, ctx->off); - m->buf_iova = ext_mem->buf_iova == RTE_BAD_IOVA ? - RTE_BAD_IOVA : (ext_mem->buf_iova + ctx->off); + rte_mbuf_iova_set(m, ext_mem->buf_iova == RTE_BAD_IOVA ? RTE_BAD_IOVA : + (ext_mem->buf_iova + ctx->off)); ctx->off += ext_mem->elt_size; if (ctx->off + ext_mem->elt_size > ext_mem->buf_len) { @@ -388,7 +388,7 @@ int rte_mbuf_check(const struct rte_mbuf *m, int is_header, *reason = "bad mbuf pool"; return -1; } - if (m->buf_iova == 0) { + if (m->buf_iova == 0 && !RTE_IOVA_AS_VA) { *reason = "bad IO addr"; return -1; } diff --git a/lib/mbuf/rte_mbuf.h b/lib/mbuf/rte_mbuf.h index 9811e8c760..05be146bc2 100644 --- a/lib/mbuf/rte_mbuf.h +++ b/lib/mbuf/rte_mbuf.h @@ -146,7 +146,7 @@ static inline uint16_t rte_pktmbuf_priv_size(struct rte_mempool *mp); static inline rte_iova_t rte_mbuf_data_iova(const struct rte_mbuf *mb) { - return mb->buf_iova + mb->data_off; + return (RTE_IOVA_AS_VA ? (uint64_t)mb->buf_addr : mb->buf_iova) + mb->data_off; } /** @@ -164,7 +164,7 @@ rte_mbuf_data_iova(const struct rte_mbuf *mb) static inline rte_iova_t rte_mbuf_data_iova_default(const struct rte_mbuf *mb) { - return mb->buf_iova + RTE_PKTMBUF_HEADROOM; + return (RTE_IOVA_AS_VA ? (uint64_t)mb->buf_addr : mb->buf_iova) + RTE_PKTMBUF_HEADROOM; } /** @@ -469,6 +469,13 @@ rte_mbuf_ext_refcnt_update(struct rte_mbuf_ext_shared_info *shinfo, __ATOMIC_ACQ_REL); } +static inline void +rte_mbuf_iova_set(struct rte_mbuf *m, rte_iova_t iova) +{ + if (!RTE_IOVA_AS_VA) + m->buf_iova = iova; +} + /** Mbuf prefetch */ #define RTE_MBUF_PREFETCH_TO_FREE(m) do { \ if ((m) != NULL) \ @@ -1056,7 +1063,7 @@ rte_pktmbuf_attach_extbuf(struct rte_mbuf *m, void *buf_addr, RTE_ASSERT(shinfo->free_cb != NULL); m->buf_addr = buf_addr; - m->buf_iova = buf_iova; + rte_mbuf_iova_set(m, buf_iova); m->buf_len = buf_len; m->data_len = 0; @@ -1143,7 +1150,7 @@ static inline void rte_pktmbuf_attach(struct rte_mbuf *mi, struct rte_mbuf *m) mi->data_off = m->data_off; mi->data_len = m->data_len; - mi->buf_iova = m->buf_iova; + rte_mbuf_iova_set(mi, m->buf_iova); mi->buf_addr = m->buf_addr; mi->buf_len = m->buf_len; @@ -1245,7 +1252,7 @@ static inline void rte_pktmbuf_detach(struct rte_mbuf *m) m->priv_size = priv_size; m->buf_addr = (char *)m + mbuf_size; - m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size; + rte_mbuf_iova_set(m, rte_mempool_virt2iova(m) + mbuf_size); m->buf_len = (uint16_t)buf_len; rte_pktmbuf_reset_headroom(m); m->data_len = 0; diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h index 3d6ddd6773..c6292e7252 100644 --- a/lib/mbuf/rte_mbuf_core.h +++ b/lib/mbuf/rte_mbuf_core.h @@ -581,6 +581,8 @@ struct rte_mbuf { void *buf_addr; /**< Virtual address of segment buffer. */ /** * Physical address of segment buffer. + * This field is invalid if the build is configured to use only + * virtual address as IOVA (i.e. RTE_IOVA_AS_VA is 1). * Force alignment to 8-bytes, so as to ensure we have the exact * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes * working on vector drivers easier. @@ -848,8 +850,12 @@ struct rte_mbuf_ext_shared_info { * @param o * The offset into the data to calculate address from. */ +#if RTE_IOVA_AS_VA +#define rte_pktmbuf_iova_offset(m, o) rte_pktmbuf_mtod_offset(m, rte_iova_t, o) +#else #define rte_pktmbuf_iova_offset(m, o) \ (rte_iova_t)((m)->buf_iova + (m)->data_off + (o)) +#endif /** * A macro that returns the IO address that points to the start of the @@ -858,7 +864,11 @@ struct rte_mbuf_ext_shared_info { * @param m * The packet mbuf. */ +#if RTE_IOVA_AS_VA +#define rte_pktmbuf_iova(m) rte_pktmbuf_mtod(m, rte_iova_t) +#else #define rte_pktmbuf_iova(m) rte_pktmbuf_iova_offset(m, 0) +#endif #ifdef __cplusplus } diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h index 782d916ae0..05cde6e118 100644 --- a/lib/vhost/vhost.h +++ b/lib/vhost/vhost.h @@ -967,7 +967,7 @@ restore_mbuf(struct rte_mbuf *m) /* start of buffer is after mbuf structure and priv data */ m->buf_addr = (char *)m + mbuf_size; - m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size; + rte_mbuf_iova_set(m, rte_mempool_virt2iova(m) + mbuf_size); m = m->next; } } diff --git a/lib/vhost/vhost_crypto.c b/lib/vhost/vhost_crypto.c index 54946f46d9..7b50735796 100644 --- a/lib/vhost/vhost_crypto.c +++ b/lib/vhost/vhost_crypto.c @@ -823,11 +823,17 @@ prepare_sym_cipher_op(struct vhost_crypto *vcrypto, struct rte_crypto_op *op, switch (vcrypto->option) { case RTE_VHOST_CRYPTO_ZERO_COPY_ENABLE: m_src->data_len = cipher->para.src_data_len; - m_src->buf_iova = gpa_to_hpa(vcrypto->dev, desc->addr, - cipher->para.src_data_len); + if (!RTE_IOVA_AS_VA) { + m_src->buf_iova = + gpa_to_hpa(vcrypto->dev, desc->addr, cipher->para.src_data_len); + if (unlikely(m_src->buf_iova == 0)) { + VC_LOG_ERR("zero_copy may fail due to cross page data"); + ret = VIRTIO_CRYPTO_ERR; + goto error_exit; + } + } m_src->buf_addr = get_data_ptr(vc_req, desc, VHOST_ACCESS_RO); - if (unlikely(m_src->buf_iova == 0 || - m_src->buf_addr == NULL)) { + if (unlikely(m_src->buf_addr == NULL)) { VC_LOG_ERR("zero_copy may fail due to cross page data"); ret = VIRTIO_CRYPTO_ERR; goto error_exit; @@ -867,10 +873,17 @@ prepare_sym_cipher_op(struct vhost_crypto *vcrypto, struct rte_crypto_op *op, switch (vcrypto->option) { case RTE_VHOST_CRYPTO_ZERO_COPY_ENABLE: - m_dst->buf_iova = gpa_to_hpa(vcrypto->dev, - desc->addr, cipher->para.dst_data_len); + if (!RTE_IOVA_AS_VA) { + m_dst->buf_iova = + gpa_to_hpa(vcrypto->dev, desc->addr, cipher->para.dst_data_len); + if (unlikely(m_dst->buf_iova == 0)) { + VC_LOG_ERR("zero_copy may fail due to cross page data"); + ret = VIRTIO_CRYPTO_ERR; + goto error_exit; + } + } m_dst->buf_addr = get_data_ptr(vc_req, desc, VHOST_ACCESS_RW); - if (unlikely(m_dst->buf_iova == 0 || m_dst->buf_addr == NULL)) { + if (unlikely(m_dst->buf_addr == NULL)) { VC_LOG_ERR("zero_copy may fail due to cross page data"); ret = VIRTIO_CRYPTO_ERR; goto error_exit; @@ -980,11 +993,17 @@ prepare_sym_chain_op(struct vhost_crypto *vcrypto, struct rte_crypto_op *op, case RTE_VHOST_CRYPTO_ZERO_COPY_ENABLE: m_src->data_len = chain->para.src_data_len; m_dst->data_len = chain->para.dst_data_len; - - m_src->buf_iova = gpa_to_hpa(vcrypto->dev, desc->addr, - chain->para.src_data_len); + if (!RTE_IOVA_AS_VA) { + m_src->buf_iova = + gpa_to_hpa(vcrypto->dev, desc->addr, chain->para.src_data_len); + if (unlikely(m_src->buf_iova == 0)) { + VC_LOG_ERR("zero_copy may fail due to cross page data"); + ret = VIRTIO_CRYPTO_ERR; + goto error_exit; + } + } m_src->buf_addr = get_data_ptr(vc_req, desc, VHOST_ACCESS_RO); - if (unlikely(m_src->buf_iova == 0 || m_src->buf_addr == NULL)) { + if (unlikely(m_src->buf_addr == NULL)) { VC_LOG_ERR("zero_copy may fail due to cross page data"); ret = VIRTIO_CRYPTO_ERR; goto error_exit; @@ -1024,10 +1043,17 @@ prepare_sym_chain_op(struct vhost_crypto *vcrypto, struct rte_crypto_op *op, switch (vcrypto->option) { case RTE_VHOST_CRYPTO_ZERO_COPY_ENABLE: - m_dst->buf_iova = gpa_to_hpa(vcrypto->dev, - desc->addr, chain->para.dst_data_len); + if (!RTE_IOVA_AS_VA) { + m_dst->buf_iova = + gpa_to_hpa(vcrypto->dev, desc->addr, chain->para.dst_data_len); + if (unlikely(m_dst->buf_iova == 0)) { + VC_LOG_ERR("zero_copy may fail due to cross page data"); + ret = VIRTIO_CRYPTO_ERR; + goto error_exit; + } + } m_dst->buf_addr = get_data_ptr(vc_req, desc, VHOST_ACCESS_RW); - if (unlikely(m_dst->buf_iova == 0 || m_dst->buf_addr == NULL)) { + if (unlikely(m_dst->buf_addr == NULL)) { VC_LOG_ERR("zero_copy may fail due to cross page data"); ret = VIRTIO_CRYPTO_ERR; goto error_exit; diff --git a/meson_options.txt b/meson_options.txt index 7c220ad68d..f0fa6cf04c 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -44,6 +44,8 @@ option('platform', type: 'string', value: 'native', description: 'Platform to build, either "native", "generic" or a SoC. Please refer to the Linux build guide for more information.') option('enable_trace_fp', type: 'boolean', value: false, description: 'enable fast path trace points.') +option('iova_as_va', type: 'boolean', value: false, description: + 'Build which only supports IOVA as VA mode. Unsupported drivers are disabled.') option('tests', type: 'boolean', value: true, description: 'build unit tests') option('use_hpet', type: 'boolean', value: false, description: From patchwork Wed Sep 21 13:56:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 116557 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2B14EA00C3; Wed, 21 Sep 2022 15:57:04 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AA08C427F3; Wed, 21 Sep 2022 15:56:59 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 0C44A42836 for ; Wed, 21 Sep 2022 15:56:57 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28L9oUE1019243; Wed, 21 Sep 2022 06:56:53 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=YNeUeH30tkr+BRq4AuIddvsTQcmFFaTITsQkblIdMqI=; b=kl3eJ2knzoJ7SF8jxvlIwXGqYkNxat4M5IlpSnbH8J0T47rHl3l+iiSiRb/FruDkCd6p iGcG6N+4way4r3+Px4gm1dofYZeVilhSCyDN9F28XOyqf0FIn9d37weWCPgG5IJpmRZf Rc2bfNvsv+HcdCifKULsSSVQJVgY2zkksRlQJA7Q0WfLPK2uI9Yv7MhiQc09bxhINL1t 5K165tAYEkDe5IGPzYSW1WugvxaQM42hFf7xrBzqWASBAn0CU8zd9j7YgIzXbuFLHeBL ZLBhqHGZ4+Ys0PgbSJ4AQmdecbzo9/W30k8JvvHCgd1hPCu5yPOEYasT5+vGqGDqglWp yg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3jr0b70s6t-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 21 Sep 2022 06:56:53 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 21 Sep 2022 06:56:52 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 21 Sep 2022 06:56:52 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id E2A603F7041; Wed, 21 Sep 2022 06:56:48 -0700 (PDT) From: Shijith Thotton To: CC: , Shijith Thotton , , , , , , , , Subject: [PATCH v3 2/5] mbuf: add second dynamic field member for VA only build Date: Wed, 21 Sep 2022 19:26:18 +0530 Message-ID: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: <20220907134340.3629224-1-sthotton@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: DKE44qZ4fg7oIW5m8V0YufjU8qvO3EsL X-Proofpoint-GUID: DKE44qZ4fg7oIW5m8V0YufjU8qvO3EsL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-21_08,2022-09-20_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org mbuf physical address field is not used in builds which only uses VA. It is used to expand the dynamic field area. Signed-off-by: Shijith Thotton --- lib/mbuf/rte_mbuf_core.h | 26 +++++++++++++++++--------- lib/mbuf/rte_mbuf_dyn.c | 2 ++ 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h index c6292e7252..94907f301d 100644 --- a/lib/mbuf/rte_mbuf_core.h +++ b/lib/mbuf/rte_mbuf_core.h @@ -579,15 +579,23 @@ struct rte_mbuf { RTE_MARKER cacheline0; void *buf_addr; /**< Virtual address of segment buffer. */ - /** - * Physical address of segment buffer. - * This field is invalid if the build is configured to use only - * virtual address as IOVA (i.e. RTE_IOVA_AS_VA is 1). - * Force alignment to 8-bytes, so as to ensure we have the exact - * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes - * working on vector drivers easier. - */ - rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t)); + RTE_STD_C11 + union { + /** + * Physical address of segment buffer. + * This field is invalid if the build is configured to use only + * virtual address as IOVA (i.e. RTE_IOVA_AS_VA is 1). + * Force alignment to 8-bytes, so as to ensure we have the exact + * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes + * working on vector drivers easier. + */ + rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t)); + /** + * Reserved for dynamic field in builds where physical address + * field is invalid. + */ + uint64_t dynfield2; + }; /* next 8 bytes are initialised on RX descriptor rearm */ RTE_MARKER64 rearm_data; diff --git a/lib/mbuf/rte_mbuf_dyn.c b/lib/mbuf/rte_mbuf_dyn.c index 4ae79383b5..6a4cf96897 100644 --- a/lib/mbuf/rte_mbuf_dyn.c +++ b/lib/mbuf/rte_mbuf_dyn.c @@ -128,6 +128,8 @@ init_shared_mem(void) */ memset(shm, 0, sizeof(*shm)); mark_free(dynfield1); + if (RTE_IOVA_AS_VA) + mark_free(dynfield2); /* init free_flags */ for (mask = RTE_MBUF_F_FIRST_FREE; mask <= RTE_MBUF_F_LAST_FREE; mask <<= 1) From patchwork Wed Sep 21 13:56:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 116558 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 87CCFA00C3; Wed, 21 Sep 2022 15:57:09 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8227042905; Wed, 21 Sep 2022 15:57:02 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id E4442427FF for ; Wed, 21 Sep 2022 15:57:00 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28LBPhTp032185; Wed, 21 Sep 2022 06:56:57 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=2nUuCDtTXMoEJN84mfMuYrYBh9t/921LN9+rum/iD+Y=; b=JspPPgQc2C/YicU+ojPvvRHHC76spGCQQzjjhRza35hV/oNbrLA1qDctT5nURoxN79W8 I95JY0qcaZWukX9w69/sp4O3ZfJAArlvlOzwXA5JWJjgIwXCJKC+mGgb2e64ECEne+uK cCbLshx1d3SNWl+jdK+377KGM77nNQLZ9W7eMEIVpHEzyjob1Uqg5SJmLkpf451QRpQ0 ynHm2SPzN1fU5S2BFawXM9pNiRsf6/FLLfdFR3jgYW2iqH9kPnbd1FeWvkOrvoDKBU+X uJJo9H5U0iaSBQJ++wUOqVb7x0biUeGv8xmHyTSuduv2srvxvjsWMiSE7QoAZh3KRngR xw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3jr1qmgghy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 21 Sep 2022 06:56:57 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 21 Sep 2022 06:56:56 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Wed, 21 Sep 2022 06:56:56 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id A8BF83F7051; Wed, 21 Sep 2022 06:56:52 -0700 (PDT) From: Shijith Thotton To: CC: , Shijith Thotton , , , , , , , , Subject: [PATCH v3 3/5] lib: move mbuf next pointer to first cache line Date: Wed, 21 Sep 2022 19:26:19 +0530 Message-ID: <7cc8107a4a83dbfe16abd1f24150b0db6cf1041b.1663767715.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: <20220907134340.3629224-1-sthotton@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: BWIkTDHhnHqkAgBoDxtGq76iek0QP5iU X-Proofpoint-ORIG-GUID: BWIkTDHhnHqkAgBoDxtGq76iek0QP5iU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-21_08,2022-09-20_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Swapped position of mbuf next pointer and second dynamic field (dynfield2) if the build is configured to use IOVA as VA. This is to move the mbuf next pointer to first cache line. kni library is disabled for this change as it depends on the offset value of next pointer. Signed-off-by: Shijith Thotton --- lib/mbuf/rte_mbuf_core.h | 29 +++++++++++++++++++++-------- lib/meson.build | 3 +++ 2 files changed, 24 insertions(+), 8 deletions(-) diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h index 94907f301d..915dcd8653 100644 --- a/lib/mbuf/rte_mbuf_core.h +++ b/lib/mbuf/rte_mbuf_core.h @@ -590,11 +590,14 @@ struct rte_mbuf { * working on vector drivers easier. */ rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t)); +#if RTE_IOVA_AS_VA /** - * Reserved for dynamic field in builds where physical address - * field is invalid. + * Next segment of scattered packet. + * This field is valid when physical address field is invalid. + * Otherwise next pointer in the second cache line will be used. */ - uint64_t dynfield2; + struct rte_mbuf *next; +#endif }; /* next 8 bytes are initialised on RX descriptor rearm */ @@ -711,11 +714,21 @@ struct rte_mbuf { /* second cache line - fields only used in slow path or on TX */ RTE_MARKER cacheline1 __rte_cache_min_aligned; - /** - * Next segment of scattered packet. Must be NULL in the last segment or - * in case of non-segmented packet. - */ - struct rte_mbuf *next; + RTE_STD_C11 + union { +#if !RTE_IOVA_AS_VA + /** + * Next segment of scattered packet. Must be NULL in the last + * segment or in case of non-segmented packet. + */ + struct rte_mbuf *next; +#endif + /** + * Reserved for dynamic field when the next pointer is in first + * cache line (i.e. RTE_IOVA_AS_VA is 1). + */ + uint64_t dynfield2; + }; /* fields to support TX offloads */ RTE_STD_C11 diff --git a/lib/meson.build b/lib/meson.build index c648f7d800..73d93bc803 100644 --- a/lib/meson.build +++ b/lib/meson.build @@ -88,6 +88,9 @@ optional_libs = [ disabled_libs = [] opt_disabled_libs = run_command(list_dir_globs, get_option('disable_libs'), check: true).stdout().split() +if dpdk_conf.get('RTE_IOVA_AS_VA') == 1 + opt_disabled_libs += ['kni'] +endif foreach l:opt_disabled_libs if not optional_libs.contains(l) warning('Cannot disable mandatory library "@0@"'.format(l)) From patchwork Wed Sep 21 13:56:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 116559 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 065FDA00C3; Wed, 21 Sep 2022 15:57:15 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8565E427FF; Wed, 21 Sep 2022 15:57:11 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 4CF434014F for ; Wed, 21 Sep 2022 15:57:09 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28LBPtG8032713; Wed, 21 Sep 2022 06:57:05 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=lQ0lnX1BIeZbuMBNGz4lvsxXHkAErFrxRhXlmPX7PK4=; b=C/WULWPsXqvw5EdYpeJ9IXKI0XHPUXWxJi5SBJpG0OM/pWbYnmGfauy/v8/XHpi6Povs XQTSDNuTJC4b/H+0wQqThbWHe0GQ1o+HRyCIhLSdI76eK0fU4KiyoBi7aVtDtLDu8v/i i3zYlnOHXycgwl5jkOXLpR4DJdFwFyMM3KD++7QLD1YC+xoRIvYPjbgB+zGLkj1l5BS6 rhaW7Z2a+seUjYjWinBzNp15xfSneNqSaDB+32W+yh8547flB8k08ZFDX4k+l7qJHQpc womSojX9HT8KUvR1QhomVoonDeeamKh3Cg4sQT7vZOurIrMJ35LMNulugEans1GrC/pJ yg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3jr1qmggj7-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 21 Sep 2022 06:57:04 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 21 Sep 2022 06:57:03 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 21 Sep 2022 06:57:03 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id 7EF693F7041; Wed, 21 Sep 2022 06:56:56 -0700 (PDT) From: Shijith Thotton To: CC: , Shijith Thotton , , , , , , , , , Ruifeng Wang , "Jan Viktorin" , Nithin Dabilpuram , Kiran Kumar K , "Sunil Kumar Kori" , Satha Rao , "Ankur Dwivedi" , Anoob Joseph , "Tejasree Kondoj" , Radha Mohan Chintakuntla , Veerasenareddy Burru , "Ashwin Sekhar T K" , Jakub Palider , Tomasz Duszynski Subject: [PATCH v3 4/5] drivers: mark Marvell cnxk PMDs work with IOVA as VA Date: Wed, 21 Sep 2022 19:26:20 +0530 Message-ID: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: <20220907134340.3629224-1-sthotton@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: ZjgDdCsZi5OGwiCY2ic6qgR-iQaJtwaV X-Proofpoint-ORIG-GUID: ZjgDdCsZi5OGwiCY2ic6qgR-iQaJtwaV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-21_08,2022-09-20_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Enabled the flag pmd_iova_as_va in cnxk driver build files as they work with IOVA as VA. Updated cn9k and cn10k soc build configurations to enable the IOVA as VA build by default. Signed-off-by: Shijith Thotton --- config/arm/meson.build | 8 +++- drivers/common/cnxk/meson.build | 1 + drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 4 +- drivers/crypto/cnxk/cn9k_ipsec_la_ops.h | 2 +- drivers/crypto/cnxk/meson.build | 2 + drivers/dma/cnxk/meson.build | 1 + drivers/event/cnxk/meson.build | 1 + drivers/mempool/cnxk/meson.build | 1 + drivers/net/cnxk/cn10k_tx.h | 55 +++++++----------------- drivers/net/cnxk/cn9k_tx.h | 55 +++++++----------------- drivers/net/cnxk/cnxk_ethdev.h | 1 - drivers/net/cnxk/meson.build | 1 + drivers/raw/cnxk_bphy/meson.build | 1 + drivers/raw/cnxk_gpio/meson.build | 1 + 14 files changed, 50 insertions(+), 84 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 9f1636e0d5..4e95e8b388 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -294,7 +294,8 @@ soc_cn10k = { 'flags': [ ['RTE_MAX_LCORE', 24], ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MEMPOOL_ALIGN', 128] + ['RTE_MEMPOOL_ALIGN', 128], + ['RTE_IOVA_AS_VA', 1] ], 'part_number': '0xd49', 'extra_march_features': ['crypto'], @@ -370,7 +371,10 @@ soc_cn9k = { 'description': 'Marvell OCTEON 9', 'implementer': '0x43', 'part_number': '0xb2', - 'numa': false + 'numa': false, + 'flags': [ + ['RTE_IOVA_AS_VA', 1] + ] } soc_stingray = { diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build index 6f808271d1..d019cfa8d1 100644 --- a/drivers/common/cnxk/meson.build +++ b/drivers/common/cnxk/meson.build @@ -86,3 +86,4 @@ sources += files('cnxk_telemetry_bphy.c', ) deps += ['bus_pci', 'net', 'telemetry'] +pmd_iova_as_va = true diff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h index 66cfe6ca98..16db14344d 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h +++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h @@ -85,7 +85,7 @@ process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop, /* Prepare CPT instruction */ inst->w4.u64 = inst_w4_u64 | rte_pktmbuf_pkt_len(m_src); - dptr = rte_pktmbuf_iova(m_src); + dptr = rte_pktmbuf_mtod(m_src, uint64_t); inst->dptr = dptr; inst->rptr = dptr; @@ -102,7 +102,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct cn10k_ipsec_sa *sa, /* Prepare CPT instruction */ inst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src); - dptr = rte_pktmbuf_iova(m_src); + dptr = rte_pktmbuf_mtod(m_src, uint64_t); inst->dptr = dptr; inst->rptr = dptr; diff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h index e469596756..8b68e4c728 100644 --- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h +++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h @@ -99,7 +99,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa, /* Prepare CPT instruction */ inst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src); - inst->dptr = inst->rptr = rte_pktmbuf_iova(m_src); + inst->dptr = inst->rptr = rte_pktmbuf_mtod(m_src, uint64_t); inst->w7.u64 = sa->inst.w7; } #endif /* __CN9K_IPSEC_LA_OPS_H__ */ diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build index 23a1cc3aac..764e7bb99a 100644 --- a/drivers/crypto/cnxk/meson.build +++ b/drivers/crypto/cnxk/meson.build @@ -31,3 +31,5 @@ if get_option('buildtype').contains('debug') else cflags += [ '-ULA_IPSEC_DEBUG' ] endif + +pmd_iova_as_va = true diff --git a/drivers/dma/cnxk/meson.build b/drivers/dma/cnxk/meson.build index d4be4ee860..ef0e3db109 100644 --- a/drivers/dma/cnxk/meson.build +++ b/drivers/dma/cnxk/meson.build @@ -3,3 +3,4 @@ deps += ['bus_pci', 'common_cnxk', 'dmadev'] sources = files('cnxk_dmadev.c') +pmd_iova_as_va = true diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build index b27bae7b12..650d0d4256 100644 --- a/drivers/event/cnxk/meson.build +++ b/drivers/event/cnxk/meson.build @@ -479,3 +479,4 @@ foreach flag: extra_flags endforeach deps += ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk'] +pmd_iova_as_va = true diff --git a/drivers/mempool/cnxk/meson.build b/drivers/mempool/cnxk/meson.build index d5d1978569..a328176457 100644 --- a/drivers/mempool/cnxk/meson.build +++ b/drivers/mempool/cnxk/meson.build @@ -17,3 +17,4 @@ sources = files( ) deps += ['eal', 'mbuf', 'kvargs', 'bus_pci', 'common_cnxk', 'mempool'] +pmd_iova_as_va = true diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h index ea13866b20..2ef62da132 100644 --- a/drivers/net/cnxk/cn10k_tx.h +++ b/drivers/net/cnxk/cn10k_tx.h @@ -1775,14 +1775,6 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, mbuf2 = (uint64_t *)tx_pkts[2]; mbuf3 = (uint64_t *)tx_pkts[3]; - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + - offsetof(struct rte_mbuf, buf_iova)); /* * Get mbuf's, olflags, iova, pktlen, dataoff * dataoff_iovaX.D[0] = iova, @@ -1790,28 +1782,24 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, * len_olflagsX.D[0] = ol_flags, * len_olflagsX.D[1](63:32) = mbuf->pkt_len */ - dataoff_iova0 = vld1q_u64(mbuf0); - len_olflags0 = vld1q_u64(mbuf0 + 2); - dataoff_iova1 = vld1q_u64(mbuf1); - len_olflags1 = vld1q_u64(mbuf1 + 2); - dataoff_iova2 = vld1q_u64(mbuf2); - len_olflags2 = vld1q_u64(mbuf2 + 2); - dataoff_iova3 = vld1q_u64(mbuf3); - len_olflags3 = vld1q_u64(mbuf3 + 2); + dataoff_iova0 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf0), 1); + len_olflags0 = vld1q_u64(mbuf0 + 3); + dataoff_iova1 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf1), 1); + len_olflags1 = vld1q_u64(mbuf1 + 3); + dataoff_iova2 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf2), 1); + len_olflags2 = vld1q_u64(mbuf2 + 3); + dataoff_iova3 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf3), 1); + len_olflags3 = vld1q_u64(mbuf3 + 3); /* Move mbufs to point pool */ - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); + mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + offsetof(struct rte_mbuf, pool)); + mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + offsetof(struct rte_mbuf, pool)); + mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + offsetof(struct rte_mbuf, pool)); + mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + offsetof(struct rte_mbuf, pool)); if (flags & (NIX_TX_OFFLOAD_OL3_OL4_CSUM_F | NIX_TX_OFFLOAD_L3_L4_CSUM_F)) { @@ -1861,17 +1849,6 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, xtmp128 = vzip2q_u64(len_olflags0, len_olflags1); ytmp128 = vzip2q_u64(len_olflags2, len_olflags3); - /* Clear dataoff_iovaX.D[1] bits other than dataoff(15:0) */ - const uint64x2_t and_mask0 = { - 0xFFFFFFFFFFFFFFFF, - 0x000000000000FFFF, - }; - - dataoff_iova0 = vandq_u64(dataoff_iova0, and_mask0); - dataoff_iova1 = vandq_u64(dataoff_iova1, and_mask0); - dataoff_iova2 = vandq_u64(dataoff_iova2, and_mask0); - dataoff_iova3 = vandq_u64(dataoff_iova3, and_mask0); - /* * Pick only 16 bits of pktlen preset at bits 63:32 * and place them at bits 15:0. diff --git a/drivers/net/cnxk/cn9k_tx.h b/drivers/net/cnxk/cn9k_tx.h index 6ce81f5c96..f5d99ccb5a 100644 --- a/drivers/net/cnxk/cn9k_tx.h +++ b/drivers/net/cnxk/cn9k_tx.h @@ -1005,14 +1005,6 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, mbuf2 = (uint64_t *)tx_pkts[2]; mbuf3 = (uint64_t *)tx_pkts[3]; - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + - offsetof(struct rte_mbuf, buf_iova)); /* * Get mbuf's, olflags, iova, pktlen, dataoff * dataoff_iovaX.D[0] = iova, @@ -1020,28 +1012,24 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, * len_olflagsX.D[0] = ol_flags, * len_olflagsX.D[1](63:32) = mbuf->pkt_len */ - dataoff_iova0 = vld1q_u64(mbuf0); - len_olflags0 = vld1q_u64(mbuf0 + 2); - dataoff_iova1 = vld1q_u64(mbuf1); - len_olflags1 = vld1q_u64(mbuf1 + 2); - dataoff_iova2 = vld1q_u64(mbuf2); - len_olflags2 = vld1q_u64(mbuf2 + 2); - dataoff_iova3 = vld1q_u64(mbuf3); - len_olflags3 = vld1q_u64(mbuf3 + 2); + dataoff_iova0 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf0), 1); + len_olflags0 = vld1q_u64(mbuf0 + 3); + dataoff_iova1 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf1)->data_off, vld1q_u64(mbuf1), 1); + len_olflags1 = vld1q_u64(mbuf1 + 3); + dataoff_iova2 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf2)->data_off, vld1q_u64(mbuf2), 1); + len_olflags2 = vld1q_u64(mbuf2 + 3); + dataoff_iova3 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf3)->data_off, vld1q_u64(mbuf3), 1); + len_olflags3 = vld1q_u64(mbuf3 + 3); /* Move mbufs to point pool */ - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); + mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + offsetof(struct rte_mbuf, pool)); + mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + offsetof(struct rte_mbuf, pool)); + mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + offsetof(struct rte_mbuf, pool)); + mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + offsetof(struct rte_mbuf, pool)); if (flags & (NIX_TX_OFFLOAD_OL3_OL4_CSUM_F | NIX_TX_OFFLOAD_L3_L4_CSUM_F)) { @@ -1091,17 +1079,6 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, xtmp128 = vzip2q_u64(len_olflags0, len_olflags1); ytmp128 = vzip2q_u64(len_olflags2, len_olflags3); - /* Clear dataoff_iovaX.D[1] bits other than dataoff(15:0) */ - const uint64x2_t and_mask0 = { - 0xFFFFFFFFFFFFFFFF, - 0x000000000000FFFF, - }; - - dataoff_iova0 = vandq_u64(dataoff_iova0, and_mask0); - dataoff_iova1 = vandq_u64(dataoff_iova1, and_mask0); - dataoff_iova2 = vandq_u64(dataoff_iova2, and_mask0); - dataoff_iova3 = vandq_u64(dataoff_iova3, and_mask0); - /* * Pick only 16 bits of pktlen preset at bits 63:32 * and place them at bits 15:0. diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index 4cb7c9e90c..abf1e4215f 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -690,7 +690,6 @@ cnxk_pktmbuf_detach(struct rte_mbuf *m) m->priv_size = priv_size; m->buf_addr = (char *)m + mbuf_size; - m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size; m->buf_len = (uint16_t)buf_len; rte_pktmbuf_reset_headroom(m); m->data_len = 0; diff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build index f347e98fce..01489b3a36 100644 --- a/drivers/net/cnxk/meson.build +++ b/drivers/net/cnxk/meson.build @@ -194,3 +194,4 @@ foreach flag: extra_flags endforeach headers = files('rte_pmd_cnxk.h') +pmd_iova_as_va = true diff --git a/drivers/raw/cnxk_bphy/meson.build b/drivers/raw/cnxk_bphy/meson.build index 14147feaf4..781ed63e05 100644 --- a/drivers/raw/cnxk_bphy/meson.build +++ b/drivers/raw/cnxk_bphy/meson.build @@ -10,3 +10,4 @@ sources = files( 'cnxk_bphy_irq.c', ) headers = files('rte_pmd_bphy.h') +pmd_iova_as_va = true diff --git a/drivers/raw/cnxk_gpio/meson.build b/drivers/raw/cnxk_gpio/meson.build index a75a5b9084..f9aed173b6 100644 --- a/drivers/raw/cnxk_gpio/meson.build +++ b/drivers/raw/cnxk_gpio/meson.build @@ -9,3 +9,4 @@ sources = files( 'cnxk_gpio_selftest.c', ) headers = files('rte_pmd_cnxk_gpio.h') +pmd_iova_as_va = true From patchwork Wed Sep 21 13:56:21 2022 Content-Type: text/plain; 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Wed, 21 Sep 2022 06:57:03 -0700 (PDT) From: Shijith Thotton To: CC: , Shijith Thotton , , , , , , , , , Ruifeng Wang , Fan Zhang , Pablo de Lara , Chengwen Feng , Kevin Laatz , =?utf-8?q?Mattias_R=C3=B6nnblom?= , Liang Ma , Peter Mccarthy , "Harry van Haaren" , "Artem V. Andreev" , Andrew Rybchenko , "John W. Linville" , Ciara Loftus , Qi Zhang , "Chas Williams" , "Min Hu (Connor)" , "Gaetan Rivet" , Jakub Grajciar , Tetsuya Mukawa , Sachin Saxena , "Hemant Agrawal" Subject: [PATCH v3 5/5] drivers: mark software PMDs work with IOVA as VA Date: Wed, 21 Sep 2022 19:26:21 +0530 Message-ID: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: <20220907134340.3629224-1-sthotton@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 2NrdRiS3JTtlTRZVCK8imG07gqNGnn2z X-Proofpoint-GUID: 2NrdRiS3JTtlTRZVCK8imG07gqNGnn2z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-21_08,2022-09-20_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Enabled software PMDs in IOVA as VA build as they work with IOVA as VA. Signed-off-by: Shijith Thotton --- drivers/crypto/armv8/meson.build | 1 + drivers/crypto/ipsec_mb/meson.build | 1 + drivers/crypto/null/meson.build | 1 + drivers/crypto/openssl/meson.build | 1 + drivers/dma/skeleton/meson.build | 1 + drivers/event/dsw/meson.build | 1 + drivers/event/opdl/meson.build | 1 + drivers/event/skeleton/meson.build | 1 + drivers/event/sw/meson.build | 1 + drivers/mempool/bucket/meson.build | 1 + drivers/mempool/ring/meson.build | 1 + drivers/mempool/stack/meson.build | 1 + drivers/net/af_packet/meson.build | 1 + drivers/net/af_xdp/meson.build | 2 ++ drivers/net/bonding/meson.build | 1 + drivers/net/failsafe/meson.build | 1 + drivers/net/memif/meson.build | 1 + drivers/net/null/meson.build | 1 + drivers/net/pcap/meson.build | 1 + drivers/net/ring/meson.build | 1 + drivers/net/tap/meson.build | 1 + drivers/raw/skeleton/meson.build | 1 + 22 files changed, 23 insertions(+) diff --git a/drivers/crypto/armv8/meson.build b/drivers/crypto/armv8/meson.build index 5effba8bbc..a2c9d69e3f 100644 --- a/drivers/crypto/armv8/meson.build +++ b/drivers/crypto/armv8/meson.build @@ -17,3 +17,4 @@ endif ext_deps += dep deps += ['bus_vdev'] sources = files('rte_armv8_pmd.c', 'rte_armv8_pmd_ops.c') +pmd_iova_as_va = true diff --git a/drivers/crypto/ipsec_mb/meson.build b/drivers/crypto/ipsec_mb/meson.build index a89b29d6c3..785440b593 100644 --- a/drivers/crypto/ipsec_mb/meson.build +++ b/drivers/crypto/ipsec_mb/meson.build @@ -37,3 +37,4 @@ sources = files( 'pmd_zuc.c', ) deps += ['bus_vdev', 'net', 'security'] +pmd_iova_as_va = true diff --git a/drivers/crypto/null/meson.build b/drivers/crypto/null/meson.build index acc16e7d81..68dc030075 100644 --- a/drivers/crypto/null/meson.build +++ b/drivers/crypto/null/meson.build @@ -9,3 +9,4 @@ endif deps += 'bus_vdev' sources = files('null_crypto_pmd.c', 'null_crypto_pmd_ops.c') +pmd_iova_as_va = true diff --git a/drivers/crypto/openssl/meson.build b/drivers/crypto/openssl/meson.build index cd962da1d6..25c44d0064 100644 --- a/drivers/crypto/openssl/meson.build +++ b/drivers/crypto/openssl/meson.build @@ -15,3 +15,4 @@ endif deps += 'bus_vdev' sources = files('rte_openssl_pmd.c', 'rte_openssl_pmd_ops.c') ext_deps += dep +pmd_iova_as_va = true diff --git a/drivers/dma/skeleton/meson.build b/drivers/dma/skeleton/meson.build index 8871b80956..2b48d4e031 100644 --- a/drivers/dma/skeleton/meson.build +++ b/drivers/dma/skeleton/meson.build @@ -5,3 +5,4 @@ deps += ['dmadev', 'kvargs', 'ring', 'bus_vdev'] sources = files( 'skeleton_dmadev.c', ) +pmd_iova_as_va = true diff --git a/drivers/event/dsw/meson.build b/drivers/event/dsw/meson.build index 2df0fac4ff..477a6e5910 100644 --- a/drivers/event/dsw/meson.build +++ b/drivers/event/dsw/meson.build @@ -6,3 +6,4 @@ if cc.has_argument('-Wno-format-nonliteral') cflags += '-Wno-format-nonliteral' endif sources = files('dsw_evdev.c', 'dsw_event.c', 'dsw_xstats.c') +pmd_iova_as_va = true diff --git a/drivers/event/opdl/meson.build b/drivers/event/opdl/meson.build index 786d2f4e82..e1a3de7ee3 100644 --- a/drivers/event/opdl/meson.build +++ b/drivers/event/opdl/meson.build @@ -9,3 +9,4 @@ sources = files( 'opdl_test.c', ) deps += ['bus_vdev'] +pmd_iova_as_va = true diff --git a/drivers/event/skeleton/meson.build b/drivers/event/skeleton/meson.build index acfe156532..0ae514668c 100644 --- a/drivers/event/skeleton/meson.build +++ b/drivers/event/skeleton/meson.build @@ -3,3 +3,4 @@ sources = files('skeleton_eventdev.c') deps += ['bus_pci', 'bus_vdev'] +pmd_iova_as_va = true diff --git a/drivers/event/sw/meson.build b/drivers/event/sw/meson.build index 6f81567efb..210cc1d048 100644 --- a/drivers/event/sw/meson.build +++ b/drivers/event/sw/meson.build @@ -9,3 +9,4 @@ sources = files( 'sw_evdev.c', ) deps += ['hash', 'bus_vdev'] +pmd_iova_as_va = true diff --git a/drivers/mempool/bucket/meson.build b/drivers/mempool/bucket/meson.build index 0051b6ac3c..31ba101677 100644 --- a/drivers/mempool/bucket/meson.build +++ b/drivers/mempool/bucket/meson.build @@ -12,3 +12,4 @@ if is_windows endif sources = files('rte_mempool_bucket.c') +pmd_iova_as_va = true diff --git a/drivers/mempool/ring/meson.build b/drivers/mempool/ring/meson.build index a021e908cf..f75f2125d7 100644 --- a/drivers/mempool/ring/meson.build +++ b/drivers/mempool/ring/meson.build @@ -2,3 +2,4 @@ # Copyright(c) 2017 Intel Corporation sources = files('rte_mempool_ring.c') +pmd_iova_as_va = true diff --git a/drivers/mempool/stack/meson.build b/drivers/mempool/stack/meson.build index 580dde79eb..3b94ed5b5e 100644 --- a/drivers/mempool/stack/meson.build +++ b/drivers/mempool/stack/meson.build @@ -4,3 +4,4 @@ sources = files('rte_mempool_stack.c') deps += ['stack'] +pmd_iova_as_va = true diff --git a/drivers/net/af_packet/meson.build b/drivers/net/af_packet/meson.build index c014e9b61b..92fafea363 100644 --- a/drivers/net/af_packet/meson.build +++ b/drivers/net/af_packet/meson.build @@ -6,3 +6,4 @@ if not is_linux reason = 'only supported on Linux' endif sources = files('rte_eth_af_packet.c') +pmd_iova_as_va = true diff --git a/drivers/net/af_xdp/meson.build b/drivers/net/af_xdp/meson.build index 1e0de23705..35812511e2 100644 --- a/drivers/net/af_xdp/meson.build +++ b/drivers/net/af_xdp/meson.build @@ -55,3 +55,5 @@ else build = false reason = 'missing header, "linux/if_xdp.h"' endif + +pmd_iova_as_va = true diff --git a/drivers/net/bonding/meson.build b/drivers/net/bonding/meson.build index 18ad7e21f3..b61166888e 100644 --- a/drivers/net/bonding/meson.build +++ b/drivers/net/bonding/meson.build @@ -22,3 +22,4 @@ deps += 'sched' # needed for rte_bitmap.h deps += ['ip_frag'] headers = files('rte_eth_bond.h', 'rte_eth_bond_8023ad.h') +pmd_iova_as_va = true diff --git a/drivers/net/failsafe/meson.build b/drivers/net/failsafe/meson.build index b8e5bf70f8..a90be869d1 100644 --- a/drivers/net/failsafe/meson.build +++ b/drivers/net/failsafe/meson.build @@ -27,3 +27,4 @@ sources = files( 'failsafe_ops.c', 'failsafe_rxtx.c', ) +pmd_iova_as_va = true diff --git a/drivers/net/memif/meson.build b/drivers/net/memif/meson.build index 680bc8631c..59140dc3dd 100644 --- a/drivers/net/memif/meson.build +++ b/drivers/net/memif/meson.build @@ -12,3 +12,4 @@ sources = files( ) deps += ['hash'] +pmd_iova_as_va = true diff --git a/drivers/net/null/meson.build b/drivers/net/null/meson.build index 0251578aab..6b7adbd760 100644 --- a/drivers/net/null/meson.build +++ b/drivers/net/null/meson.build @@ -8,3 +8,4 @@ if is_windows endif sources = files('rte_eth_null.c') +pmd_iova_as_va = true diff --git a/drivers/net/pcap/meson.build b/drivers/net/pcap/meson.build index ed7864eb9d..73c65dd2a6 100644 --- a/drivers/net/pcap/meson.build +++ b/drivers/net/pcap/meson.build @@ -15,3 +15,4 @@ ext_deps += pcap_dep if is_windows ext_deps += cc.find_library('iphlpapi', required: true) endif +pmd_iova_as_va = true diff --git a/drivers/net/ring/meson.build b/drivers/net/ring/meson.build index 0156b37aad..45fa3492cf 100644 --- a/drivers/net/ring/meson.build +++ b/drivers/net/ring/meson.build @@ -9,3 +9,4 @@ endif sources = files('rte_eth_ring.c') headers = files('rte_eth_ring.h') +pmd_iova_as_va = true diff --git a/drivers/net/tap/meson.build b/drivers/net/tap/meson.build index c09713a67b..da23599830 100644 --- a/drivers/net/tap/meson.build +++ b/drivers/net/tap/meson.build @@ -35,3 +35,4 @@ foreach arg:args config.set(arg[0], cc.has_header_symbol(arg[1], arg[2])) endforeach configure_file(output : 'tap_autoconf.h', configuration : config) +pmd_iova_as_va = true diff --git a/drivers/raw/skeleton/meson.build b/drivers/raw/skeleton/meson.build index 950a33cc20..439ab8792d 100644 --- a/drivers/raw/skeleton/meson.build +++ b/drivers/raw/skeleton/meson.build @@ -6,3 +6,4 @@ sources = files( 'skeleton_rawdev.c', 'skeleton_rawdev_test.c', ) +pmd_iova_as_va = true