From patchwork Thu Sep 22 04:59:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Satheesh Paul Antonysamy X-Patchwork-Id: 116614 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C44E2A0540; Thu, 22 Sep 2022 06:59:18 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5FC954067C; Thu, 22 Sep 2022 06:59:18 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 4BC0F40156 for ; Thu, 22 Sep 2022 06:59:17 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28M2aXuP001906 for ; Wed, 21 Sep 2022 21:59:16 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=35LJ53IL/dtiput5qKZ9qnCirT24NxqPXM9roL8inpA=; b=ROeRUMeJSNI2hW5NMreVNFe8WXjuWtaSxQ1Fy+RHs2iVZNHK1hDuOoUf0Lr+3oo0Bwz2 XWh6AyR+kUtOfFwRYkYpi1zzGedjB8BzgV5A+tiLFDo38R8wuFOVjd7LgBJfYd5yanTM SmbS9yiq9aED8E+IQ77x+KrCaoSRLESjpcTZ5/zdcWOFaoFVGigaEssG6lfLCsmTCOb1 b2FMI+vaXZ3whcqOywnKLBsuDbs2lByj9NOerdDFUFWM2assf/S8s0zDUj+F31Bltwt2 YpobCejgfEcdakvVsZOuGQ5U/IdZ3vwVhx0XgFi4zQWiAiQ1G26s2BULvU0noQpeBrN2 ww== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3jrf2p8c83-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 21 Sep 2022 21:59:15 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 21 Sep 2022 21:59:14 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Wed, 21 Sep 2022 21:59:14 -0700 Received: from satheeshpaullabpc.. (unknown [10.28.34.33]) by maili.marvell.com (Postfix) with ESMTP id 7F6873F7082; Wed, 21 Sep 2022 21:59:12 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Satheesh Paul Antonysamy Subject: [dpdk-dev] [PATCH] common/cnxk: add changes in base rule merging Date: Thu, 22 Sep 2022 10:29:09 +0530 Message-ID: <20220922045909.479006-1-psatheesh@marvell.com> X-Mailer: git-send-email 2.35.3 MIME-Version: 1.0 X-Proofpoint-GUID: daFVgsSFdrdlq-fXb3J55xEt0EviiX_M X-Proofpoint-ORIG-GUID: daFVgsSFdrdlq-fXb3J55xEt0EviiX_M X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-22_02,2022-09-20_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Kiran Kumar K Added changes to base rule install mechanism. If action type is IPsec and multi channel is set, then base rule will not be merged. Signed-off-by: Kiran Kumar K Reviewed-by: Satheesh Paul Antonysamy --- drivers/common/cnxk/roc_npc_mcam.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c index 4bea6719c5..a725cabc57 100644 --- a/drivers/common/cnxk/roc_npc_mcam.c +++ b/drivers/common/cnxk/roc_npc_mcam.c @@ -720,10 +720,13 @@ npc_program_mcam(struct npc *npc, struct npc_parse_state *pst, bool mcam_alloc) uint64_t key_data[2] = {0ULL, 0ULL}; uint64_t key_mask[2] = {0ULL, 0ULL}; int key_len, bit = 0, index, rc = 0; + struct nix_inl_dev *inl_dev = NULL; int intf = pst->flow->nix_intf; struct mcam_entry *base_entry; + bool skip_base_rule = false; int off, idx, data_off = 0; uint8_t lid, mask, data; + struct idev_cfg *idev; uint16_t layer_info; uint64_t lt, flags; @@ -789,7 +792,14 @@ npc_program_mcam(struct npc *npc, struct npc_parse_state *pst, bool mcam_alloc) if (pst->set_ipv6ext_ltype_mask) npc_set_ipv6ext_ltype_mask(pst); - if (pst->is_vf && pst->flow->nix_intf == NIX_INTF_RX) { + idev = idev_get_cfg(); + if (idev) + inl_dev = idev->nix_inl_dev; + if (inl_dev && inl_dev->is_multi_channel && + (pst->flow->npc_action & NIX_RX_ACTIONOP_UCAST_IPSEC)) + skip_base_rule = true; + + if (pst->is_vf && pst->flow->nix_intf == NIX_INTF_RX && !skip_base_rule) { (void)mbox_alloc_msg_npc_read_base_steer_rule(npc->mbox); rc = mbox_process_msg(npc->mbox, (void *)&base_rule_rsp); if (rc) {