From patchwork Thu Jul 27 09:31:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 129710 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5050A42F5B; Thu, 27 Jul 2023 11:31:27 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D065943246; Thu, 27 Jul 2023 11:31:22 +0200 (CEST) Received: from mgamail.intel.com (unknown [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id DDAC440041 for ; Thu, 27 Jul 2023 11:31:19 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1690450280; x=1721986280; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MiZiStFWdwDqW27nERB440CyOf4znlpLmSKqbK65EPg=; b=iTBwPIWinaOGL/uSgrvmuxPb3M09CoI9NlIB89ojGvg0qQbQ3PftATkT tAYQYPIbgRtbxx+FA91bEhW1AMOjIWw0gwL7MldNvbZkHUS29Y8qQ1IX1 8bSPQ3+z4ZDiC02ljHM6kDmG2nzRzir/TVATTXUv3ari3gTrUJhCfLg0E xqRpAfKZ5wImD0JX13IhxW5XDF1Ni6omkd/lKhuOQ6gPF6kSJT9tYoZ6P Xw0XuhRsQxMoKBEo7ubF+Xg/wAVWijMUFEFbVtSSsyxiDt6OTiTLfKz84 bEA2Vs4mpSE/m9QsluWrUMohFSzvAJgE3yXLzLZF0fG4AViwBybuxwMzN g==; X-IronPort-AV: E=McAfee;i="6600,9927,10783"; a="434537442" X-IronPort-AV: E=Sophos;i="6.01,234,1684825200"; d="scan'208";a="434537442" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jul 2023 02:31:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10783"; a="756584459" X-IronPort-AV: E=Sophos;i="6.01,234,1684825200"; d="scan'208";a="756584459" Received: from silpixa00401385.ir.intel.com ([10.237.214.14]) by orsmga008.jf.intel.com with ESMTP; 27 Jul 2023 02:31:17 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson Subject: [PATCH 1/2] build/x86: remove conditional checks for AVX2 support Date: Thu, 27 Jul 2023 10:31:06 +0100 Message-Id: <20230727093107.7242-2-bruce.richardson@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230727093107.7242-1-bruce.richardson@intel.com> References: <20230727093107.7242-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In a number of libraries and drivers we have multiple levels of checks for enabling AVX2 support. In these cases: * we first check for AVX2 support in the build-time ISA, i.e. through the instruction-set/-march flag. If present, we add source file to the list of sources. * if not enabled at the minimum instruction-set level, i.e. a default/generic build, we then check for compiler support for AVX2 and, if available, did a separate build of the AVX2 file using an additional flag to enable the instruction set. While this works, and was necessary in older releases, we no longer need this level of complexity, as all supported DPDK compilers have support for AVX2. This makes the second check unnecessary. However, when we look at the effect of the second option above vs the first, the only real difference is that in the second case, we add an additional "-mavx2" to the build flags. This flag simply makes the instruction set available for use, so should be harmless in the case where the "march" flag already has that instruction set available. Therefore, we can remove the check for the first case also, and always use the fallback case with the extra flag. Signed-off-by: Bruce Richardson --- drivers/net/bnxt/meson.build | 27 ++++++++++----------------- drivers/net/enic/meson.build | 10 +++------- drivers/net/i40e/meson.build | 23 +++++++---------------- drivers/net/iavf/meson.build | 23 +++++++---------------- drivers/net/ice/meson.build | 22 +++++++--------------- lib/acl/meson.build | 24 ++++++------------------ 6 files changed, 40 insertions(+), 89 deletions(-) diff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build index c7a0d5f6c9..c223a21002 100644 --- a/drivers/net/bnxt/meson.build +++ b/drivers/net/bnxt/meson.build @@ -53,23 +53,16 @@ subdir('hcapi/cfa') if arch_subdir == 'x86' sources += files('bnxt_rxtx_vec_sse.c') - # compile AVX2 version if either: - # a. we have AVX supported in minimum instruction set baseline - # b. it's not minimum instruction set, but supported by compiler - if cc.get_define('__AVX2__', args: machine_args) != '' - cflags += ['-DCC_AVX2_SUPPORT'] - sources += files('bnxt_rxtx_vec_avx2.c') - elif cc.has_argument('-mavx2') - cflags += ['-DCC_AVX2_SUPPORT'] - bnxt_avx2_lib = static_library('bnxt_avx2_lib', - 'bnxt_rxtx_vec_avx2.c', - dependencies: [static_rte_ethdev, - static_rte_bus_pci, - static_rte_kvargs, static_rte_hash], - include_directories: includes, - c_args: [cflags, '-mavx2']) - objs += bnxt_avx2_lib.extract_objects('bnxt_rxtx_vec_avx2.c') - endif + cflags += ['-DCC_AVX2_SUPPORT'] + # build AVX2 code with instruction set explicitly enabled for runtime selection + bnxt_avx2_lib = static_library('bnxt_avx2_lib', + 'bnxt_rxtx_vec_avx2.c', + dependencies: [static_rte_ethdev, + static_rte_bus_pci, + static_rte_kvargs, static_rte_hash], + include_directories: includes, + c_args: [cflags, '-mavx2']) + objs += bnxt_avx2_lib.extract_objects('bnxt_rxtx_vec_avx2.c') elif arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64') sources += files('bnxt_rxtx_vec_neon.c') endif diff --git a/drivers/net/enic/meson.build b/drivers/net/enic/meson.build index 77dcd9e7ec..8700ae27f2 100644 --- a/drivers/net/enic/meson.build +++ b/drivers/net/enic/meson.build @@ -28,14 +28,10 @@ sources = files( deps += ['hash'] includes += include_directories('base') -# The current implementation assumes 64-bit pointers -if cc.get_define('__AVX2__', args: machine_args) != '' and dpdk_conf.get('RTE_ARCH_64') - sources += files('enic_rxtx_vec_avx2.c') -# Build the avx2 handler if the compiler supports it, even though 'machine' -# does not. This is to support users who build for the min supported machine +# Build the avx2 handler for 64-bit X86 targets, even though 'machine' +# may not. This is to support users who build for the min supported machine # and need to run the binary on newer CPUs too. -# This part is from i40e meson.build -elif cc.has_argument('-mavx2') and dpdk_conf.get('RTE_ARCH_64') +if dpdk_conf.has('RTE_ARCH_X86_64') enic_avx2_lib = static_library('enic_avx2_lib', 'enic_rxtx_vec_avx2.c', dependencies: [static_rte_ethdev, static_rte_bus_pci], diff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build index 8e53b87a65..46600520e1 100644 --- a/drivers/net/i40e/meson.build +++ b/drivers/net/i40e/meson.build @@ -49,22 +49,13 @@ if arch_subdir == 'x86' cflags += ['-fno-asynchronous-unwind-tables'] endif - # compile AVX2 version if either: - # a. we have AVX supported in minimum instruction set baseline - # b. it's not minimum instruction set, but supported by compiler - if cc.get_define('__AVX2__', args: machine_args) != '' - cflags += ['-DCC_AVX2_SUPPORT'] - sources += files('i40e_rxtx_vec_avx2.c') - elif cc.has_argument('-mavx2') - cflags += ['-DCC_AVX2_SUPPORT'] - i40e_avx2_lib = static_library('i40e_avx2_lib', - 'i40e_rxtx_vec_avx2.c', - dependencies: [static_rte_ethdev, - static_rte_kvargs, static_rte_hash], - include_directories: includes, - c_args: [cflags, '-mavx2']) - objs += i40e_avx2_lib.extract_objects('i40e_rxtx_vec_avx2.c') - endif + cflags += ['-DCC_AVX2_SUPPORT'] + i40e_avx2_lib = static_library('i40e_avx2_lib', + 'i40e_rxtx_vec_avx2.c', + dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash], + include_directories: includes, + c_args: [cflags, '-mavx2']) + objs += i40e_avx2_lib.extract_objects('i40e_rxtx_vec_avx2.c') i40e_avx512_cpu_support = ( cc.get_define('__AVX512F__', args: machine_args) != '' and diff --git a/drivers/net/iavf/meson.build b/drivers/net/iavf/meson.build index fc09ffa2ae..ff949ef92b 100644 --- a/drivers/net/iavf/meson.build +++ b/drivers/net/iavf/meson.build @@ -29,22 +29,13 @@ if arch_subdir == 'x86' cflags += ['-fno-asynchronous-unwind-tables'] endif - # compile AVX2 version if either: - # a. we have AVX supported in minimum instruction set baseline - # b. it's not minimum instruction set, but supported by compiler - if cc.get_define('__AVX2__', args: machine_args) != '' - cflags += ['-DCC_AVX2_SUPPORT'] - sources += files('iavf_rxtx_vec_avx2.c') - elif cc.has_argument('-mavx2') - cflags += ['-DCC_AVX2_SUPPORT'] - iavf_avx2_lib = static_library('iavf_avx2_lib', - 'iavf_rxtx_vec_avx2.c', - dependencies: [static_rte_ethdev, - static_rte_kvargs, static_rte_hash], - include_directories: includes, - c_args: [cflags, '-mavx2']) - objs += iavf_avx2_lib.extract_objects('iavf_rxtx_vec_avx2.c') - endif + cflags += ['-DCC_AVX2_SUPPORT'] + iavf_avx2_lib = static_library('iavf_avx2_lib', + 'iavf_rxtx_vec_avx2.c', + dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash], + include_directories: includes, + c_args: [cflags, '-mavx2']) + objs += iavf_avx2_lib.extract_objects('iavf_rxtx_vec_avx2.c') iavf_avx512_cpu_support = ( cc.get_define('__AVX512F__', args: machine_args) != '' and diff --git a/drivers/net/ice/meson.build b/drivers/net/ice/meson.build index 460528854a..98288f6ac0 100644 --- a/drivers/net/ice/meson.build +++ b/drivers/net/ice/meson.build @@ -28,21 +28,13 @@ if arch_subdir == 'x86' cflags += ['-fno-asynchronous-unwind-tables'] endif - # compile AVX2 version if either: - # a. we have AVX supported in minimum instruction set baseline - # b. it's not minimum instruction set, but supported by compiler - if cc.get_define('__AVX2__', args: machine_args) != '' - cflags += ['-DCC_AVX2_SUPPORT'] - sources += files('ice_rxtx_vec_avx2.c') - elif cc.has_argument('-mavx2') - cflags += ['-DCC_AVX2_SUPPORT'] - ice_avx2_lib = static_library('ice_avx2_lib', - 'ice_rxtx_vec_avx2.c', - dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash], - include_directories: includes, - c_args: [cflags, '-mavx2']) - objs += ice_avx2_lib.extract_objects('ice_rxtx_vec_avx2.c') - endif + cflags += ['-DCC_AVX2_SUPPORT'] + ice_avx2_lib = static_library('ice_avx2_lib', + 'ice_rxtx_vec_avx2.c', + dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash], + include_directories: includes, + c_args: [cflags, '-mavx2']) + objs += ice_avx2_lib.extract_objects('ice_rxtx_vec_avx2.c') ice_avx512_cpu_support = ( cc.get_define('__AVX512F__', args: machine_args) != '' and diff --git a/lib/acl/meson.build b/lib/acl/meson.build index fbe17f9454..87f19757a8 100644 --- a/lib/acl/meson.build +++ b/lib/acl/meson.build @@ -14,24 +14,12 @@ headers = files('rte_acl.h', 'rte_acl_osdep.h') if dpdk_conf.has('RTE_ARCH_X86') sources += files('acl_run_sse.c') - # compile AVX2 version if either: - # a. we have AVX supported in minimum instruction set baseline - # b. it's not minimum instruction set, but supported by compiler - # - # in former case, just add avx2 C file to files list - # in latter case, compile c file to static lib, using correct compiler - # flags, and then have the .o file from static lib linked into main lib. - if cc.get_define('__AVX2__', args: machine_args) != '' - sources += files('acl_run_avx2.c') - cflags += '-DCC_AVX2_SUPPORT' - elif cc.has_argument('-mavx2') - avx2_tmplib = static_library('avx2_tmp', - 'acl_run_avx2.c', - dependencies: static_rte_eal, - c_args: cflags + ['-mavx2']) - objs += avx2_tmplib.extract_objects('acl_run_avx2.c') - cflags += '-DCC_AVX2_SUPPORT' - endif + cflags += '-DCC_AVX2_SUPPORT' + avx2_tmplib = static_library('avx2_tmp', + 'acl_run_avx2.c', + dependencies: static_rte_eal, + c_args: cflags + ['-mavx2']) + objs += avx2_tmplib.extract_objects('acl_run_avx2.c') # compile AVX512 version if: # we are building 64-bit binary AND binutils can generate proper code From patchwork Thu Jul 27 09:31:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 129711 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9C31D42F5B; Thu, 27 Jul 2023 11:31:33 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 19B634324C; Thu, 27 Jul 2023 11:31:24 +0200 (CEST) Received: from mgamail.intel.com (unknown [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 5829040693 for ; Thu, 27 Jul 2023 11:31:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1690450280; x=1721986280; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+MbSw47jp5HzI6VnVoGLM9dwjGB3sGyanF8O9pC2vTE=; b=UT7GBppIMKnQpEKfTupbq4ewexQpvn6sImYRMsRZ9ma8U/znjeQDm0iU HgQP5UUdSUt1j2T2ZHnf/ITvbKBDrl1DaD03gsGaGPJUgFOjcAza6mEmI 4h1h2TCWxmo+CTas34beyqHEF7lYkjmLTwetMytwiIf0DUnKcFPGB0tj4 N93FbXK+e5DSu7ZofiRvX4BNn3uz4vsKENrIk8gRVuAUWIhoukMj3WD6h T8AlqjyOw8/r+uxAi/5Dfv7l0TVWgJUWpHlYXXU7eo/w4HxEydUotz/l1 jEHHcWtt++3UVCUmcwW1U3uoMf/2igSzqIvQNEA+U2FyMJMhAUyZL0gbV w==; X-IronPort-AV: E=McAfee;i="6600,9927,10783"; a="434537447" X-IronPort-AV: E=Sophos;i="6.01,234,1684825200"; d="scan'208";a="434537447" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jul 2023 02:31:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10783"; a="756584463" X-IronPort-AV: E=Sophos;i="6.01,234,1684825200"; d="scan'208";a="756584463" Received: from silpixa00401385.ir.intel.com ([10.237.214.14]) by orsmga008.jf.intel.com with ESMTP; 27 Jul 2023 02:31:18 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson Subject: [PATCH 2/2] build: remove unnecessary AVX2 compiler flag Date: Thu, 27 Jul 2023 10:31:07 +0100 Message-Id: <20230727093107.7242-3-bruce.richardson@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230727093107.7242-1-bruce.richardson@intel.com> References: <20230727093107.7242-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Since AVX2 is always available at build time, the CC_AVX2_SUPPORT cflag became equivalent to the RTE_ARCH_X86 one. Therefore, we can just remove all use of the flag, replacing it will the RTE_ARCH_X86 one, and also simplifying the code in a few places where we can merge with other X86/non-X86 blocks e.g. for providing SSE fallbacks. Signed-off-by: Bruce Richardson --- drivers/net/bnxt/bnxt_ethdev.c | 8 ++++---- drivers/net/bnxt/bnxt_rxr.h | 2 +- drivers/net/bnxt/bnxt_txr.h | 2 +- drivers/net/bnxt/meson.build | 1 - drivers/net/i40e/i40e_rxtx.c | 14 ++++---------- drivers/net/i40e/meson.build | 1 - drivers/net/iavf/iavf_rxtx_vec_common.h | 2 +- drivers/net/iavf/meson.build | 1 - drivers/net/ice/meson.build | 1 - lib/acl/meson.build | 1 - lib/acl/rte_acl.c | 10 +++------- 11 files changed, 14 insertions(+), 29 deletions(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index ee1552452a..e8c178241f 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -1280,7 +1280,7 @@ bnxt_receive_function(struct rte_eth_dev *eth_dev) if (bp->ieee_1588) goto use_scalar_rx; -#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT) +#if defined(RTE_ARCH_X86) if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1) { PMD_DRV_LOG(INFO, @@ -1332,7 +1332,7 @@ bnxt_transmit_function(struct rte_eth_dev *eth_dev) BNXT_TRUFLOW_EN(bp) || bp->ieee_1588) goto use_scalar_tx; -#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT) +#if defined(RTE_ARCH_X86) if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1) { PMD_DRV_LOG(INFO, @@ -3019,7 +3019,7 @@ static const struct { #if defined(RTE_ARCH_X86) {bnxt_recv_pkts_vec, "Vector SSE"}, #endif -#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT) +#if defined(RTE_ARCH_X86) {bnxt_recv_pkts_vec_avx2, "Vector AVX2"}, #endif #if defined(RTE_ARCH_ARM64) @@ -3053,7 +3053,7 @@ static const struct { #if defined(RTE_ARCH_X86) {bnxt_xmit_pkts_vec, "Vector SSE"}, #endif -#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT) +#if defined(RTE_ARCH_X86) {bnxt_xmit_pkts_vec_avx2, "Vector AVX2"}, #endif #if defined(RTE_ARCH_ARM64) diff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h index 8e722b7bf0..af53bc0c25 100644 --- a/drivers/net/bnxt/bnxt_rxr.h +++ b/drivers/net/bnxt/bnxt_rxr.h @@ -112,7 +112,7 @@ uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq); #endif -#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT) +#if defined(RTE_ARCH_X86) uint16_t bnxt_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts); #endif diff --git a/drivers/net/bnxt/bnxt_txr.h b/drivers/net/bnxt/bnxt_txr.h index 8e391ee58a..e64ea2c7d1 100644 --- a/drivers/net/bnxt/bnxt_txr.h +++ b/drivers/net/bnxt/bnxt_txr.h @@ -52,7 +52,7 @@ uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts); #endif -#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT) +#if defined(RTE_ARCH_X86) uint16_t bnxt_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts); #endif diff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build index c223a21002..1f9ce51f43 100644 --- a/drivers/net/bnxt/meson.build +++ b/drivers/net/bnxt/meson.build @@ -53,7 +53,6 @@ subdir('hcapi/cfa') if arch_subdir == 'x86' sources += files('bnxt_rxtx_vec_sse.c') - cflags += ['-DCC_AVX2_SUPPORT'] # build AVX2 code with instruction set explicitly enabled for runtime selection bnxt_avx2_lib = static_library('bnxt_avx2_lib', 'bnxt_rxtx_vec_avx2.c', diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index b4f65b58fa..63fef1a5ea 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -3216,15 +3216,9 @@ get_avx_supported(bool request_avx512) #endif } else { if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 && - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 && - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) -#ifdef CC_AVX2_SUPPORT + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 && + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) return true; -#else - PMD_DRV_LOG(NOTICE, - "AVX2 is not supported in build env"); - return false; -#endif } return false; @@ -3608,7 +3602,7 @@ i40e_set_default_pctype_table(struct rte_eth_dev *dev) } } -#ifndef CC_AVX2_SUPPORT +#ifndef RTE_ARCH_X86 uint16_t i40e_recv_pkts_vec_avx2(void __rte_unused *rx_queue, struct rte_mbuf __rte_unused **rx_pkts, @@ -3632,4 +3626,4 @@ i40e_xmit_pkts_vec_avx2(void __rte_unused * tx_queue, { return 0; } -#endif /* ifndef CC_AVX2_SUPPORT */ +#endif /* ifndef RTE_ARCH_X86 */ diff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build index 46600520e1..f8827e4995 100644 --- a/drivers/net/i40e/meson.build +++ b/drivers/net/i40e/meson.build @@ -49,7 +49,6 @@ if arch_subdir == 'x86' cflags += ['-fno-asynchronous-unwind-tables'] endif - cflags += ['-DCC_AVX2_SUPPORT'] i40e_avx2_lib = static_library('i40e_avx2_lib', 'i40e_rxtx_vec_avx2.c', dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash], diff --git a/drivers/net/iavf/iavf_rxtx_vec_common.h b/drivers/net/iavf/iavf_rxtx_vec_common.h index ddb13ce8c3..25f22d7267 100644 --- a/drivers/net/iavf/iavf_rxtx_vec_common.h +++ b/drivers/net/iavf/iavf_rxtx_vec_common.h @@ -396,7 +396,7 @@ iavf_txd_enable_offload(__rte_unused struct rte_mbuf *tx_pkt, *txd_hi |= ((uint64_t)td_cmd) << IAVF_TXD_QW1_CMD_SHIFT; } -#ifdef CC_AVX2_SUPPORT +#ifdef RTE_ARCH_X86 static __rte_always_inline void iavf_rxq_rearm_common(struct iavf_rx_queue *rxq, __rte_unused bool avx512) { diff --git a/drivers/net/iavf/meson.build b/drivers/net/iavf/meson.build index ff949ef92b..a6ce2725c3 100644 --- a/drivers/net/iavf/meson.build +++ b/drivers/net/iavf/meson.build @@ -29,7 +29,6 @@ if arch_subdir == 'x86' cflags += ['-fno-asynchronous-unwind-tables'] endif - cflags += ['-DCC_AVX2_SUPPORT'] iavf_avx2_lib = static_library('iavf_avx2_lib', 'iavf_rxtx_vec_avx2.c', dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash], diff --git a/drivers/net/ice/meson.build b/drivers/net/ice/meson.build index 98288f6ac0..a957fc5d3a 100644 --- a/drivers/net/ice/meson.build +++ b/drivers/net/ice/meson.build @@ -28,7 +28,6 @@ if arch_subdir == 'x86' cflags += ['-fno-asynchronous-unwind-tables'] endif - cflags += ['-DCC_AVX2_SUPPORT'] ice_avx2_lib = static_library('ice_avx2_lib', 'ice_rxtx_vec_avx2.c', dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash], diff --git a/lib/acl/meson.build b/lib/acl/meson.build index 87f19757a8..9cba08321a 100644 --- a/lib/acl/meson.build +++ b/lib/acl/meson.build @@ -14,7 +14,6 @@ headers = files('rte_acl.h', 'rte_acl_osdep.h') if dpdk_conf.has('RTE_ARCH_X86') sources += files('acl_run_sse.c') - cflags += '-DCC_AVX2_SUPPORT' avx2_tmplib = static_library('avx2_tmp', 'acl_run_avx2.c', dependencies: static_rte_eal, diff --git a/lib/acl/rte_acl.c b/lib/acl/rte_acl.c index a61c3ba188..4182006d1d 100644 --- a/lib/acl/rte_acl.c +++ b/lib/acl/rte_acl.c @@ -42,10 +42,9 @@ rte_acl_classify_avx512x32(__rte_unused const struct rte_acl_ctx *ctx, } #endif -#ifndef CC_AVX2_SUPPORT +#ifndef RTE_ARCH_X86 /* - * If the compiler doesn't support AVX2 instructions, - * then the dummy one would be used instead for AVX2 classify method. + * If ISA doesn't have AVX2 or SSE, provide dummy fallbacks */ int rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx, @@ -56,9 +55,6 @@ rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx, { return -ENOTSUP; } -#endif - -#ifndef RTE_ARCH_X86 int rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx, __rte_unused const uint8_t **data, @@ -182,7 +178,7 @@ acl_check_alg_x86(enum rte_acl_classify_alg alg) } if (alg == RTE_ACL_CLASSIFY_AVX2) { -#ifdef CC_AVX2_SUPPORT +#ifdef RTE_ARCH_X86 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256) return 0;