From patchwork Fri Aug 25 10:36:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankur Dwivedi X-Patchwork-Id: 130767 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D618A430FF; Fri, 25 Aug 2023 12:37:01 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C84DF40EE4; Fri, 25 Aug 2023 12:37:01 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 61F09400D5 for ; Fri, 25 Aug 2023 12:37:00 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37P3ctLH001995 for ; Fri, 25 Aug 2023 03:36:59 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=vcu8vXor15KqZgkdLpn2EiYJdhwDFoHEHX76myjVbCM=; b=QGyCaqkXQcIs0HzC+GzgMRsfOAcdYv5YG4TTZM5OgZs1WEMiVt6lX1FVTWIKFH8IfyqZ hLndwR51OYYHIxcvb0fYLOrSZ6t3iNIUUEoXN10X7ASOpbawrvHPzPfBPGtm86aoQiU8 inIjBee5F5FIB4MxIssE+PMPL1miGdnqs/urLwS6+k9XkEFjKvW9qcRGCgnTdfTIymrc OvHr2bgEKLMo+aPLplaxthpnJiEPIvoReGfR9JkJQVtERBN5afXEAF0mUCJmve/m6DwT cr4LFj7DbGEEue0DkbfN8yXZzhosxB0m6gkhZiGQj8hfMQ5iL5o8nNzDV/fc0yPYkpjl dA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3spmk291nf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 25 Aug 2023 03:36:59 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 25 Aug 2023 03:36:57 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 25 Aug 2023 03:36:57 -0700 Received: from localhost.localdomain (unknown [10.28.36.185]) by maili.marvell.com (Postfix) with ESMTP id 8C5C83F7093; Fri, 25 Aug 2023 03:36:55 -0700 (PDT) From: Ankur Dwivedi To: CC: , , , "Ankur Dwivedi" Subject: [PATCH v2 1/1] net/cnxk: support MACsec PN threshold events on multiple ports Date: Fri, 25 Aug 2023 16:06:35 +0530 Message-ID: <20230825103635.3614778-2-adwivedi@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230825103635.3614778-1-adwivedi@marvell.com> References: <20230823055000.2692083-1-adwivedi@marvell.com> <20230825103635.3614778-1-adwivedi@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: wmzKB2tUFwaZXmmQyN81V1vAC8uEwi0F X-Proofpoint-GUID: wmzKB2tUFwaZXmmQyN81V1vAC8uEwi0F X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-08-25_08,2023-08-25_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Adds sa to port mapping in roc mcs. The sa to port map is updated when the sa is created. A portid field is also added to macsec event callback function. The above changes helps to propagate the tx and rx pn threshold events to the correct ethernet device. Signed-off-by: Ankur Dwivedi --- drivers/common/cnxk/roc_mcs.c | 22 +++++++++++++++++++--- drivers/common/cnxk/roc_mcs.h | 8 ++++++-- drivers/common/cnxk/roc_mcs_sec_cfg.c | 6 ++++++ drivers/common/cnxk/version.map | 1 + drivers/net/cnxk/cnxk_ethdev_mcs.c | 14 +++++++++++++- 5 files changed, 45 insertions(+), 6 deletions(-) diff --git a/drivers/common/cnxk/roc_mcs.c b/drivers/common/cnxk/roc_mcs.c index 1f269ddae5..f823f7f478 100644 --- a/drivers/common/cnxk/roc_mcs.c +++ b/drivers/common/cnxk/roc_mcs.c @@ -10,6 +10,7 @@ struct mcs_event_cb { enum roc_mcs_event_type event; roc_mcs_dev_cb_fn cb_fn; void *cb_arg; + void *userdata; void *ret_param; uint32_t active; }; @@ -320,12 +321,16 @@ roc_mcs_intr_configure(struct roc_mcs *mcs, struct roc_mcs_intr_cfg *config) { struct mcs_intr_cfg *req; struct msg_rsp *rsp; + int rc; if (config == NULL) return -EINVAL; MCS_SUPPORT_CHECK; + if (mcs->intr_cfg_once) + return 0; + req = mbox_alloc_msg_mcs_intr_cfg(mcs->mbox); if (req == NULL) return -ENOMEM; @@ -333,7 +338,11 @@ roc_mcs_intr_configure(struct roc_mcs *mcs, struct roc_mcs_intr_cfg *config) req->intr_mask = config->intr_mask; req->mcs_id = mcs->idx; - return mbox_process_msg(mcs->mbox, (void *)&rsp); + rc = mbox_process_msg(mcs->mbox, (void *)&rsp); + if (rc == 0) + mcs->intr_cfg_once = true; + + return rc; } int @@ -630,7 +639,7 @@ roc_mcs_event_cb_register(struct roc_mcs *mcs, enum roc_mcs_event_type event, cb->cb_fn = cb_fn; cb->cb_arg = cb_arg; cb->event = event; - mcs->userdata = userdata; + cb->userdata = userdata; TAILQ_INSERT_TAIL(cb_list, cb, next); } @@ -678,7 +687,8 @@ mcs_event_cb_process(struct roc_mcs *mcs, struct roc_mcs_event_desc *desc) cb->active = 1; mcs_cb.ret_param = desc; - rc = mcs_cb.cb_fn(mcs->userdata, mcs_cb.ret_param, mcs_cb.cb_arg); + rc = mcs_cb.cb_fn(mcs_cb.userdata, mcs_cb.ret_param, mcs_cb.cb_arg, + mcs->sa_port_map[desc->metadata.sa_idx]); cb->active = 0; } @@ -788,6 +798,10 @@ mcs_alloc_rsrc_bmap(struct roc_mcs *mcs) } } + mcs->sa_port_map = plt_zmalloc(sizeof(uint8_t) * hw->sa_entries, 0); + if (mcs->sa_port_map == NULL) + goto exit; + return rc; exit: @@ -865,6 +879,8 @@ roc_mcs_dev_fini(struct roc_mcs *mcs) plt_free(priv->port_rsrc); + plt_free(mcs->sa_port_map); + roc_idev_mcs_free(mcs); plt_free(mcs); diff --git a/drivers/common/cnxk/roc_mcs.h b/drivers/common/cnxk/roc_mcs.h index afac6c92e2..1b554f79c9 100644 --- a/drivers/common/cnxk/roc_mcs.h +++ b/drivers/common/cnxk/roc_mcs.h @@ -477,15 +477,17 @@ struct roc_mcs_fips_result_rsp { }; /** User application callback to be registered for any notifications from driver. */ -typedef int (*roc_mcs_dev_cb_fn)(void *userdata, struct roc_mcs_event_desc *desc, void *cb_arg); +typedef int (*roc_mcs_dev_cb_fn)(void *userdata, struct roc_mcs_event_desc *desc, void *cb_arg, + uint8_t port_id); struct roc_mcs { TAILQ_ENTRY(roc_mcs) next; struct plt_pci_device *pci_dev; struct mbox *mbox; - void *userdata; uint8_t idx; uint8_t refcount; + bool intr_cfg_once; + uint8_t *sa_port_map; #define ROC_MCS_MEM_SZ (1 * 1024) uint8_t reserved[ROC_MCS_MEM_SZ] __plt_cache_aligned; @@ -556,6 +558,8 @@ __roc_api int roc_mcs_tx_sc_sa_map_write(struct roc_mcs *mcs, struct roc_mcs_tx_sc_sa_map *tx_sc_sa_map); __roc_api int roc_mcs_tx_sc_sa_map_read(struct roc_mcs *mcs, struct roc_mcs_tx_sc_sa_map *tx_sc_sa_map); +/* SA to Port map update */ +__roc_api void roc_mcs_sa_port_map_update(struct roc_mcs *mcs, int sa_id, uint8_t port_id); /* Flow entry read, write and enable */ __roc_api int roc_mcs_flowid_entry_write(struct roc_mcs *mcs, diff --git a/drivers/common/cnxk/roc_mcs_sec_cfg.c b/drivers/common/cnxk/roc_mcs_sec_cfg.c index 7b3a4c91e8..e2fd3e7b8c 100644 --- a/drivers/common/cnxk/roc_mcs_sec_cfg.c +++ b/drivers/common/cnxk/roc_mcs_sec_cfg.c @@ -526,3 +526,9 @@ roc_mcs_flowid_entry_enable(struct roc_mcs *mcs, struct roc_mcs_flowid_ena_dis_e return mbox_process_msg(mcs->mbox, (void *)&rsp); } + +void +roc_mcs_sa_port_map_update(struct roc_mcs *mcs, int sa_id, uint8_t port_id) +{ + mcs->sa_port_map[sa_id] = port_id; +} diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 8c71497df8..47b219af2b 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -170,6 +170,7 @@ INTERNAL { roc_mcs_rx_sc_sa_map_write; roc_mcs_sa_policy_read; roc_mcs_sa_policy_write; + roc_mcs_sa_port_map_update; roc_mcs_sc_stats_get; roc_mcs_secy_policy_read; roc_mcs_secy_policy_write; diff --git a/drivers/net/cnxk/cnxk_ethdev_mcs.c b/drivers/net/cnxk/cnxk_ethdev_mcs.c index 5264774394..06ef7c98f3 100644 --- a/drivers/net/cnxk/cnxk_ethdev_mcs.c +++ b/drivers/net/cnxk/cnxk_ethdev_mcs.c @@ -113,6 +113,8 @@ cnxk_eth_macsec_sa_create(void *device, struct rte_security_macsec_sa *conf) return -EINVAL; } + roc_mcs_sa_port_map_update(mcs_dev->mdev, sa_id, mcs_dev->port_id); + return sa_id; } @@ -586,9 +588,11 @@ cnxk_eth_macsec_session_stats_get(struct cnxk_eth_dev *dev, struct cnxk_macsec_s } static int -cnxk_mcs_event_cb(void *userdata, struct roc_mcs_event_desc *desc, void *cb_arg) +cnxk_mcs_event_cb(void *userdata, struct roc_mcs_event_desc *desc, void *cb_arg, + uint8_t port_id) { struct rte_eth_event_macsec_desc d = {0}; + struct cnxk_mcs_dev *mcs_dev = userdata; d.metadata = (uint64_t)userdata; @@ -617,15 +621,23 @@ cnxk_mcs_event_cb(void *userdata, struct roc_mcs_event_desc *desc, void *cb_arg) break; case ROC_MCS_EVENT_RX_SA_PN_HARD_EXP: d.type = RTE_ETH_EVENT_MACSEC_RX_SA_PN_HARD_EXP; + if (mcs_dev->port_id != port_id) + return 0; break; case ROC_MCS_EVENT_RX_SA_PN_SOFT_EXP: d.type = RTE_ETH_EVENT_MACSEC_RX_SA_PN_SOFT_EXP; + if (mcs_dev->port_id != port_id) + return 0; break; case ROC_MCS_EVENT_TX_SA_PN_HARD_EXP: d.type = RTE_ETH_EVENT_MACSEC_TX_SA_PN_HARD_EXP; + if (mcs_dev->port_id != port_id) + return 0; break; case ROC_MCS_EVENT_TX_SA_PN_SOFT_EXP: d.type = RTE_ETH_EVENT_MACSEC_TX_SA_PN_SOFT_EXP; + if (mcs_dev->port_id != port_id) + return 0; break; default: plt_err("Unknown MACsec event type: %d", desc->type);