From patchwork Tue Sep 19 10:42:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Dooley X-Patchwork-Id: 131621 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 65A3742601; Tue, 19 Sep 2023 12:42:28 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 59D0C40A70; Tue, 19 Sep 2023 12:42:26 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id BBF89402ED for ; Tue, 19 Sep 2023 12:42:23 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695120143; x=1726656143; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=igOOzA84dG8GBVeurOMbMDjHykHnw0dWBNjmwLfixB8=; b=CdjUKBbPxwj7m6k4rBLNIIwzni667+rPBnhoJNbIJ6FwWyaP6ip9Pc8+ FWedjqZtFK851x64/aniO9CLSQ9kG0TtYhKIad7omOgraUDXiNFwQldO/ LH0amz1yV0+3j1kKZpvlbTWu7/mYAxD8wjZEzo6D/vuh9l8mzqiB6kyoc CKKcTMKcmSjgWIOKrVhh3zmWpDzbWJl4QxxP5OMq69hldZssLVNSFvtKu ZkN6DQw5yQrCfjCkP9LRLLIgHGamrEDyAPrDOMIqevYsaTao5B3rp1Knb o7s9nGdSIhFTaJ+4wxAz9yxXZSL7j3t+IlCD8P6qLGVo92RSjKQkoZyUW w==; X-IronPort-AV: E=McAfee;i="6600,9927,10837"; a="443992584" X-IronPort-AV: E=Sophos;i="6.02,159,1688454000"; d="scan'208";a="443992584" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Sep 2023 03:42:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10837"; a="775502143" X-IronPort-AV: E=Sophos;i="6.02,159,1688454000"; d="scan'208";a="775502143" Received: from silpixa00400883.ir.intel.com ([10.243.22.155]) by orsmga008.jf.intel.com with ESMTP; 19 Sep 2023 03:42:21 -0700 From: Brian Dooley To: Kai Ji , Pablo de Lara Cc: dev@dpdk.org, gakhil@marvell.com, Brian Dooley , Ciara Power Subject: [PATCH v9 1/3] crypto/ipsec_mb: add digest encrypted feature Date: Tue, 19 Sep 2023 10:42:15 +0000 Message-Id: <20230919104217.3104962-2-brian.dooley@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230919104217.3104962-1-brian.dooley@intel.com> References: <20230421101310.420593-1-brian.dooley@intel.com> <20230919104217.3104962-1-brian.dooley@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org AESNI_MB PMD does not support Digest Encrypted. This patch adds a check and support for this feature. Signed-off-by: Brian Dooley Acked-by: Ciara Power --- v9: Added release notes v7: Separate synchronous fix into separate commit v6: Add skipping tests for synchronous crypto v5: Fix checkpatch warnings v4: Add comments and small refactor v3: Add Digest encrypted support to docs v2: Fixed CHECKPATCH warning --- doc/guides/cryptodevs/features/aesni_mb.ini | 1 + doc/guides/rel_notes/release_23_11.rst | 4 + drivers/crypto/ipsec_mb/pmd_aesni_mb.c | 109 +++++++++++++++++++- 3 files changed, 109 insertions(+), 5 deletions(-) diff --git a/doc/guides/cryptodevs/features/aesni_mb.ini b/doc/guides/cryptodevs/features/aesni_mb.ini index e4e965c35a..8df5fa2c85 100644 --- a/doc/guides/cryptodevs/features/aesni_mb.ini +++ b/doc/guides/cryptodevs/features/aesni_mb.ini @@ -20,6 +20,7 @@ OOP LB In LB Out = Y CPU crypto = Y Symmetric sessionless = Y Non-Byte aligned data = Y +Digest encrypted = Y ; ; Supported crypto algorithms of the 'aesni_mb' crypto driver. diff --git a/doc/guides/rel_notes/release_23_11.rst b/doc/guides/rel_notes/release_23_11.rst index 333e1d95a2..4757f41a7e 100644 --- a/doc/guides/rel_notes/release_23_11.rst +++ b/doc/guides/rel_notes/release_23_11.rst @@ -78,6 +78,10 @@ New Features * build: Optional libraries can now be selected with the new ``enable_libs`` build option similarly to the existing ``enable_drivers`` build option. +* **Updated ipsec_mb crypto driver.** + + * Added support for Digest Encrypted to AESNI_MB PMD asynchronous crypto. + Removed Items ------------- diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c index 9e298023d7..7f61065939 100644 --- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c +++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c @@ -1438,6 +1438,54 @@ set_gcm_job(IMB_MGR *mb_mgr, IMB_JOB *job, const uint8_t sgl, return 0; } +/** Check if conditions are met for digest-appended operations */ +static uint8_t * +aesni_mb_digest_appended_in_src(struct rte_crypto_op *op, IMB_JOB *job, + uint32_t oop) +{ + unsigned int auth_size, cipher_size; + uint8_t *end_cipher; + uint8_t *start_cipher; + + if (job->cipher_mode == IMB_CIPHER_NULL) + return NULL; + + if (job->cipher_mode == IMB_CIPHER_ZUC_EEA3 || + job->cipher_mode == IMB_CIPHER_SNOW3G_UEA2_BITLEN || + job->cipher_mode == IMB_CIPHER_KASUMI_UEA1_BITLEN) { + cipher_size = (op->sym->cipher.data.offset >> 3) + + (op->sym->cipher.data.length >> 3); + } else { + cipher_size = (op->sym->cipher.data.offset) + + (op->sym->cipher.data.length); + } + if (job->hash_alg == IMB_AUTH_ZUC_EIA3_BITLEN || + job->hash_alg == IMB_AUTH_SNOW3G_UIA2_BITLEN || + job->hash_alg == IMB_AUTH_KASUMI_UIA1 || + job->hash_alg == IMB_AUTH_ZUC256_EIA3_BITLEN) { + auth_size = (op->sym->auth.data.offset >> 3) + + (op->sym->auth.data.length >> 3); + } else { + auth_size = (op->sym->auth.data.offset) + + (op->sym->auth.data.length); + } + + if (!oop) { + end_cipher = rte_pktmbuf_mtod_offset(op->sym->m_src, uint8_t *, cipher_size); + start_cipher = rte_pktmbuf_mtod(op->sym->m_src, uint8_t *); + } else { + end_cipher = rte_pktmbuf_mtod_offset(op->sym->m_dst, uint8_t *, cipher_size); + start_cipher = rte_pktmbuf_mtod(op->sym->m_dst, uint8_t *); + } + + if (start_cipher < op->sym->auth.digest.data && + op->sym->auth.digest.data < end_cipher) { + return rte_pktmbuf_mtod_offset(op->sym->m_src, uint8_t *, auth_size); + } else { + return NULL; + } +} + /** * Process a crypto operation and complete a IMB_JOB job structure for * submission to the multi buffer library for processing. @@ -1580,9 +1628,12 @@ set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp, } else { if (aead) job->auth_tag_output = op->sym->aead.digest.data; - else - job->auth_tag_output = op->sym->auth.digest.data; - + else { + job->auth_tag_output = aesni_mb_digest_appended_in_src(op, job, oop); + if (job->auth_tag_output == NULL) { + job->auth_tag_output = op->sym->auth.digest.data; + } + } if (session->auth.req_digest_len != job->auth_tag_output_len_in_bytes) { job->auth_tag_output = @@ -1917,6 +1968,7 @@ post_process_mb_job(struct ipsec_mb_qp *qp, IMB_JOB *job) struct aesni_mb_session *sess = NULL; uint8_t *linear_buf = NULL; int sgl = 0; + uint8_t oop = 0; uint8_t is_docsis_sec = 0; if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) { @@ -1962,8 +2014,54 @@ post_process_mb_job(struct ipsec_mb_qp *qp, IMB_JOB *job) op->sym->auth.digest.data, sess->auth.req_digest_len, &op->status); - } else + } else { + if (!op->sym->m_dst || op->sym->m_dst == op->sym->m_src) { + /* in-place operation */ + oop = 0; + } else { /* out-of-place operation */ + oop = 1; + } + + /* Enable digest check */ + if (op->sym->m_src->nb_segs == 1 && op->sym->m_dst != NULL + && !is_aead_algo(job->hash_alg, sess->template_job.cipher_mode) && + aesni_mb_digest_appended_in_src(op, job, oop) != NULL) { + unsigned int auth_size, cipher_size; + int unencrypted_bytes = 0; + if (job->cipher_mode == IMB_CIPHER_SNOW3G_UEA2_BITLEN || + job->cipher_mode == IMB_CIPHER_KASUMI_UEA1_BITLEN || + job->cipher_mode == IMB_CIPHER_ZUC_EEA3) { + cipher_size = (op->sym->cipher.data.offset >> 3) + + (op->sym->cipher.data.length >> 3); + } else { + cipher_size = (op->sym->cipher.data.offset) + + (op->sym->cipher.data.length); + } + if (job->hash_alg == IMB_AUTH_ZUC_EIA3_BITLEN || + job->hash_alg == IMB_AUTH_SNOW3G_UIA2_BITLEN || + job->hash_alg == IMB_AUTH_KASUMI_UIA1 || + job->hash_alg == IMB_AUTH_ZUC256_EIA3_BITLEN) { + auth_size = (op->sym->auth.data.offset >> 3) + + (op->sym->auth.data.length >> 3); + } else { + auth_size = (op->sym->auth.data.offset) + + (op->sym->auth.data.length); + } + /* Check for unencrypted bytes in partial digest cases */ + if (job->cipher_mode != IMB_CIPHER_NULL) { + unencrypted_bytes = auth_size + + job->auth_tag_output_len_in_bytes - cipher_size; + } + if (unencrypted_bytes > 0) + rte_memcpy( + rte_pktmbuf_mtod_offset(op->sym->m_dst, uint8_t *, + cipher_size), + rte_pktmbuf_mtod_offset(op->sym->m_src, uint8_t *, + cipher_size), + unencrypted_bytes); + } generate_digest(job, op, sess); + } break; default: op->status = RTE_CRYPTO_OP_STATUS_ERROR; @@ -2555,7 +2653,8 @@ RTE_INIT(ipsec_mb_register_aesni_mb) RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT | RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | - RTE_CRYPTODEV_FF_SECURITY; + RTE_CRYPTODEV_FF_SECURITY | + RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED; aesni_mb_data->internals_priv_size = 0; aesni_mb_data->ops = &aesni_mb_pmd_ops; From patchwork Tue Sep 19 10:42:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Dooley X-Patchwork-Id: 131622 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2E3C942601; Tue, 19 Sep 2023 12:42:34 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8885D40A7A; Tue, 19 Sep 2023 12:42:27 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id B97CB4028B; Tue, 19 Sep 2023 12:42:25 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; 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19 Sep 2023 03:42:23 -0700 From: Brian Dooley To: Akhil Goyal , Fan Zhang Cc: dev@dpdk.org, Brian Dooley , adamx.dybkowski@intel.com, stable@dpdk.org, Ciara Power Subject: [PATCH v9 2/3] test/crypto: fix IV in some vectors Date: Tue, 19 Sep 2023 10:42:16 +0000 Message-Id: <20230919104217.3104962-3-brian.dooley@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230919104217.3104962-1-brian.dooley@intel.com> References: <20230421101310.420593-1-brian.dooley@intel.com> <20230919104217.3104962-1-brian.dooley@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org SNOW3G and ZUC algorithms require non-zero length IVs. Fixes: c6c267a00a92 ("test/crypto: add mixed encypted-digest") Cc: adamx.dybkowski@intel.com Cc: stable@dpdk.org Signed-off-by: Brian Dooley Acked-by: Ciara Power --- app/test/test_cryptodev_mixed_test_vectors.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/app/test/test_cryptodev_mixed_test_vectors.h b/app/test/test_cryptodev_mixed_test_vectors.h index 161e2d905f..9c4313185e 100644 --- a/app/test/test_cryptodev_mixed_test_vectors.h +++ b/app/test/test_cryptodev_mixed_test_vectors.h @@ -478,8 +478,10 @@ struct mixed_cipher_auth_test_data auth_aes_cmac_cipher_snow_test_case_1 = { }, .cipher_iv = { .data = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, - .len = 0, + .len = 16, }, .cipher = { .len_bits = 516 << 3, @@ -917,8 +919,10 @@ struct mixed_cipher_auth_test_data auth_aes_cmac_cipher_zuc_test_case_1 = { }, .cipher_iv = { .data = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, - .len = 0, + .len = 16, }, .cipher = { .len_bits = 516 << 3, From patchwork Tue Sep 19 10:42:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Dooley X-Patchwork-Id: 131623 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B4EE042601; Tue, 19 Sep 2023 12:42:40 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DCFB740DCE; Tue, 19 Sep 2023 12:42:29 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 19B0040A81; Tue, 19 Sep 2023 12:42:27 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695120148; x=1726656148; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JOBAGj/rlGgHaM3gsE+NVVcgCRJXHbw/FQZmJg+JPvI=; b=Qm7gWt7mhS2Yl4fVgWMhoXS9dEJ+8aZs2Yg0yKy4tS7ZypUmt18jrwSF VWEifRT95oxizUuMFuFlqnLVJDNKVRmJZIVilGxJ6cKjYq1T7JiPHkeu3 R2hyCYJ3i47DUvudoPmndLA+arK3b4GZYWx0IpII21Dji2bgJ+FOh9Z5i TPH8CmnX3elwd94kUNOD7mV9DB1LsP78f8z2dFOtJMmQyGBKsgnTNS0Vv eYAxMkj/11JhYc8GSnrT6j4RP/O+U2pqv/8qfvwmHmK0X+RDLFaT0hCQ0 /U24xUBhXtxEFsPz5NQjOBWQNTRnwrVDpwNOtipeZFzmkCjLznN3bOVPQ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10837"; a="443992610" X-IronPort-AV: E=Sophos;i="6.02,159,1688454000"; d="scan'208";a="443992610" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Sep 2023 03:42:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10837"; a="775502170" X-IronPort-AV: E=Sophos;i="6.02,159,1688454000"; d="scan'208";a="775502170" Received: from silpixa00400883.ir.intel.com ([10.243.22.155]) by orsmga008.jf.intel.com with ESMTP; 19 Sep 2023 03:42:25 -0700 From: Brian Dooley To: Akhil Goyal , Fan Zhang Cc: dev@dpdk.org, Brian Dooley , pablo.de.lara.guarch@intel.com, stable@dpdk.org, Ciara Power Subject: [PATCH v9 3/3] test/crypto: fix failing synchronous tests Date: Tue, 19 Sep 2023 10:42:17 +0000 Message-Id: <20230919104217.3104962-4-brian.dooley@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230919104217.3104962-1-brian.dooley@intel.com> References: <20230421101310.420593-1-brian.dooley@intel.com> <20230919104217.3104962-1-brian.dooley@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Some synchronous tests are not supported for cpu crypto and need to be skipped. This commit adds in extra skips for these tests. Fixes: 55ab4a8c4fb5 ("test/crypto: disable wireless cases for CPU crypto API") Cc: pablo.de.lara.guarch@intel.com Cc: stable@dpdk.org Signed-off-by: Brian Dooley Acked-by: Ciara Power --- v8: reword commit and add stable --- app/test/test_cryptodev.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c index 956268bfcd..70f6b7ece1 100644 --- a/app/test/test_cryptodev.c +++ b/app/test/test_cryptodev.c @@ -6394,6 +6394,9 @@ test_zuc_auth_cipher(const struct wireless_test_data *tdata, tdata->digest.len) < 0) return TEST_SKIPPED; + if (gbl_action_type == RTE_SECURITY_ACTION_TYPE_CPU_CRYPTO) + return TEST_SKIPPED; + rte_cryptodev_info_get(ts_params->valid_devs[0], &dev_info); uint64_t feat_flags = dev_info.feature_flags; @@ -7829,6 +7832,9 @@ test_mixed_auth_cipher(const struct mixed_cipher_auth_test_data *tdata, if (global_api_test_type == CRYPTODEV_RAW_API_TEST) return TEST_SKIPPED; + if (gbl_action_type == RTE_SECURITY_ACTION_TYPE_CPU_CRYPTO) + return TEST_SKIPPED; + rte_cryptodev_info_get(ts_params->valid_devs[0], &dev_info); uint64_t feat_flags = dev_info.feature_flags;