From patchwork Mon Oct 23 23:19:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Christensen X-Patchwork-Id: 133204 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 110E3431E7; Tue, 24 Oct 2023 01:19:56 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9560040298; Tue, 24 Oct 2023 01:19:55 +0200 (CEST) Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by mails.dpdk.org (Postfix) with ESMTP id 1CC304027E for ; Tue, 24 Oct 2023 01:19:53 +0200 (CEST) Received: from pps.filterd (m0353723.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39NNDYW7003574; Mon, 23 Oct 2023 23:19:51 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=fUwcrpRZIP7LELO0LsjJBSP1/TnkKQbTlTc2zRICcmQ=; b=gmkY+4AIZ4SUUGh9rVRcVnjeef++y+0X0xSJVDZ5xPDT/Eq5BqSlbww3PHkLVh0jeWOp SpX2gZy5e9FfaiuflwAV9D+aPfGQFHXtVQMZGI6jAtxd4KcqQ+cFtILh1nq2aUSQozEV L9kMzkx8xQ/iICQ2lFp4Ky4XfI/+nkFwRv+/LiPEc7SS7umyqhYN9BJYlZ68HY08pxRb nfccOaL3QDuI92jM/i9/mdAvWCskgpptB+aaKjUqlGIy8ng5N2vXfb72LpMgDAa2YTz/ oCs6Sg7Kx8blBgHJf9yy/QXNRml+cV97H2FVnY+vecV7rDvBcEhhH4E1KtHD7kZsL/BB Fw== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3tx1w5gtm1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 23 Oct 2023 23:19:51 +0000 Received: from m0353723.ppops.net (m0353723.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 39NNDb53003984; Mon, 23 Oct 2023 23:19:50 GMT Received: from ppma13.dal12v.mail.ibm.com (dd.9e.1632.ip4.static.sl-reverse.com [50.22.158.221]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3tx1w5gtkt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 23 Oct 2023 23:19:50 +0000 Received: from pps.filterd (ppma13.dal12v.mail.ibm.com [127.0.0.1]) by ppma13.dal12v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 39NKSJMQ024356; Mon, 23 Oct 2023 23:19:50 GMT Received: from smtprelay04.wdc07v.mail.ibm.com ([172.16.1.71]) by ppma13.dal12v.mail.ibm.com (PPS) with ESMTPS id 3tvu6ju9qw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 23 Oct 2023 23:19:50 +0000 Received: from smtpav01.dal12v.mail.ibm.com (smtpav01.dal12v.mail.ibm.com [10.241.53.100]) by smtprelay04.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 39NNJn0e41288076 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 23 Oct 2023 23:19:49 GMT Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0CF0858059; Mon, 23 Oct 2023 23:19:49 +0000 (GMT) Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 85DBA58057; Mon, 23 Oct 2023 23:19:48 +0000 (GMT) Received: from ltc19u30.ibm.com (unknown [9.114.224.51]) by smtpav01.dal12v.mail.ibm.com (Postfix) with ESMTP; Mon, 23 Oct 2023 23:19:48 +0000 (GMT) From: David Christensen To: thomas@monjalon.net, Ruifeng Wang , Min Zhou , David Christensen , Stanislaw Kardach , Bruce Richardson , Konstantin Ananyev Cc: dev@dpdk.org Subject: [PATCH v2] eal/linux: eal/linux: verify mmu type for DPDK support (ppc64le) Date: Mon, 23 Oct 2023 19:19:39 -0400 Message-Id: <20231023231939.188417-1-drc@linux.vnet.ibm.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20231010225100.335049-1-drc@linux.vnet.ibm.com> References: <20231010225100.335049-1-drc@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: PSN4jAWuk7VJOrBZT6I5HA-icdAdKCkc X-Proofpoint-ORIG-GUID: IURTgIoGihuvVGPqkAutlnXpgDXCf-Uq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-23_21,2023-10-19_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 clxscore=1011 mlxscore=0 malwarescore=0 suspectscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310170001 definitions=main-2310230204 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org IBM POWER systems support more than one type of memory management unit (MMU). The Power ISA 3.0 specification, which applies to P9 and later CPUs, defined a new Radix MMU which, among other things, allows an anonymous memory page mapping to be converted into a hugepage mapping at a specific address. This is a required feature in DPDK so we need to test the MMU type when POWER systems are used and provide a more useful error message for the user when running on an unsupported system. Bugzilla ID: 1221 Suggested-by: Thomas Monjalon Signed-off-by: David Christensen --- v2: * Replace ifdef with arch specific functions lib/eal/arm/meson.build | 1 + lib/eal/arm/rte_mmu.c | 11 ++++++++ lib/eal/common/eal_private.h | 7 +++++ lib/eal/linux/eal.c | 7 +++++ lib/eal/loongarch/meson.build | 1 + lib/eal/loongarch/rte_mmu.c | 11 ++++++++ lib/eal/ppc/meson.build | 1 + lib/eal/ppc/rte_mmu.c | 53 +++++++++++++++++++++++++++++++++++ lib/eal/riscv/meson.build | 1 + lib/eal/riscv/rte_mmu.c | 11 ++++++++ lib/eal/x86/meson.build | 1 + lib/eal/x86/rte_mmu.c | 11 ++++++++ 12 files changed, 116 insertions(+) create mode 100644 lib/eal/arm/rte_mmu.c create mode 100644 lib/eal/loongarch/rte_mmu.c create mode 100644 lib/eal/ppc/rte_mmu.c create mode 100644 lib/eal/riscv/rte_mmu.c create mode 100644 lib/eal/x86/rte_mmu.c -- 2.39.1 diff --git a/lib/eal/arm/meson.build b/lib/eal/arm/meson.build index dca1106aaeec..6fba3d6ba7b8 100644 --- a/lib/eal/arm/meson.build +++ b/lib/eal/arm/meson.build @@ -7,5 +7,6 @@ sources += files( 'rte_cpuflags.c', 'rte_cycles.c', 'rte_hypervisor.c', + 'rte_mmu.c', 'rte_power_intrinsics.c', ) diff --git a/lib/eal/arm/rte_mmu.c b/lib/eal/arm/rte_mmu.c new file mode 100644 index 000000000000..f0002d9f89b1 --- /dev/null +++ b/lib/eal/arm/rte_mmu.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) IBM Corporation 2023 + */ + +#include "eal_private.h" + +bool +eal_mmu_supported_arch(void) +{ + return true; +} diff --git a/lib/eal/common/eal_private.h b/lib/eal/common/eal_private.h index ebd496b537cf..7d84adb5b328 100644 --- a/lib/eal/common/eal_private.h +++ b/lib/eal/common/eal_private.h @@ -354,6 +354,13 @@ unsigned eal_cpu_core_id(unsigned lcore_id); */ int eal_cpu_detected(unsigned lcore_id); +/** + * Check for architecture supported MMU. + * + * This function is private to the EAL. + */ +bool eal_mmu_supported_arch(void); + /** * Set TSC frequency from precise value or estimation * diff --git a/lib/eal/linux/eal.c b/lib/eal/linux/eal.c index 5f4b2fb0054a..26333934de0b 100644 --- a/lib/eal/linux/eal.c +++ b/lib/eal/linux/eal.c @@ -983,6 +983,13 @@ rte_eal_init(int argc, char **argv) return -1; } + /* verify if DPDK supported on architecture MMU */ + if (!eal_mmu_supported_arch()) { + rte_eal_init_alert("unsupported MMU type."); + rte_errno = ENOTSUP; + return -1; + } + if (!__atomic_compare_exchange_n(&run_once, &has_run, 1, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED)) { rte_eal_init_alert("already called initialization."); diff --git a/lib/eal/loongarch/meson.build b/lib/eal/loongarch/meson.build index 4dcc27babb9b..3acfe6c3bd77 100644 --- a/lib/eal/loongarch/meson.build +++ b/lib/eal/loongarch/meson.build @@ -7,5 +7,6 @@ sources += files( 'rte_cpuflags.c', 'rte_cycles.c', 'rte_hypervisor.c', + 'rte_mmu.c', 'rte_power_intrinsics.c', ) diff --git a/lib/eal/loongarch/rte_mmu.c b/lib/eal/loongarch/rte_mmu.c new file mode 100644 index 000000000000..f0002d9f89b1 --- /dev/null +++ b/lib/eal/loongarch/rte_mmu.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) IBM Corporation 2023 + */ + +#include "eal_private.h" + +bool +eal_mmu_supported_arch(void) +{ + return true; +} diff --git a/lib/eal/ppc/meson.build b/lib/eal/ppc/meson.build index 71c7ac870da6..eeeaeee240b7 100644 --- a/lib/eal/ppc/meson.build +++ b/lib/eal/ppc/meson.build @@ -7,5 +7,6 @@ sources += files( 'rte_cpuflags.c', 'rte_cycles.c', 'rte_hypervisor.c', + 'rte_mmu.c', 'rte_power_intrinsics.c', ) diff --git a/lib/eal/ppc/rte_mmu.c b/lib/eal/ppc/rte_mmu.c new file mode 100644 index 000000000000..017a8768bce3 --- /dev/null +++ b/lib/eal/ppc/rte_mmu.c @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) IBM Corporation 2023 + */ + +#include "rte_log.h" +#include "eal_private.h" + +bool +eal_mmu_supported_arch(void) +{ + static const char proc_cpuinfo[] = "/proc/cpuinfo"; + static const char str_mmu[] = "MMU"; + static const char str_radix[] = "Radix"; + static const char err_msg[] = "DPDK on PPC64 requires radix-mmu"; + char buf[512]; + char *ret = NULL; + FILE *f = fopen(proc_cpuinfo, "r"); + + if (f == NULL) { + RTE_LOG(ERR, EAL, "Cannot open %s\n", proc_cpuinfo); + return false; + } + + /* + * Example "MMU" in /proc/cpuinfo: + * ... + * model : 8335-GTW + * machine : PowerNV 8335-GTW + * firmware : OPAL + * MMU : Radix + * ... or ... + * model : IBM,9009-22A + * machine : CHRP IBM,9009-22A + * MMU : Hash + */ + while (fgets(buf, sizeof(buf), f) != NULL) { + ret = strstr(buf, str_mmu); + if (ret == NULL) + continue; + ret += sizeof(str_mmu) - 1; + ret = strchr(ret, ':'); + if (ret == NULL) + continue; + ret = strstr(ret, str_radix); + break; + } + fclose(f); + if (ret == NULL) { + fprintf(stderr, "EAL: FATAL: %s\n", err_msg); + RTE_LOG(ERR, EAL, "%s\n", err_msg); + } + return (ret != NULL); +} diff --git a/lib/eal/riscv/meson.build b/lib/eal/riscv/meson.build index dca1106aaeec..6fba3d6ba7b8 100644 --- a/lib/eal/riscv/meson.build +++ b/lib/eal/riscv/meson.build @@ -7,5 +7,6 @@ sources += files( 'rte_cpuflags.c', 'rte_cycles.c', 'rte_hypervisor.c', + 'rte_mmu.c', 'rte_power_intrinsics.c', ) diff --git a/lib/eal/riscv/rte_mmu.c b/lib/eal/riscv/rte_mmu.c new file mode 100644 index 000000000000..f0002d9f89b1 --- /dev/null +++ b/lib/eal/riscv/rte_mmu.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) IBM Corporation 2023 + */ + +#include "eal_private.h" + +bool +eal_mmu_supported_arch(void) +{ + return true; +} diff --git a/lib/eal/x86/meson.build b/lib/eal/x86/meson.build index d33a240e1a98..e08dffa13dcc 100644 --- a/lib/eal/x86/meson.build +++ b/lib/eal/x86/meson.build @@ -7,6 +7,7 @@ sources += files( 'rte_cpuflags.c', 'rte_cycles.c', 'rte_hypervisor.c', + 'rte_mmu.c', 'rte_spinlock.c', 'rte_power_intrinsics.c', ) diff --git a/lib/eal/x86/rte_mmu.c b/lib/eal/x86/rte_mmu.c new file mode 100644 index 000000000000..f0002d9f89b1 --- /dev/null +++ b/lib/eal/x86/rte_mmu.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) IBM Corporation 2023 + */ + +#include "eal_private.h" + +bool +eal_mmu_supported_arch(void) +{ + return true; +}