From patchwork Fri Jan 5 11:32:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Venkat Kumar Ande X-Patchwork-Id: 135755 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CC2774383C; Fri, 5 Jan 2024 12:33:57 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 265E7402BF; Fri, 5 Jan 2024 12:33:57 +0100 (CET) Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2076.outbound.protection.outlook.com [40.107.223.76]) by mails.dpdk.org (Postfix) with ESMTP id E938F4027C for ; Fri, 5 Jan 2024 12:33:55 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=U+ef2gXROqh+NWQQD/DUO6Nqi7DUhPlhur0MzMLFGFGVhx+Yb5ZdV1R3Ka719m2rYUCqUN5PDo/kJmgNxMq5jNOgASxWK/juR59pR/9Ub9JyXJphuiGz2zHnwr9pa8VG+66zn8KkH29EoozjTS9ZCtnQCyJe/NatRm7CdiWnFo2pfH6XDcD5Eb0Mr8GZs6zs1A5FoITH7MfyFv3NbE5zw2Lc15PlJzMXWjhZLZxybTqD3sMe/ymJ56FnpquXALBsxBaASzjQfvMYLxP0oXuuL8lanX9t8HqGJUdNMIihgyRVSGIFEfT33V6HuNbgl0bkKciSCIAk9G/xChog7Tf5xQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8K9rCw5snMRY2BHRXRbxxUxQcflqVw1kj37vrlAm3cI=; b=jQg/dAAZsHDsOzlhMMsDuzHQ4uNRp0NinoFG0xGDegYsVBN7hX5jox8RlWvi7sLc/9fktDcCU8SOxnIJrwrl5zM2czfCFCeGlVvu312XVd/zxSDxFfIXtFKrYKd9uDXvWYs2gZ5ExeFWpSEiHo0wjm1641w4dVS7lEgqTPltlEafeTXI18JgxXKYojGtPXDb0wkttwm2n9kaQY6KCB8HH0ZZpPycQixpMSYaMDcdSFh//Y9f7gUZXVLy3GsyrL3DZVrkG12hJm2bfNTDfoacJOtVxgrxpXgO1au1EGwuR6fywqUlq6SVQXxPwsTb7fgTpo+RzDXdkVTXY5YzJCWSYA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=dpdk.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=8K9rCw5snMRY2BHRXRbxxUxQcflqVw1kj37vrlAm3cI=; b=UskD/jNgyy7BBsAY4Eg0FYElV8MLGUbeyAjVE3cUkLSH95wM1Kq8Ps2ohdiYYbfx2/n8jMeO+OK4Dzry6WxM31UBq8daotOje6Cb8mfF+RVg+Z+OMYpycgb0/XfbleMUC5xArAx5N3hWa2fU1tWmYakbHD/vt5yh6gY+U6h0rhk= Received: from PA7P264CA0102.FRAP264.PROD.OUTLOOK.COM (2603:10a6:102:348::7) by DM6PR12MB4862.namprd12.prod.outlook.com (2603:10b6:5:1b7::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7159.17; Fri, 5 Jan 2024 11:33:51 +0000 Received: from SN1PEPF0002BA4F.namprd03.prod.outlook.com (2603:10a6:102:348:cafe::e) by PA7P264CA0102.outlook.office365.com (2603:10a6:102:348::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7091.26 via Frontend Transport; Fri, 5 Jan 2024 11:33:50 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF0002BA4F.mail.protection.outlook.com (10.167.242.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7159.9 via Frontend Transport; Fri, 5 Jan 2024 11:33:50 +0000 Received: from cae-Lilac-RMB.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Fri, 5 Jan 2024 05:33:42 -0600 From: Venkat Kumar Ande To: CC: , Venkat Kumar Ande Subject: [PATCH v1] net/axgbe: read and save the port property register Date: Fri, 5 Jan 2024 17:02:50 +0530 Message-ID: <20240105113250.11492-1-venkatkumar.ande@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA4F:EE_|DM6PR12MB4862:EE_ X-MS-Office365-Filtering-Correlation-Id: f2c057f0-f0eb-459b-0c2c-08dc0de2306d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PHmbzTCceLmCJLIKEtKfh7rHb+XKfn6IfQoDr9xyIxqxImebBtRuVr2kEiJ5BhiRHGGACO0+2luSt6A3W0gVJkopyUZSExBND6b/6WxW9EQZzgNpd0INt9RAkwoh2SXHuHpMkmygUMwaq3HhUxq8G7Max9xxgswd87A52/ZUL84/vEPTT1+X1SFK8VJKl2gxZ0DtmakBjSJb6RG5b6Y/AHYYDDrvQ59MN9ho/sYBDT+yLLlpHWhLwsjzdK0XAxHUNYt4ps38mmsur4EYtt043cjv22hepEOR8AU86qDEF2DI/0HPIvh3T9NDBSR6PSVKGg3pf7JUJZgxuceag/JVAKSsDbZrhdniSBVcp1W3j/EIBhj4eXpj8+Py1NUdLsqUH8jfSgJzoh7Wx3hKQmon6Gwupon6fUgsMl7oP0xEvvl5PRPKzZkXxnehcAqRVHoxt2TmS+LKxrXw+lhy2Tn60lSaVn7kXw41nXmgurtKDWz26aU/Mh0I8EFKg+/DkljVvG47BxyeP6Jz++sjpOYPvY5aycrlfz8NKZyvB7yWOHkfQ4L4e6dm8tVuW0Aiw64BfZs9968k2iySHclIFSM9EJB+DHMMIJE0bSw/GIP7AhgrJhMWOoCwhiwsXc4FVH7O83nRmauXMM3/41Lseh3Ic7KZ8oCsSB4DBbRHs6gcbBhjhh0fNl63Mxo5G6l/r6o9feu2CvwjjCsSQdx33zhBxMJb+QwR7Kc/wvWRBVXI3EKHWxi4qo5hIdb93vYeXhI3/rVTH3yk2ZjsOcDUHMmnHQ== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(376002)(346002)(39860400002)(396003)(136003)(230922051799003)(64100799003)(82310400011)(451199024)(1800799012)(186009)(46966006)(40470700004)(36840700001)(82740400003)(70206006)(70586007)(6916009)(47076005)(81166007)(356005)(7696005)(86362001)(6666004)(1076003)(2616005)(426003)(16526019)(336012)(26005)(5660300002)(2906002)(36756003)(478600001)(83380400001)(54906003)(316002)(8936002)(8676002)(4326008)(40460700003)(40480700001)(36860700001)(41300700001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Jan 2024 11:33:50.5209 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f2c057f0-f0eb-459b-0c2c-08dc0de2306d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002BA4F.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4862 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Venkat Kumar Ande Read and save the port property registers once during the device probe and then use the saved values as they are needed. Signed-off-by: Venkat Kumar Ande Acked-by: Selwin Sebastian Signed-off-by: Venkat Kumar Ande --- drivers/net/axgbe/axgbe_ethdev.c | 21 +++++---- drivers/net/axgbe/axgbe_ethdev.h | 7 +++ drivers/net/axgbe/axgbe_phy_impl.c | 68 ++++++++++++------------------ 3 files changed, 48 insertions(+), 48 deletions(-) diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c index f174d46143..3450374535 100644 --- a/drivers/net/axgbe/axgbe_ethdev.c +++ b/drivers/net/axgbe/axgbe_ethdev.c @@ -2342,23 +2342,28 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev) pdata->arcache = AXGBE_DMA_OS_ARCACHE; pdata->awcache = AXGBE_DMA_OS_AWCACHE; + /* Read the port property registers */ + pdata->pp0 = XP_IOREAD(pdata, XP_PROP_0); + pdata->pp1 = XP_IOREAD(pdata, XP_PROP_1); + pdata->pp2 = XP_IOREAD(pdata, XP_PROP_2); + pdata->pp3 = XP_IOREAD(pdata, XP_PROP_3); + pdata->pp4 = XP_IOREAD(pdata, XP_PROP_4); + /* Set the maximum channels and queues */ - reg = XP_IOREAD(pdata, XP_PROP_1); - pdata->tx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_DMA); - pdata->rx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_DMA); - pdata->tx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_QUEUES); - pdata->rx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_QUEUES); + pdata->tx_max_channel_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_TX_DMA); + pdata->rx_max_channel_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_RX_DMA); + pdata->tx_max_q_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_TX_QUEUES); + pdata->rx_max_q_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_RX_QUEUES); /* Set the hardware channel and queue counts */ axgbe_set_counts(pdata); /* Set the maximum fifo amounts */ - reg = XP_IOREAD(pdata, XP_PROP_2); - pdata->tx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, TX_FIFO_SIZE); + pdata->tx_max_fifo_size = XP_GET_BITS(pdata->pp2, XP_PROP_2, TX_FIFO_SIZE); pdata->tx_max_fifo_size *= 16384; pdata->tx_max_fifo_size = RTE_MIN(pdata->tx_max_fifo_size, pdata->vdata->tx_max_fifo_size); - pdata->rx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, RX_FIFO_SIZE); + pdata->rx_max_fifo_size = XP_GET_BITS(pdata->pp2, XP_PROP_2, RX_FIFO_SIZE); pdata->rx_max_fifo_size *= 16384; pdata->rx_max_fifo_size = RTE_MIN(pdata->rx_max_fifo_size, pdata->vdata->rx_max_fifo_size); diff --git a/drivers/net/axgbe/axgbe_ethdev.h b/drivers/net/axgbe/axgbe_ethdev.h index 7f19321d88..df5d63c493 100644 --- a/drivers/net/axgbe/axgbe_ethdev.h +++ b/drivers/net/axgbe/axgbe_ethdev.h @@ -539,6 +539,13 @@ struct axgbe_port { void *xprop_regs; /* AXGBE property registers */ void *xi2c_regs; /* AXGBE I2C CSRs */ + /* Port property registers */ + unsigned int pp0; + unsigned int pp1; + unsigned int pp2; + unsigned int pp3; + unsigned int pp4; + bool cdr_track_early; /* XPCS indirect addressing lock */ unsigned int xpcs_window_def_reg; diff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c index d97fbbfddd..44ff28517c 100644 --- a/drivers/net/axgbe/axgbe_phy_impl.c +++ b/drivers/net/axgbe/axgbe_phy_impl.c @@ -1709,40 +1709,35 @@ static int axgbe_phy_link_status(struct axgbe_port *pdata, int *an_restart) static void axgbe_phy_sfp_gpio_setup(struct axgbe_port *pdata) { struct axgbe_phy_data *phy_data = pdata->phy_data; - unsigned int reg; - - reg = XP_IOREAD(pdata, XP_PROP_3); phy_data->sfp_gpio_address = AXGBE_GPIO_ADDRESS_PCA9555 + - XP_GET_BITS(reg, XP_PROP_3, GPIO_ADDR); + XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_ADDR); - phy_data->sfp_gpio_mask = XP_GET_BITS(reg, XP_PROP_3, GPIO_MASK); + phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_MASK); - phy_data->sfp_gpio_rx_los = XP_GET_BITS(reg, XP_PROP_3, + phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_RX_LOS); - phy_data->sfp_gpio_tx_fault = XP_GET_BITS(reg, XP_PROP_3, + phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_TX_FAULT); - phy_data->sfp_gpio_mod_absent = XP_GET_BITS(reg, XP_PROP_3, + phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_MOD_ABS); - phy_data->sfp_gpio_rate_select = XP_GET_BITS(reg, XP_PROP_3, + phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_RATE_SELECT); } static void axgbe_phy_sfp_comm_setup(struct axgbe_port *pdata) { struct axgbe_phy_data *phy_data = pdata->phy_data; - unsigned int reg, mux_addr_hi, mux_addr_lo; + unsigned int mux_addr_hi, mux_addr_lo; - reg = XP_IOREAD(pdata, XP_PROP_4); - - mux_addr_hi = XP_GET_BITS(reg, XP_PROP_4, MUX_ADDR_HI); - mux_addr_lo = XP_GET_BITS(reg, XP_PROP_4, MUX_ADDR_LO); + mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI); + mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO); if (mux_addr_lo == AXGBE_SFP_DIRECT) return; phy_data->sfp_comm = AXGBE_SFP_COMM_PCA9545; phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo; - phy_data->sfp_mux_channel = XP_GET_BITS(reg, XP_PROP_4, MUX_CHAN); + phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_CHAN); } static void axgbe_phy_sfp_setup(struct axgbe_port *pdata) @@ -1778,12 +1773,11 @@ static bool axgbe_phy_redrv_error(struct axgbe_phy_data *phy_data) static int axgbe_phy_mdio_reset_setup(struct axgbe_port *pdata) { struct axgbe_phy_data *phy_data = pdata->phy_data; - unsigned int reg; if (phy_data->conn_type != AXGBE_CONN_TYPE_MDIO) return 0; - reg = XP_IOREAD(pdata, XP_PROP_3); - phy_data->mdio_reset = XP_GET_BITS(reg, XP_PROP_3, MDIO_RESET); + + phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET); switch (phy_data->mdio_reset) { case AXGBE_MDIO_RESET_NONE: case AXGBE_MDIO_RESET_I2C_GPIO: @@ -1796,12 +1790,12 @@ static int axgbe_phy_mdio_reset_setup(struct axgbe_port *pdata) } if (phy_data->mdio_reset == AXGBE_MDIO_RESET_I2C_GPIO) { phy_data->mdio_reset_addr = AXGBE_GPIO_ADDRESS_PCA9555 + - XP_GET_BITS(reg, XP_PROP_3, + XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET_I2C_ADDR); - phy_data->mdio_reset_gpio = XP_GET_BITS(reg, XP_PROP_3, + phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET_I2C_GPIO); } else if (phy_data->mdio_reset == AXGBE_MDIO_RESET_INT_GPIO) { - phy_data->mdio_reset_gpio = XP_GET_BITS(reg, XP_PROP_3, + phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET_INT_GPIO); } @@ -1893,12 +1887,9 @@ static bool axgbe_phy_conn_type_mismatch(struct axgbe_port *pdata) static bool axgbe_phy_port_enabled(struct axgbe_port *pdata) { - unsigned int reg; - - reg = XP_IOREAD(pdata, XP_PROP_0); - if (!XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS)) + if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS)) return false; - if (!XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE)) + if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE)) return false; return true; @@ -2061,7 +2052,6 @@ static int axgbe_phy_reset(struct axgbe_port *pdata) static int axgbe_phy_init(struct axgbe_port *pdata) { struct axgbe_phy_data *phy_data; - unsigned int reg; int ret; /* Check if enabled */ @@ -2082,19 +2072,17 @@ static int axgbe_phy_init(struct axgbe_port *pdata) } pdata->phy_data = phy_data; - reg = XP_IOREAD(pdata, XP_PROP_0); - phy_data->port_mode = XP_GET_BITS(reg, XP_PROP_0, PORT_MODE); - phy_data->port_id = XP_GET_BITS(reg, XP_PROP_0, PORT_ID); - phy_data->port_speeds = XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS); - phy_data->conn_type = XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE); - phy_data->mdio_addr = XP_GET_BITS(reg, XP_PROP_0, MDIO_ADDR); - - reg = XP_IOREAD(pdata, XP_PROP_4); - phy_data->redrv = XP_GET_BITS(reg, XP_PROP_4, REDRV_PRESENT); - phy_data->redrv_if = XP_GET_BITS(reg, XP_PROP_4, REDRV_IF); - phy_data->redrv_addr = XP_GET_BITS(reg, XP_PROP_4, REDRV_ADDR); - phy_data->redrv_lane = XP_GET_BITS(reg, XP_PROP_4, REDRV_LANE); - phy_data->redrv_model = XP_GET_BITS(reg, XP_PROP_4, REDRV_MODEL); + phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE); + phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID); + phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS); + phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE); + phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR); + + phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT); + phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF); + phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR); + phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE); + phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL); /* Validate the connection requested */ if (axgbe_phy_conn_type_mismatch(pdata)) {