From patchwork Tue Jan 23 11:40:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 136058 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2AB27439A7; Tue, 23 Jan 2024 12:41:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8DF0D410F2; Tue, 23 Jan 2024 12:41:16 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by mails.dpdk.org (Postfix) with ESMTP id C2DB9402B0; Tue, 23 Jan 2024 12:41:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706010075; x=1737546075; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=I/2EzG5KN81ZqWLYgs0vgLi8timi0LOTCBJaIHoyZmk=; b=UajyE49Az+shjREvI5w6vMmLIkHEsmjItAvpfnUhr2K7OpNzo/AmFstc Kqlx3NoO6zk72HTL1QDxglK7KcM/LuGEttejzT/4rlxjCFzv3Qkidh4vP W2P8V/GvbZu9gT727pNnUoc3++LNCiDd8cOyNEo5613OalS/yfywwjNkp TdTv63xJSfSQMi1hKsu4PgF6Ej6qHTKfJ+eSaRKGftlovYjCTrn99PZmX bCeGFPqQGzz0sCNcbJ0y7rx4QXfug+EIpqQXt6wVUsuJq/V3AevNvwaTi bryPSmE16uDE5rPHO+oGb59KcVQjkXaq+reqQK3hUJDJ61dQQC9Pmmy0G w==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="22965757" X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="22965757" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2024 03:41:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="27722314" Received: from silpixa00400957.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.26]) by orviesa002.jf.intel.com with ESMTP; 23 Jan 2024 03:41:14 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson , stable@dpdk.org Subject: [PATCH 1/6] net/i40e: remove incorrect 16B descriptor read block Date: Tue, 23 Jan 2024 11:40:48 +0000 Message-Id: <20240123114053.172189-2-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240123114053.172189-1-bruce.richardson@intel.com> References: <20240123114053.172189-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org By default, the driver works with 32B descriptors, but has a separate descriptor read block for reading two descriptors at a time when using 16B descriptors. However, the 32B reads used are not guaranteed to be atomic, which will cause issues if that is not the case on a system, since the descriptors may be read in an undefined order. Remove the block, to avoid issues, and just use the regular descriptor reading path for 16B descriptors, if that support is enabled at build time. Fixes: dafadd73762e ("net/i40e: add AVX2 Rx function") Cc: stable@dpdk.org Signed-off-by: Bruce Richardson --- drivers/net/i40e/i40e_rxtx_vec_avx2.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx_vec_avx2.c b/drivers/net/i40e/i40e_rxtx_vec_avx2.c index f468c1fd90..ce87e185f0 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_avx2.c +++ b/drivers/net/i40e/i40e_rxtx_vec_avx2.c @@ -277,19 +277,6 @@ _recv_raw_pkts_vec_avx2(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts, #endif __m256i raw_desc0_1, raw_desc2_3, raw_desc4_5, raw_desc6_7; -#ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC - /* for AVX we need alignment otherwise loads are not atomic */ - if (avx_aligned) { - /* load in descriptors, 2 at a time, in reverse order */ - raw_desc6_7 = _mm256_load_si256((void *)(rxdp + 6)); - rte_compiler_barrier(); - raw_desc4_5 = _mm256_load_si256((void *)(rxdp + 4)); - rte_compiler_barrier(); - raw_desc2_3 = _mm256_load_si256((void *)(rxdp + 2)); - rte_compiler_barrier(); - raw_desc0_1 = _mm256_load_si256((void *)(rxdp + 0)); - } else -#endif do { const __m128i raw_desc7 = _mm_load_si128((void *)(rxdp + 7)); rte_compiler_barrier(); From patchwork Tue Jan 23 11:40:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 136059 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 89754439A7; Tue, 23 Jan 2024 12:41:26 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CD8F9410FB; Tue, 23 Jan 2024 12:41:19 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by mails.dpdk.org (Postfix) with ESMTP id 88ECC410F1 for ; Tue, 23 Jan 2024 12:41:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706010077; x=1737546077; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GOOrFpcPtArETrpFtX6CcH467KUXneg+n2Qe4vgNksw=; b=LdQNhFmenlLpRlig09cyeYAtv8q8LED2rHVEI/iYWTNHQe3TmQMmU/Yd AqEp0Ldz74R/B7+f3dxPZ44YIn+n2oY9WXukwxXuoC8S2lv6omYl5BU75 UsAcPayZhy8gc6ttyjZhTTlZA8IjlrW9Il4Sl0PIgFRvP1OBMrK+17Nzt UMlybgnp+qdT7BafOza8bvYD3Zz/niNuZ5NRF6tCAJRQ93pLg/yeL/rU3 H8Es0mxe+P1jlpxycH62mdnIdUYuyrgjZjMzQfqWmrL7RngLv1mE6yjiy zyJSyehhugQaHnRxOCnVIIx77sCqC6wCvi1oNBtatzOFl8GojE5FTq3hD g==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="22965764" X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="22965764" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2024 03:41:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="27722321" Received: from silpixa00400957.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.26]) by orviesa002.jf.intel.com with ESMTP; 23 Jan 2024 03:41:15 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson Subject: [PATCH 2/6] net/i40e: reduce code indentation Date: Tue, 23 Jan 2024 11:40:49 +0000 Message-Id: <20240123114053.172189-3-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240123114053.172189-1-bruce.richardson@intel.com> References: <20240123114053.172189-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org With the removal of the #ifdef block for 16-byte descriptor loads, the do { } while(0) around the descriptor load block becomes unnecessary. Removing that do-while allows us to reduce indentation level of the code by one tab, and makes the function that little cleaner and clearer to read. Signed-off-by: Bruce Richardson --- drivers/net/i40e/i40e_rxtx_vec_avx2.c | 51 +++++++++++++-------------- 1 file changed, 24 insertions(+), 27 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx_vec_avx2.c b/drivers/net/i40e/i40e_rxtx_vec_avx2.c index ce87e185f0..19cf0ac718 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_avx2.c +++ b/drivers/net/i40e/i40e_rxtx_vec_avx2.c @@ -276,33 +276,30 @@ _recv_raw_pkts_vec_avx2(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts, _mm256_loadu_si256((void *)&sw_ring[i + 4])); #endif - __m256i raw_desc0_1, raw_desc2_3, raw_desc4_5, raw_desc6_7; - do { - const __m128i raw_desc7 = _mm_load_si128((void *)(rxdp + 7)); - rte_compiler_barrier(); - const __m128i raw_desc6 = _mm_load_si128((void *)(rxdp + 6)); - rte_compiler_barrier(); - const __m128i raw_desc5 = _mm_load_si128((void *)(rxdp + 5)); - rte_compiler_barrier(); - const __m128i raw_desc4 = _mm_load_si128((void *)(rxdp + 4)); - rte_compiler_barrier(); - const __m128i raw_desc3 = _mm_load_si128((void *)(rxdp + 3)); - rte_compiler_barrier(); - const __m128i raw_desc2 = _mm_load_si128((void *)(rxdp + 2)); - rte_compiler_barrier(); - const __m128i raw_desc1 = _mm_load_si128((void *)(rxdp + 1)); - rte_compiler_barrier(); - const __m128i raw_desc0 = _mm_load_si128((void *)(rxdp + 0)); - - raw_desc6_7 = _mm256_inserti128_si256( - _mm256_castsi128_si256(raw_desc6), raw_desc7, 1); - raw_desc4_5 = _mm256_inserti128_si256( - _mm256_castsi128_si256(raw_desc4), raw_desc5, 1); - raw_desc2_3 = _mm256_inserti128_si256( - _mm256_castsi128_si256(raw_desc2), raw_desc3, 1); - raw_desc0_1 = _mm256_inserti128_si256( - _mm256_castsi128_si256(raw_desc0), raw_desc1, 1); - } while (0); + const __m128i raw_desc7 = _mm_load_si128((void *)(rxdp + 7)); + rte_compiler_barrier(); + const __m128i raw_desc6 = _mm_load_si128((void *)(rxdp + 6)); + rte_compiler_barrier(); + const __m128i raw_desc5 = _mm_load_si128((void *)(rxdp + 5)); + rte_compiler_barrier(); + const __m128i raw_desc4 = _mm_load_si128((void *)(rxdp + 4)); + rte_compiler_barrier(); + const __m128i raw_desc3 = _mm_load_si128((void *)(rxdp + 3)); + rte_compiler_barrier(); + const __m128i raw_desc2 = _mm_load_si128((void *)(rxdp + 2)); + rte_compiler_barrier(); + const __m128i raw_desc1 = _mm_load_si128((void *)(rxdp + 1)); + rte_compiler_barrier(); + const __m128i raw_desc0 = _mm_load_si128((void *)(rxdp + 0)); + + const __m256i raw_desc6_7 = _mm256_inserti128_si256( + _mm256_castsi128_si256(raw_desc6), raw_desc7, 1); + const __m256i raw_desc4_5 = _mm256_inserti128_si256( + _mm256_castsi128_si256(raw_desc4), raw_desc5, 1); + const __m256i raw_desc2_3 = _mm256_inserti128_si256( + _mm256_castsi128_si256(raw_desc2), raw_desc3, 1); + const __m256i raw_desc0_1 = _mm256_inserti128_si256( + _mm256_castsi128_si256(raw_desc0), raw_desc1, 1); if (split_packet) { int j; From patchwork Tue Jan 23 11:40:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 136060 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AB2B4439A7; Tue, 23 Jan 2024 12:41:32 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0F0DF42D7B; Tue, 23 Jan 2024 12:41:21 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by mails.dpdk.org (Postfix) with ESMTP id 68A94410F1; Tue, 23 Jan 2024 12:41:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706010078; x=1737546078; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2faNGX1t60W20DDcoH4JIR86uc/p92HeEXCC+AhVIJI=; b=VnzvhzTnstSYXJxlbpuWt3boLHUWtv8TIs2eiPcig/yCkBkXBx/lr/SO OtZtVYArUtfW8QkRQPQtlsUpQ+UX+dRFVHPEhBVlNNvitLDJOnbu8Qqpj cDD8gMHucnz7SS78RktfOI8iH49Z3LeoaWx05whoNC83ngg00/wmbtyk4 WJtzmesXBvlPYe51y+4CIfHC3JCwly4dbxDpi/4TQ19AGoQb3Q3Mi5/7z 2ZujrbIyCrC4KQhhvTt8Q617AbXWERdKLQ7W3bu1zFeeAz86XOR1rJs9S GEi3G+g3s5Lgf6JJaPs+NwixDVrw+aXbWOu2eJDJkQGnZJRyYdX2Ba/cd Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="22965770" X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="22965770" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2024 03:41:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="27722331" Received: from silpixa00400957.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.26]) by orviesa002.jf.intel.com with ESMTP; 23 Jan 2024 03:41:16 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson , stable@dpdk.org Subject: [PATCH 3/6] net/iavf: remove incorrect 16B descriptor read block Date: Tue, 23 Jan 2024 11:40:50 +0000 Message-Id: <20240123114053.172189-4-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240123114053.172189-1-bruce.richardson@intel.com> References: <20240123114053.172189-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org By default, the driver works with 32B descriptors, but has a separate descriptor read block for reading two descriptors at a time when using 16B descriptors. However, the 32B reads used are not guaranteed to be atomic, which will cause issues if that is not the case on a system, since the descriptors may be read in an undefined order. Remove the block, to avoid issues, and just use the regular descriptor reading path for 16B descriptors, if that support is enabled at build time. Fixes: af0c246a3800 ("net/iavf: enable AVX2 for iavf") Cc: stable@dpdk.org Signed-off-by: Bruce Richardson --- drivers/net/iavf/iavf_rxtx_vec_avx2.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx2.c b/drivers/net/iavf/iavf_rxtx_vec_avx2.c index 510b4d8f1c..3cec1eef9d 100644 --- a/drivers/net/iavf/iavf_rxtx_vec_avx2.c +++ b/drivers/net/iavf/iavf_rxtx_vec_avx2.c @@ -194,19 +194,6 @@ _iavf_recv_raw_pkts_vec_avx2(struct iavf_rx_queue *rxq, #endif __m256i raw_desc0_1, raw_desc2_3, raw_desc4_5, raw_desc6_7; -#ifdef RTE_LIBRTE_IAVF_16BYTE_RX_DESC - /* for AVX we need alignment otherwise loads are not atomic */ - if (avx_aligned) { - /* load in descriptors, 2 at a time, in reverse order */ - raw_desc6_7 = _mm256_load_si256((void *)(rxdp + 6)); - rte_compiler_barrier(); - raw_desc4_5 = _mm256_load_si256((void *)(rxdp + 4)); - rte_compiler_barrier(); - raw_desc2_3 = _mm256_load_si256((void *)(rxdp + 2)); - rte_compiler_barrier(); - raw_desc0_1 = _mm256_load_si256((void *)(rxdp + 0)); - } else -#endif { const __m128i raw_desc7 = _mm_load_si128((void *)(rxdp + 7)); From patchwork Tue Jan 23 11:40:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 136061 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6C5AA439A7; Tue, 23 Jan 2024 12:41:39 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4F92542DC7; Tue, 23 Jan 2024 12:41:22 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by mails.dpdk.org (Postfix) with ESMTP id B55A6410F1 for ; Tue, 23 Jan 2024 12:41:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706010079; x=1737546079; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=g+fojMfuVJ+e0fKstC9jMLGTMjGGM9zSkpCVs+FkyGM=; b=OdBS5BrTRJ3breV5YZYgPM3Cd8uj/BaID58vFhXCl/48g3RfmtGCHnSr pBMACARfL8BZU92AcaQTIRxV0mmYOWz8/ABQN9HBjQcmtQiDavf378RyZ f4lPEOZPAzsNieo7UrzSfOPUW5rPYqfJB+bBlVQ3i1S3vcSCqyZTrY3W0 XlJTQJdE85gnBIbmOoorUyh1rGr1dpJQ3o5XarfitLCwGdMF1vGvuNMZ/ 42ylPBW5yOI07JhaK82uw95wZx55mxJ/6S9wvmgSRQGJMdM7LTM3DHhTG PqSamL59jg0wDe3881kZLERY8bZpyPTWq91brnx5VCz6gocjX9qzJ/Gth g==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="22965774" X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="22965774" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2024 03:41:18 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="27722338" Received: from silpixa00400957.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.26]) by orviesa002.jf.intel.com with ESMTP; 23 Jan 2024 03:41:18 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson Subject: [PATCH 4/6] net/iavf: reduce code indent Date: Tue, 23 Jan 2024 11:40:51 +0000 Message-Id: <20240123114053.172189-5-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240123114053.172189-1-bruce.richardson@intel.com> References: <20240123114053.172189-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org With the removal of the separate block for 16B-descriptors, we can remove the superfluous braces and dedent the code a bit. This allows us to reduce overall number of lines, since we can merge quite a number of lines together. Signed-off-by: Bruce Richardson --- drivers/net/iavf/iavf_rxtx_vec_avx2.c | 67 ++++++++++----------------- 1 file changed, 24 insertions(+), 43 deletions(-) diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx2.c b/drivers/net/iavf/iavf_rxtx_vec_avx2.c index 3cec1eef9d..49d41af953 100644 --- a/drivers/net/iavf/iavf_rxtx_vec_avx2.c +++ b/drivers/net/iavf/iavf_rxtx_vec_avx2.c @@ -193,49 +193,30 @@ _iavf_recv_raw_pkts_vec_avx2(struct iavf_rx_queue *rxq, _mm256_loadu_si256((void *)&sw_ring[i + 4])); #endif - __m256i raw_desc0_1, raw_desc2_3, raw_desc4_5, raw_desc6_7; - { - const __m128i raw_desc7 = - _mm_load_si128((void *)(rxdp + 7)); - rte_compiler_barrier(); - const __m128i raw_desc6 = - _mm_load_si128((void *)(rxdp + 6)); - rte_compiler_barrier(); - const __m128i raw_desc5 = - _mm_load_si128((void *)(rxdp + 5)); - rte_compiler_barrier(); - const __m128i raw_desc4 = - _mm_load_si128((void *)(rxdp + 4)); - rte_compiler_barrier(); - const __m128i raw_desc3 = - _mm_load_si128((void *)(rxdp + 3)); - rte_compiler_barrier(); - const __m128i raw_desc2 = - _mm_load_si128((void *)(rxdp + 2)); - rte_compiler_barrier(); - const __m128i raw_desc1 = - _mm_load_si128((void *)(rxdp + 1)); - rte_compiler_barrier(); - const __m128i raw_desc0 = - _mm_load_si128((void *)(rxdp + 0)); - - raw_desc6_7 = - _mm256_inserti128_si256 - (_mm256_castsi128_si256(raw_desc6), - raw_desc7, 1); - raw_desc4_5 = - _mm256_inserti128_si256 - (_mm256_castsi128_si256(raw_desc4), - raw_desc5, 1); - raw_desc2_3 = - _mm256_inserti128_si256 - (_mm256_castsi128_si256(raw_desc2), - raw_desc3, 1); - raw_desc0_1 = - _mm256_inserti128_si256 - (_mm256_castsi128_si256(raw_desc0), - raw_desc1, 1); - } + const __m128i raw_desc7 = _mm_load_si128((void *)(rxdp + 7)); + rte_compiler_barrier(); + const __m128i raw_desc6 = _mm_load_si128((void *)(rxdp + 6)); + rte_compiler_barrier(); + const __m128i raw_desc5 = _mm_load_si128((void *)(rxdp + 5)); + rte_compiler_barrier(); + const __m128i raw_desc4 = _mm_load_si128((void *)(rxdp + 4)); + rte_compiler_barrier(); + const __m128i raw_desc3 = _mm_load_si128((void *)(rxdp + 3)); + rte_compiler_barrier(); + const __m128i raw_desc2 = _mm_load_si128((void *)(rxdp + 2)); + rte_compiler_barrier(); + const __m128i raw_desc1 = _mm_load_si128((void *)(rxdp + 1)); + rte_compiler_barrier(); + const __m128i raw_desc0 = _mm_load_si128((void *)(rxdp + 0)); + + const __m256i raw_desc6_7 = + _mm256_inserti128_si256(_mm256_castsi128_si256(raw_desc6), raw_desc7, 1); + const __m256i raw_desc4_5 = + _mm256_inserti128_si256(_mm256_castsi128_si256(raw_desc4), raw_desc5, 1); + const __m256i raw_desc2_3 = + _mm256_inserti128_si256(_mm256_castsi128_si256(raw_desc2), raw_desc3, 1); + const __m256i raw_desc0_1 = + _mm256_inserti128_si256(_mm256_castsi128_si256(raw_desc0), raw_desc1, 1); if (split_packet) { int j; From patchwork Tue Jan 23 11:40:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 136062 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7CC8D439A7; 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a="22965787" X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="22965787" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2024 03:41:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="27722349" Received: from silpixa00400957.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.26]) by orviesa002.jf.intel.com with ESMTP; 23 Jan 2024 03:41:19 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson , stable@dpdk.org Subject: [PATCH 5/6] net/ice: remove incorrect 16B descriptor read block Date: Tue, 23 Jan 2024 11:40:52 +0000 Message-Id: <20240123114053.172189-6-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240123114053.172189-1-bruce.richardson@intel.com> References: <20240123114053.172189-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org By default, the driver works with 32B descriptors, but has a separate descriptor read block for reading two descriptors at a time when using 16B descriptors. However, the 32B reads used are not guaranteed to be atomic, which will cause issues if that is not the case on a system, since the descriptors may be read in an undefined order. Remove the block, to avoid issues, and just use the regular descriptor reading path for 16B descriptors, if that support is enabled at build time. Fixes: ae60d3c9b227 ("net/ice: support Rx AVX2 vector") Cc: stable@dpdk.org Signed-off-by: Bruce Richardson --- drivers/net/ice/ice_rxtx_vec_avx2.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c b/drivers/net/ice/ice_rxtx_vec_avx2.c index 6f6d790967..b93e9c109e 100644 --- a/drivers/net/ice/ice_rxtx_vec_avx2.c +++ b/drivers/net/ice/ice_rxtx_vec_avx2.c @@ -255,19 +255,6 @@ _ice_recv_raw_pkts_vec_avx2(struct ice_rx_queue *rxq, struct rte_mbuf **rx_pkts, #endif __m256i raw_desc0_1, raw_desc2_3, raw_desc4_5, raw_desc6_7; -#ifdef RTE_LIBRTE_ICE_16BYTE_RX_DESC - /* for AVX we need alignment otherwise loads are not atomic */ - if (avx_aligned) { - /* load in descriptors, 2 at a time, in reverse order */ - raw_desc6_7 = _mm256_load_si256((void *)(rxdp + 6)); - rte_compiler_barrier(); - raw_desc4_5 = _mm256_load_si256((void *)(rxdp + 4)); - rte_compiler_barrier(); - raw_desc2_3 = _mm256_load_si256((void *)(rxdp + 2)); - rte_compiler_barrier(); - raw_desc0_1 = _mm256_load_si256((void *)(rxdp + 0)); - } else -#endif { const __m128i raw_desc7 = _mm_load_si128((void *)(rxdp + 7)); From patchwork Tue Jan 23 11:40:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 136063 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A6188439A7; Tue, 23 Jan 2024 12:41:54 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DD44742DE2; Tue, 23 Jan 2024 12:41:24 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by mails.dpdk.org (Postfix) with ESMTP id 5997342DB2 for ; Tue, 23 Jan 2024 12:41:21 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706010082; x=1737546082; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=m/vMB7GcFYhfhkC9hlTv4k+vP4cJZk7/SAHnlcuJTuw=; b=jfQ+NORbp6HwrD27fAgrnlBof0WIKX0wza64tUWmggpH32RThU3eNcmH FWyKcwNr2QXI6gp9qXMC1mC21ytFhWVkzlEVF5IALKTidlSUbPGW5w+fs 9aqzgdE8styCAxIs8jd57z/cvas4ZBheT9fDUGnpvuNtiYxrjzDv9AO95 sac8gF6mL951+c71XNj03AXDr82oB+7x0LeCGOBpGPMppAJK5SEYxXoi6 G9ByXB6F9dSW+agZTK8gzp81C0hK/udzjJd/7CXxWA0MHgF1IrK6hzwem fcX3mtSkMfAAbbxoPtAyXp9FU/k6Jsx8MHFb82DvpH9dAV7Y/tRl7GKls Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="22965799" X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="22965799" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2024 03:41:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,214,1701158400"; d="scan'208";a="27722358" Received: from silpixa00400957.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.26]) by orviesa002.jf.intel.com with ESMTP; 23 Jan 2024 03:41:20 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson Subject: [PATCH 6/6] net/ice: reduce code indent Date: Tue, 23 Jan 2024 11:40:53 +0000 Message-Id: <20240123114053.172189-7-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240123114053.172189-1-bruce.richardson@intel.com> References: <20240123114053.172189-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org With the removal of the separate block for 16B-descriptors, we can remove the superfluous braces and dedent the code a bit. This allows us to reduce overall number of lines, since we can merge quite a number of lines together. Signed-off-by: Bruce Richardson --- drivers/net/ice/ice_rxtx_vec_avx2.c | 67 +++++++++++------------------ 1 file changed, 24 insertions(+), 43 deletions(-) diff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c b/drivers/net/ice/ice_rxtx_vec_avx2.c index b93e9c109e..d6e88dbb29 100644 --- a/drivers/net/ice/ice_rxtx_vec_avx2.c +++ b/drivers/net/ice/ice_rxtx_vec_avx2.c @@ -254,49 +254,30 @@ _ice_recv_raw_pkts_vec_avx2(struct ice_rx_queue *rxq, struct rte_mbuf **rx_pkts, _mm256_loadu_si256((void *)&sw_ring[i + 4])); #endif - __m256i raw_desc0_1, raw_desc2_3, raw_desc4_5, raw_desc6_7; - { - const __m128i raw_desc7 = - _mm_load_si128((void *)(rxdp + 7)); - rte_compiler_barrier(); - const __m128i raw_desc6 = - _mm_load_si128((void *)(rxdp + 6)); - rte_compiler_barrier(); - const __m128i raw_desc5 = - _mm_load_si128((void *)(rxdp + 5)); - rte_compiler_barrier(); - const __m128i raw_desc4 = - _mm_load_si128((void *)(rxdp + 4)); - rte_compiler_barrier(); - const __m128i raw_desc3 = - _mm_load_si128((void *)(rxdp + 3)); - rte_compiler_barrier(); - const __m128i raw_desc2 = - _mm_load_si128((void *)(rxdp + 2)); - rte_compiler_barrier(); - const __m128i raw_desc1 = - _mm_load_si128((void *)(rxdp + 1)); - rte_compiler_barrier(); - const __m128i raw_desc0 = - _mm_load_si128((void *)(rxdp + 0)); - - raw_desc6_7 = - _mm256_inserti128_si256 - (_mm256_castsi128_si256(raw_desc6), - raw_desc7, 1); - raw_desc4_5 = - _mm256_inserti128_si256 - (_mm256_castsi128_si256(raw_desc4), - raw_desc5, 1); - raw_desc2_3 = - _mm256_inserti128_si256 - (_mm256_castsi128_si256(raw_desc2), - raw_desc3, 1); - raw_desc0_1 = - _mm256_inserti128_si256 - (_mm256_castsi128_si256(raw_desc0), - raw_desc1, 1); - } + const __m128i raw_desc7 = _mm_load_si128((void *)(rxdp + 7)); + rte_compiler_barrier(); + const __m128i raw_desc6 = _mm_load_si128((void *)(rxdp + 6)); + rte_compiler_barrier(); + const __m128i raw_desc5 = _mm_load_si128((void *)(rxdp + 5)); + rte_compiler_barrier(); + const __m128i raw_desc4 = _mm_load_si128((void *)(rxdp + 4)); + rte_compiler_barrier(); + const __m128i raw_desc3 = _mm_load_si128((void *)(rxdp + 3)); + rte_compiler_barrier(); + const __m128i raw_desc2 = _mm_load_si128((void *)(rxdp + 2)); + rte_compiler_barrier(); + const __m128i raw_desc1 = _mm_load_si128((void *)(rxdp + 1)); + rte_compiler_barrier(); + const __m128i raw_desc0 = _mm_load_si128((void *)(rxdp + 0)); + + const __m256i raw_desc6_7 = + _mm256_inserti128_si256(_mm256_castsi128_si256(raw_desc6), raw_desc7, 1); + const __m256i raw_desc4_5 = + _mm256_inserti128_si256(_mm256_castsi128_si256(raw_desc4), raw_desc5, 1); + const __m256i raw_desc2_3 = + _mm256_inserti128_si256(_mm256_castsi128_si256(raw_desc2), raw_desc3, 1); + const __m256i raw_desc0_1 = + _mm256_inserti128_si256(_mm256_castsi128_si256(raw_desc0), raw_desc1, 1); if (split_packet) { int j;