From patchwork Tue Feb 27 16:00:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Prakash Shukla X-Patchwork-Id: 137362 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A58C743BF7; Tue, 27 Feb 2024 17:22:38 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 85720406A2; Tue, 27 Feb 2024 17:22:38 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id CB665402A7 for ; Tue, 27 Feb 2024 17:22:37 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41RFgUwF004861; Tue, 27 Feb 2024 08:22:36 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=DW8i0HNylQGRUxBsENpbJ1fd56rGLl0fvJiybIU7a/s=; b=SPA RZe5WfXzFeeq42wZ+BaQylZb+QYyp0MayOknZnlRL6676e2XJC7m2tvwpY0eHPYG +6UpX1gCKDYf75tyx910Veq8sVzhz4gbgYJgo3sSXzi0wPW9ZFMZCBUz2SQWlNfw +6mSLTt6OqN7pB8B2R/4dLzp2MNoT86tVyOuv7z/r4P0t92/iIf6xxxfWH9Gi+Ce Btq30VVodI1aAv4VXjorcdI3AwmzbrArJE2/tNrvMoAygVZsSSGbipyUnjhmLOgD +nkM5xxskhzagroIS+Hb6oLvp8DTBdkp6z6/52IlAHhOIpm6W9pAyDU60TUOgpuM uzTjjoHNFd+rgVqYLNw== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3whjm6879a-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 Feb 2024 08:22:36 -0800 (PST) Received: from DC6WP-EXCH01.marvell.com (10.76.176.21) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.1258.12; Tue, 27 Feb 2024 08:22:35 -0800 Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH01.marvell.com (10.76.176.21) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 27 Feb 2024 11:00:44 -0500 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Tue, 27 Feb 2024 08:00:44 -0800 Received: from cavium-OptiPlex-5090-BM14.. (unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 3E9693F717A; Tue, 27 Feb 2024 08:00:40 -0800 (PST) From: Amit Prakash Shukla To: Cheng Jiang , Chengwen Feng CC: , , , Kevin Laatz , Bruce Richardson , Pavan Nikhilesh , Gowrishankar Muthukrishnan , Amit Prakash Shukla Subject: [PATCH v9 1/4] app/dma-perf: add skip support Date: Tue, 27 Feb 2024 21:30:28 +0530 Message-ID: <20240227160031.3931694-2-amitprakashs@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240227160031.3931694-1-amitprakashs@marvell.com> References: <20240227160031.3931694-1-amitprakashs@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: ZxNYrDq6pMeFlgIad_efQaz7wW-NXOGv X-Proofpoint-GUID: ZxNYrDq6pMeFlgIad_efQaz7wW-NXOGv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-27_03,2024-02-27_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support to skip running a dma-perf test-case. Signed-off-by: Amit Prakash Shukla Acked-by: Anoob Joseph Acked-by: Chengwen Feng --- app/test-dma-perf/config.ini | 2 ++ app/test-dma-perf/main.c | 48 ++++++++++++++++++++++-------------- app/test-dma-perf/main.h | 1 + 3 files changed, 32 insertions(+), 19 deletions(-) diff --git a/app/test-dma-perf/config.ini b/app/test-dma-perf/config.ini index b550f4b23f..4d59234b2a 100644 --- a/app/test-dma-perf/config.ini +++ b/app/test-dma-perf/config.ini @@ -36,6 +36,8 @@ ; If you do not specify a result file, one will be generated with the same name as the configuration ; file, with the addition of "_result.csv" at the end. +; "skip" To skip a test-case set skip to 1. + [case1] type=DMA_MEM_COPY mem_size=10 diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c index 544784df50..e9e40e72e7 100644 --- a/app/test-dma-perf/main.c +++ b/app/test-dma-perf/main.c @@ -86,6 +86,19 @@ output_header(uint32_t case_id, struct test_configure *case_cfg) output_csv(true); } +static int +open_output_csv(const char *rst_path_ptr) +{ + fd = fopen(rst_path_ptr, "a"); + if (!fd) { + printf("Open output CSV file error.\n"); + return 1; + } + output_csv(true); + fclose(fd); + return 0; +} + static void run_test_case(struct test_configure *case_cfg) { @@ -322,6 +335,7 @@ load_configs(const char *path) const char *case_type; const char *lcore_dma; const char *mem_size_str, *buf_size_str, *ring_size_str, *kick_batch_str; + const char *skip; int args_nr, nb_vp; bool is_dma; @@ -341,6 +355,13 @@ load_configs(const char *path) for (i = 0; i < nb_sections; i++) { snprintf(section_name, CFG_NAME_LEN, "case%d", i + 1); test_case = &test_cases[i]; + + skip = rte_cfgfile_get_entry(cfgfile, section_name, "skip"); + if (skip && (atoi(skip) == 1)) { + test_case->is_skip = true; + continue; + } + case_type = rte_cfgfile_get_entry(cfgfile, section_name, "type"); if (case_type == NULL) { printf("Error: No case type in case %d, the test will be finished here.\n", @@ -525,31 +546,20 @@ main(int argc, char *argv[]) printf("Running cases...\n"); for (i = 0; i < case_nb; i++) { - if (!test_cases[i].is_valid) { - printf("Invalid test case %d.\n\n", i + 1); - snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Invalid case %d\n", i + 1); - - fd = fopen(rst_path_ptr, "a"); - if (!fd) { - printf("Open output CSV file error.\n"); + if (test_cases[i].is_skip) { + printf("Test case %d configured to be skipped.\n\n", i + 1); + snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Skip the test-case %d\n", + i + 1); + if (open_output_csv(rst_path_ptr)) return 0; - } - output_csv(true); - fclose(fd); continue; } - if (test_cases[i].test_type == TEST_TYPE_NONE) { - printf("No valid test type in test case %d.\n\n", i + 1); + if (!test_cases[i].is_valid) { + printf("Invalid test case %d.\n\n", i + 1); snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Invalid case %d\n", i + 1); - - fd = fopen(rst_path_ptr, "a"); - if (!fd) { - printf("Open output CSV file error.\n"); + if (open_output_csv(rst_path_ptr)) return 0; - } - output_csv(true); - fclose(fd); continue; } diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h index 62085e6e8f..32670151af 100644 --- a/app/test-dma-perf/main.h +++ b/app/test-dma-perf/main.h @@ -40,6 +40,7 @@ struct lcore_dma_map_t { struct test_configure { bool is_valid; + bool is_skip; uint8_t test_type; const char *test_type_str; uint16_t src_numa_node; From patchwork Tue Feb 27 16:00:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Prakash Shukla X-Patchwork-Id: 137361 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1757C43C0E; Tue, 27 Feb 2024 17:02:45 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0602742EC1; Tue, 27 Feb 2024 17:02:45 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 1533442EC1 for ; Tue, 27 Feb 2024 17:02:42 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41RFgUtW004861; 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(unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 76C343F71D7; Tue, 27 Feb 2024 08:00:48 -0800 (PST) From: Amit Prakash Shukla To: Cheng Jiang , Chengwen Feng CC: , , , Kevin Laatz , Bruce Richardson , "Pavan Nikhilesh" , Gowrishankar Muthukrishnan , Amit Prakash Shukla Subject: [PATCH v9 2/4] app/dma-perf: add PCI device support Date: Tue, 27 Feb 2024 21:30:29 +0530 Message-ID: <20240227160031.3931694-3-amitprakashs@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240227160031.3931694-1-amitprakashs@marvell.com> References: <20240227160031.3931694-1-amitprakashs@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: bMbWnQg1v9YI4KrKI3IbvlrQ0DyP6wtQ X-Proofpoint-GUID: bMbWnQg1v9YI4KrKI3IbvlrQ0DyP6wtQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-27_01,2024-02-27_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support to test performance for "device to memory" and "memory to device" data transfer. Signed-off-by: Amit Prakash Shukla Acked-by: Anoob Joseph Acked-by: Chengwen Feng --- v9: - PCI config parsing using kvargs. app/test-dma-perf/benchmark.c | 117 ++++++++++++++++++++++++++++++---- app/test-dma-perf/config.ini | 33 ++++++++++ app/test-dma-perf/main.c | 77 ++++++++++++++++++++++ app/test-dma-perf/main.h | 7 ++ 4 files changed, 222 insertions(+), 12 deletions(-) diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c index 9b1f58c78c..4370d71134 100644 --- a/app/test-dma-perf/benchmark.c +++ b/app/test-dma-perf/benchmark.c @@ -127,17 +127,54 @@ cache_flush_buf(__rte_unused struct rte_mbuf **array, #endif } +static int +vchan_data_populate(uint32_t dev_id, struct rte_dma_vchan_conf *qconf, + struct test_configure *cfg) +{ + struct rte_dma_info info; + + qconf->direction = cfg->transfer_dir; + + rte_dma_info_get(dev_id, &info); + if (!(RTE_BIT64(qconf->direction) & info.dev_capa)) + return -1; + + qconf->nb_desc = cfg->ring_size.cur; + + switch (qconf->direction) { + case RTE_DMA_DIR_MEM_TO_DEV: + qconf->dst_port.pcie.vfen = 1; + qconf->dst_port.port_type = RTE_DMA_PORT_PCIE; + qconf->dst_port.pcie.coreid = cfg->vchan_dev.port.pcie.coreid; + qconf->dst_port.pcie.vfid = cfg->vchan_dev.port.pcie.vfid; + qconf->dst_port.pcie.pfid = cfg->vchan_dev.port.pcie.pfid; + break; + case RTE_DMA_DIR_DEV_TO_MEM: + qconf->src_port.pcie.vfen = 1; + qconf->src_port.port_type = RTE_DMA_PORT_PCIE; + qconf->src_port.pcie.coreid = cfg->vchan_dev.port.pcie.coreid; + qconf->src_port.pcie.vfid = cfg->vchan_dev.port.pcie.vfid; + qconf->src_port.pcie.pfid = cfg->vchan_dev.port.pcie.pfid; + break; + case RTE_DMA_DIR_MEM_TO_MEM: + case RTE_DMA_DIR_DEV_TO_DEV: + break; + } + + return 0; +} + /* Configuration of device. */ static void -configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size) +configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg) { uint16_t vchan = 0; struct rte_dma_info info; struct rte_dma_conf dev_config = { .nb_vchans = 1 }; - struct rte_dma_vchan_conf qconf = { - .direction = RTE_DMA_DIR_MEM_TO_MEM, - .nb_desc = ring_size - }; + struct rte_dma_vchan_conf qconf = { 0 }; + + if (vchan_data_populate(dev_id, &qconf, cfg) != 0) + rte_exit(EXIT_FAILURE, "Error with vchan data populate.\n"); if (rte_dma_configure(dev_id, &dev_config) != 0) rte_exit(EXIT_FAILURE, "Error with dma configure.\n"); @@ -159,7 +196,6 @@ configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size) static int config_dmadevs(struct test_configure *cfg) { - uint32_t ring_size = cfg->ring_size.cur; struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map; uint32_t nb_workers = ldm->cnt; uint32_t i; @@ -176,7 +212,7 @@ config_dmadevs(struct test_configure *cfg) } ldm->dma_ids[i] = dev_id; - configure_dmadev_queue(dev_id, ring_size); + configure_dmadev_queue(dev_id, cfg); ++nb_dmadevs; } @@ -302,13 +338,23 @@ do_cpu_mem_copy(void *p) return 0; } +static void +dummy_free_ext_buf(void *addr, void *opaque) +{ + RTE_SET_USED(addr); + RTE_SET_USED(opaque); +} + static int setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, struct rte_mbuf ***dsts) { - unsigned int buf_size = cfg->buf_size.cur; + static struct rte_mbuf_ext_shared_info *ext_buf_info; + unsigned int cur_buf_size = cfg->buf_size.cur; + unsigned int buf_size = cur_buf_size + RTE_PKTMBUF_HEADROOM; unsigned int nr_sockets; uint32_t nr_buf = cfg->nr_buf; + uint32_t i; nr_sockets = rte_socket_count(); if (cfg->src_numa_node >= nr_sockets || @@ -321,7 +367,7 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, nr_buf, 0, 0, - buf_size + RTE_PKTMBUF_HEADROOM, + buf_size, cfg->src_numa_node); if (src_pool == NULL) { PRINT_ERR("Error with source mempool creation.\n"); @@ -332,7 +378,7 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, nr_buf, 0, 0, - buf_size + RTE_PKTMBUF_HEADROOM, + buf_size, cfg->dst_numa_node); if (dst_pool == NULL) { PRINT_ERR("Error with destination mempool creation.\n"); @@ -361,16 +407,49 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, return -1; } + if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM || + cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) { + ext_buf_info = rte_malloc(NULL, sizeof(struct rte_mbuf_ext_shared_info), 0); + if (ext_buf_info == NULL) { + printf("Error: ext_buf_info malloc failed.\n"); + return -1; + } + } + + if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM) { + ext_buf_info->free_cb = dummy_free_ext_buf; + ext_buf_info->fcb_opaque = NULL; + for (i = 0; i < nr_buf; i++) { + /* Using mbuf structure to hold remote iova address. */ + rte_pktmbuf_attach_extbuf((*srcs)[i], (void *)(cfg->vchan_dev.raddr + + (i * buf_size)), (rte_iova_t)(cfg->vchan_dev.raddr + + (i * buf_size)), 0, ext_buf_info); + rte_mbuf_ext_refcnt_update(ext_buf_info, 1); + } + } + + if (cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) { + ext_buf_info->free_cb = dummy_free_ext_buf; + ext_buf_info->fcb_opaque = NULL; + for (i = 0; i < nr_buf; i++) { + /* Using mbuf structure to hold remote iova address. */ + rte_pktmbuf_attach_extbuf((*dsts)[i], (void *)(cfg->vchan_dev.raddr + + (i * buf_size)), (rte_iova_t)(cfg->vchan_dev.raddr + + (i * buf_size)), 0, ext_buf_info); + rte_mbuf_ext_refcnt_update(ext_buf_info, 1); + } + } + return 0; } void mem_copy_benchmark(struct test_configure *cfg, bool is_dma) { - uint16_t i; + uint32_t i; uint32_t offset; unsigned int lcore_id = 0; - struct rte_mbuf **srcs = NULL, **dsts = NULL; + struct rte_mbuf **srcs = NULL, **dsts = NULL, **m = NULL; struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map; unsigned int buf_size = cfg->buf_size.cur; uint16_t kick_batch = cfg->kick_batch.cur; @@ -476,6 +555,20 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) avg_cycles_total / nb_workers, bandwidth_total, mops_total); out: + + if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM) + m = srcs; + else if (cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) + m = dsts; + + if (m) { + for (i = 0; i < nr_buf; i++) + rte_pktmbuf_detach_extbuf(m[i]); + + if (m[0]->shinfo && rte_mbuf_ext_refcnt_read(m[0]->shinfo) == 0) + rte_free(m[0]->shinfo); + } + /* free mbufs used in the test */ if (srcs != NULL) rte_pktmbuf_free_bulk(srcs, nr_buf); diff --git a/app/test-dma-perf/config.ini b/app/test-dma-perf/config.ini index 4d59234b2a..9c8221025e 100644 --- a/app/test-dma-perf/config.ini +++ b/app/test-dma-perf/config.ini @@ -38,6 +38,23 @@ ; "skip" To skip a test-case set skip to 1. +; Parameters to be configured for data transfers from "mem to dev" and "dev to mem": +; ================================================================================== +; "direction" denotes the direction of data transfer. It can take 3 values: +; mem2mem - mem to mem transfer +; mem2dev - mem to dev transfer +; dev2mem - dev to mem transfer +; If not specified the default value is mem2mem transfer. + +; "vchan_dev comma separated bus related config parameter for mem2dev and dev2mem dma transfer. Ex:" +; vchan_dev=raddr=0x400000,coreid=1,pfid=2,vfid=3 +; "raddr" remote iova address for mem2dev and dev2mem transfer. +; "coreid" denotes PCIe core index. +; "pfid" denotes PF-id to be used for data transfer +; "vfid" denotes VF-id of PF-id to be used for data transfer. + +; =========== End of "mem2dev" and "dev2mem" config parameters. ============== + [case1] type=DMA_MEM_COPY mem_size=10 @@ -52,6 +69,22 @@ lcore_dma=lcore10@0000:00:04.2, lcore11@0000:00:04.3 eal_args=--in-memory --file-prefix=test [case2] +skip=1 +type=DMA_MEM_COPY +direction=dev2mem +vchan_dev=raddr=0x200000000,coreid=1,pfid=2,vfid=3 +mem_size=10 +buf_size=64,4096,2,MUL +dma_ring_size=1024 +kick_batch=32 +src_numa_node=0 +dst_numa_node=0 +cache_flush=0 +test_seconds=2 +lcore_dma=lcore10@0000:00:04.2, lcore11@0000:00:04.3 +eal_args=--in-memory --file-prefix=test + +[case3] type=CPU_MEM_COPY mem_size=10 buf_size=64,8192,2,MUL diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c index e9e40e72e7..051f76a6f9 100644 --- a/app/test-dma-perf/main.c +++ b/app/test-dma-perf/main.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include #include "main.h" @@ -325,6 +327,28 @@ parse_entry(const char *value, struct test_configure_entry *entry) return args_nr; } +static int populate_pcie_config(const char *key, const char *value, void *test) +{ + struct test_configure *test_case = (struct test_configure *)test; + char *endptr; + int ret = 0; + + if (strcmp(key, "raddr") == 0) + test_case->vchan_dev.raddr = strtoull(value, &endptr, 16); + else if (strcmp(key, "coreid") == 0) + test_case->vchan_dev.port.pcie.coreid = (uint8_t)atoi(value); + else if (strcmp(key, "vfid") == 0) + test_case->vchan_dev.port.pcie.vfid = (uint16_t)atoi(value); + else if (strcmp(key, "pfid") == 0) + test_case->vchan_dev.port.pcie.pfid = (uint16_t)atoi(value); + else { + printf("Invalid config param: %s\n", key); + ret = -1; + } + + return ret; +} + static uint16_t load_configs(const char *path) { @@ -333,9 +357,12 @@ load_configs(const char *path) struct test_configure *test_case; char section_name[CFG_NAME_LEN]; const char *case_type; + const char *transfer_dir; const char *lcore_dma; const char *mem_size_str, *buf_size_str, *ring_size_str, *kick_batch_str; const char *skip; + struct rte_kvargs *kvlist; + const char *vchan_dev; int args_nr, nb_vp; bool is_dma; @@ -373,6 +400,22 @@ load_configs(const char *path) if (strcmp(case_type, DMA_MEM_COPY) == 0) { test_case->test_type = TEST_TYPE_DMA_MEM_COPY; test_case->test_type_str = DMA_MEM_COPY; + + transfer_dir = rte_cfgfile_get_entry(cfgfile, section_name, "direction"); + if (transfer_dir == NULL) { + printf("Transfer direction not configured." + " Defaulting it to MEM to MEM transfer.\n"); + test_case->transfer_dir = RTE_DMA_DIR_MEM_TO_MEM; + } else { + if (strcmp(transfer_dir, "mem2dev") == 0) + test_case->transfer_dir = RTE_DMA_DIR_MEM_TO_DEV; + else if (strcmp(transfer_dir, "dev2mem") == 0) + test_case->transfer_dir = RTE_DMA_DIR_DEV_TO_MEM; + else { + printf("Defaulting the test to MEM to MEM transfer\n"); + test_case->transfer_dir = RTE_DMA_DIR_MEM_TO_MEM; + } + } is_dma = true; } else if (strcmp(case_type, CPU_MEM_COPY) == 0) { test_case->test_type = TEST_TYPE_CPU_MEM_COPY; @@ -384,6 +427,40 @@ load_configs(const char *path) continue; } + if (test_case->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV || + test_case->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM) { + vchan_dev = rte_cfgfile_get_entry(cfgfile, section_name, "vchan_dev"); + if (vchan_dev == NULL) { + printf("Transfer direction mem2dev and dev2mem" + " vhcan_dev shall be configured.\n"); + test_case->is_valid = false; + continue; + } + + kvlist = rte_kvargs_parse(vchan_dev, NULL); + if (kvlist == NULL) { + printf("rte_kvargs_parse() error"); + test_case->is_valid = false; + continue; + } + + if (rte_kvargs_process(kvlist, NULL, populate_pcie_config, + (void *)test_case) < 0) { + printf("rte_kvargs_process() error\n"); + rte_kvargs_free(kvlist); + test_case->is_valid = false; + continue; + } + + if (!test_case->vchan_dev.raddr) { + printf("For mem2dev and dev2mem configure raddr\n"); + rte_kvargs_free(kvlist); + test_case->is_valid = false; + continue; + } + rte_kvargs_free(kvlist); + } + test_case->src_numa_node = (int)atoi(rte_cfgfile_get_entry(cfgfile, section_name, "src_numa_node")); test_case->dst_numa_node = (int)atoi(rte_cfgfile_get_entry(cfgfile, diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h index 32670151af..745c24b7fe 100644 --- a/app/test-dma-perf/main.h +++ b/app/test-dma-perf/main.h @@ -38,10 +38,16 @@ struct lcore_dma_map_t { uint16_t cnt; }; +struct test_vchan_dev_config { + struct rte_dma_port_param port; + uintptr_t raddr; +}; + struct test_configure { bool is_valid; bool is_skip; uint8_t test_type; + uint8_t transfer_dir; const char *test_type_str; uint16_t src_numa_node; uint16_t dst_numa_node; @@ -57,6 +63,7 @@ struct test_configure { uint16_t test_secs; const char *eal_args; uint8_t scenario_id; + struct test_vchan_dev_config vchan_dev; }; void mem_copy_benchmark(struct test_configure *cfg, bool is_dma); From patchwork Tue Feb 27 16:00:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Prakash Shukla X-Patchwork-Id: 137359 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5632943C0E; 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(unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 327B43F71E1; Tue, 27 Feb 2024 08:00:54 -0800 (PST) From: Amit Prakash Shukla To: Cheng Jiang , Chengwen Feng CC: , , , Kevin Laatz , Bruce Richardson , "Pavan Nikhilesh" , Gowrishankar Muthukrishnan Subject: [PATCH v9 3/4] app/dma-perf: validate copied memory Date: Tue, 27 Feb 2024 21:30:30 +0530 Message-ID: <20240227160031.3931694-4-amitprakashs@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240227160031.3931694-1-amitprakashs@marvell.com> References: <20240227160031.3931694-1-amitprakashs@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: dTGwiB6xHyk2cjd5skLQRK4MErPEtDMX X-Proofpoint-GUID: dTGwiB6xHyk2cjd5skLQRK4MErPEtDMX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-27_01,2024-02-27_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Gowrishankar Muthukrishnan Validate copied memory to ensure DMA copy did not fail. Signed-off-by: Gowrishankar Muthukrishnan Acked-by: Anoob Joseph Acked-by: Chengwen Feng --- app/test-dma-perf/benchmark.c | 21 ++++++++++++++++++++- app/test-dma-perf/main.c | 16 +++++++++++----- app/test-dma-perf/main.h | 2 +- 3 files changed, 32 insertions(+), 7 deletions(-) diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c index 4370d71134..0047e2f4b8 100644 --- a/app/test-dma-perf/benchmark.c +++ b/app/test-dma-perf/benchmark.c @@ -12,6 +12,7 @@ #include #include #include +#include #include "main.h" @@ -407,6 +408,11 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, return -1; } + for (i = 0; i < nr_buf; i++) { + memset(rte_pktmbuf_mtod((*srcs)[i], void *), rte_rand(), buf_size); + memset(rte_pktmbuf_mtod((*dsts)[i], void *), 0, buf_size); + } + if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM || cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) { ext_buf_info = rte_malloc(NULL, sizeof(struct rte_mbuf_ext_shared_info), 0); @@ -443,7 +449,7 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, return 0; } -void +int mem_copy_benchmark(struct test_configure *cfg, bool is_dma) { uint32_t i; @@ -461,6 +467,7 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) uint32_t avg_cycles_total; float mops, mops_total; float bandwidth, bandwidth_total; + int ret = 0; if (setup_memory_env(cfg, &srcs, &dsts) < 0) goto out; @@ -534,6 +541,16 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) rte_eal_mp_wait_lcore(); + for (i = 0; i < (nr_buf / nb_workers) * nb_workers; i++) { + if (memcmp(rte_pktmbuf_mtod(srcs[i], void *), + rte_pktmbuf_mtod(dsts[i], void *), + cfg->buf_size.cur) != 0) { + printf("Copy validation fails for buffer number %d\n", i); + ret = -1; + goto out; + } + } + mops_total = 0; bandwidth_total = 0; avg_cycles_total = 0; @@ -599,4 +616,6 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) rte_dma_stop(ldm->dma_ids[i]); } } + + return ret; } diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c index 051f76a6f9..df05bcd7df 100644 --- a/app/test-dma-perf/main.c +++ b/app/test-dma-perf/main.c @@ -101,20 +101,24 @@ open_output_csv(const char *rst_path_ptr) return 0; } -static void +static int run_test_case(struct test_configure *case_cfg) { + int ret = 0; + switch (case_cfg->test_type) { case TEST_TYPE_DMA_MEM_COPY: - mem_copy_benchmark(case_cfg, true); + ret = mem_copy_benchmark(case_cfg, true); break; case TEST_TYPE_CPU_MEM_COPY: - mem_copy_benchmark(case_cfg, false); + ret = mem_copy_benchmark(case_cfg, false); break; default: printf("Unknown test type. %s\n", case_cfg->test_type_str); break; } + + return ret; } static void @@ -159,8 +163,10 @@ run_test(uint32_t case_id, struct test_configure *case_cfg) case_cfg->scenario_id++; printf("\nRunning scenario %d\n", case_cfg->scenario_id); - run_test_case(case_cfg); - output_csv(false); + if (run_test_case(case_cfg) < 0) + printf("\nTest fails! skipping this scenario.\n"); + else + output_csv(false); if (var_entry->op == OP_ADD) var_entry->cur += var_entry->incr; diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h index 745c24b7fe..1123e7524a 100644 --- a/app/test-dma-perf/main.h +++ b/app/test-dma-perf/main.h @@ -66,6 +66,6 @@ struct test_configure { struct test_vchan_dev_config vchan_dev; }; -void mem_copy_benchmark(struct test_configure *cfg, bool is_dma); +int mem_copy_benchmark(struct test_configure *cfg, bool is_dma); #endif /* MAIN_H */ From patchwork Tue Feb 27 16:00:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Prakash Shukla X-Patchwork-Id: 137360 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 09D2043C0E; Tue, 27 Feb 2024 17:01:40 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C7C7B42E76; Tue, 27 Feb 2024 17:01:24 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id E736C40E28 for ; Tue, 27 Feb 2024 17:01:22 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41RFgnUt005646; Tue, 27 Feb 2024 08:01:22 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=d6d6sKcQrgIe+37ZnLyBqjwFQCQvQu/HgQiqd6KGMN0=; b=Jhc kJ6hbZl1Uac+YdnY+weo2+99Bv4rBOIm8NktYlixlhyw/lsfrfNAt+jGqMiOgjOV SpcP6JKdbInsThYajE7B9uGJk8728WJm6g/ZwchcrUa5LPilgXfpzB3ht7yH7Wqf 3PaaLEc5P50ohm8APnzBJGv2WzptSxA79I5fixySAGObF2BKaQNPSDlGplaY05D2 veneB6zFECI0pivckmywxq5XXpWlCXj0RqCuFv3AbOdSjjzf0O9dkNv9tW6bJU16 yZdjjfNrAzAcWZs2cwbf98kXWmMqgYRW/UIzO8SY/kKNs21/H++aqBM/am6Ydc5w 35O9bTNkGXs7b9X7Zyg== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3whjm682vc-5 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 Feb 2024 08:01:22 -0800 (PST) Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.1258.12; Tue, 27 Feb 2024 08:01:05 -0800 Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 27 Feb 2024 08:01:04 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Tue, 27 Feb 2024 08:01:04 -0800 Received: from cavium-OptiPlex-5090-BM14.. (unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 788203F71FA; Tue, 27 Feb 2024 08:01:01 -0800 (PST) From: Amit Prakash Shukla To: Cheng Jiang , Chengwen Feng CC: , , , Kevin Laatz , Bruce Richardson , "Pavan Nikhilesh" , Gowrishankar Muthukrishnan Subject: [PATCH v9 4/4] app/dma-perf: add SG copy support Date: Tue, 27 Feb 2024 21:30:31 +0530 Message-ID: <20240227160031.3931694-5-amitprakashs@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240227160031.3931694-1-amitprakashs@marvell.com> References: <20240227160031.3931694-1-amitprakashs@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: l1txK75ebxl_XtIP4A8QWiF1WYALJIqZ X-Proofpoint-GUID: l1txK75ebxl_XtIP4A8QWiF1WYALJIqZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-27_01,2024-02-27_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Gowrishankar Muthukrishnan Add SG copy support. Signed-off-by: Gowrishankar Muthukrishnan Acked-by: Anoob Joseph Acked-by: Chengwen Feng --- v9: - SG config variables renamed. app/test-dma-perf/benchmark.c | 278 +++++++++++++++++++++++++++++----- app/test-dma-perf/config.ini | 25 ++- app/test-dma-perf/main.c | 34 ++++- app/test-dma-perf/main.h | 5 +- 4 files changed, 300 insertions(+), 42 deletions(-) diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c index 0047e2f4b8..25ed6fa6d0 100644 --- a/app/test-dma-perf/benchmark.c +++ b/app/test-dma-perf/benchmark.c @@ -46,6 +46,10 @@ struct lcore_params { uint16_t test_secs; struct rte_mbuf **srcs; struct rte_mbuf **dsts; + struct rte_dma_sge *src_sges; + struct rte_dma_sge *dst_sges; + uint8_t src_ptrs; + uint8_t dst_ptrs; volatile struct worker_info worker_info; }; @@ -86,21 +90,31 @@ calc_result(uint32_t buf_size, uint32_t nr_buf, uint16_t nb_workers, uint16_t te } static void -output_result(uint8_t scenario_id, uint32_t lcore_id, char *dma_name, uint16_t ring_size, - uint16_t kick_batch, uint64_t ave_cycle, uint32_t buf_size, uint32_t nr_buf, - float memory, float bandwidth, float mops, bool is_dma) +output_result(struct test_configure *cfg, struct lcore_params *para, + uint16_t kick_batch, uint64_t ave_cycle, uint32_t buf_size, + uint32_t nr_buf, float memory, float bandwidth, float mops) { - if (is_dma) - printf("lcore %u, DMA %s, DMA Ring Size: %u, Kick Batch Size: %u.\n", - lcore_id, dma_name, ring_size, kick_batch); - else + uint16_t ring_size = cfg->ring_size.cur; + uint8_t scenario_id = cfg->scenario_id; + uint32_t lcore_id = para->lcore_id; + char *dma_name = para->dma_name; + + if (cfg->is_dma) { + printf("lcore %u, DMA %s, DMA Ring Size: %u, Kick Batch Size: %u", lcore_id, + dma_name, ring_size, kick_batch); + if (cfg->is_sg) + printf(" DMA src ptrs: %u, dst ptrs: %u", + para->src_ptrs, para->dst_ptrs); + printf(".\n"); + } else { printf("lcore %u\n", lcore_id); + } printf("Average Cycles/op: %" PRIu64 ", Buffer Size: %u B, Buffer Number: %u, Memory: %.2lf MB, Frequency: %.3lf Ghz.\n", ave_cycle, buf_size, nr_buf, memory, rte_get_timer_hz()/1000000000.0); printf("Average Bandwidth: %.3lf Gbps, MOps: %.3lf\n", bandwidth, mops); - if (is_dma) + if (cfg->is_dma) snprintf(output_str[lcore_id], MAX_OUTPUT_STR_LEN, CSV_LINE_DMA_FMT, scenario_id, lcore_id, dma_name, ring_size, kick_batch, buf_size, nr_buf, memory, ave_cycle, bandwidth, mops); @@ -167,7 +181,7 @@ vchan_data_populate(uint32_t dev_id, struct rte_dma_vchan_conf *qconf, /* Configuration of device. */ static void -configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg) +configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg, uint8_t ptrs_max) { uint16_t vchan = 0; struct rte_dma_info info; @@ -190,6 +204,10 @@ configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg) rte_exit(EXIT_FAILURE, "Error, no configured queues reported on device id. %u\n", dev_id); + if (info.max_sges < ptrs_max) + rte_exit(EXIT_FAILURE, "Error, DMA ptrs more than supported by device id %u.\n", + dev_id); + if (rte_dma_start(dev_id) != 0) rte_exit(EXIT_FAILURE, "Error with dma start.\n"); } @@ -202,8 +220,12 @@ config_dmadevs(struct test_configure *cfg) uint32_t i; int dev_id; uint16_t nb_dmadevs = 0; + uint8_t ptrs_max = 0; char *dma_name; + if (cfg->is_sg) + ptrs_max = RTE_MAX(cfg->src_ptrs, cfg->dst_ptrs); + for (i = 0; i < ldm->cnt; i++) { dma_name = ldm->dma_names[i]; dev_id = rte_dma_get_dev_id_by_name(dma_name); @@ -213,7 +235,7 @@ config_dmadevs(struct test_configure *cfg) } ldm->dma_ids[i] = dev_id; - configure_dmadev_queue(dev_id, cfg); + configure_dmadev_queue(dev_id, cfg, ptrs_max); ++nb_dmadevs; } @@ -253,7 +275,7 @@ do_dma_submit_and_poll(uint16_t dev_id, uint64_t *async_cnt, } static inline int -do_dma_mem_copy(void *p) +do_dma_plain_mem_copy(void *p) { struct lcore_params *para = (struct lcore_params *)p; volatile struct worker_info *worker_info = &(para->worker_info); @@ -306,6 +328,65 @@ do_dma_mem_copy(void *p) return 0; } +static inline int +do_dma_sg_mem_copy(void *p) +{ + struct lcore_params *para = (struct lcore_params *)p; + volatile struct worker_info *worker_info = &(para->worker_info); + struct rte_dma_sge *src_sges = para->src_sges; + struct rte_dma_sge *dst_sges = para->dst_sges; + const uint16_t kick_batch = para->kick_batch; + const uint8_t src_ptrs = para->src_ptrs; + const uint8_t dst_ptrs = para->dst_ptrs; + const uint16_t dev_id = para->dev_id; + uint32_t nr_buf = para->nr_buf; + uint64_t async_cnt = 0; + uint32_t poll_cnt = 0; + uint16_t nr_cpl; + uint32_t i, j; + int ret; + + nr_buf /= RTE_MAX(src_ptrs, dst_ptrs); + worker_info->stop_flag = false; + worker_info->ready_flag = true; + + while (!worker_info->start_flag) + ; + + while (1) { + j = 0; + for (i = 0; i < nr_buf; i++) { +dma_copy: + ret = rte_dma_copy_sg(dev_id, 0, + &src_sges[i * src_ptrs], &dst_sges[j * dst_ptrs], + src_ptrs, dst_ptrs, 0); + if (unlikely(ret < 0)) { + if (ret == -ENOSPC) { + do_dma_submit_and_poll(dev_id, &async_cnt, worker_info); + goto dma_copy; + } else + error_exit(dev_id); + } + async_cnt++; + j++; + + if ((async_cnt % kick_batch) == 0) + do_dma_submit_and_poll(dev_id, &async_cnt, worker_info); + } + + if (worker_info->stop_flag) + break; + } + + rte_dma_submit(dev_id, 0); + while ((async_cnt > 0) && (poll_cnt++ < POLL_MAX)) { + nr_cpl = rte_dma_completed(dev_id, 0, MAX_DMA_CPL_NB, NULL, NULL); + async_cnt -= nr_cpl; + } + + return 0; +} + static inline int do_cpu_mem_copy(void *p) { @@ -347,8 +428,9 @@ dummy_free_ext_buf(void *addr, void *opaque) } static int -setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, - struct rte_mbuf ***dsts) +setup_memory_env(struct test_configure *cfg, + struct rte_mbuf ***srcs, struct rte_mbuf ***dsts, + struct rte_dma_sge **src_sges, struct rte_dma_sge **dst_sges) { static struct rte_mbuf_ext_shared_info *ext_buf_info; unsigned int cur_buf_size = cfg->buf_size.cur; @@ -409,8 +491,8 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, } for (i = 0; i < nr_buf; i++) { - memset(rte_pktmbuf_mtod((*srcs)[i], void *), rte_rand(), buf_size); - memset(rte_pktmbuf_mtod((*dsts)[i], void *), 0, buf_size); + memset(rte_pktmbuf_mtod((*srcs)[i], void *), rte_rand(), cur_buf_size); + memset(rte_pktmbuf_mtod((*dsts)[i], void *), 0, cur_buf_size); } if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM || @@ -446,20 +528,56 @@ setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs, } } + if (cfg->is_sg) { + uint8_t src_ptrs = cfg->src_ptrs; + uint8_t dst_ptrs = cfg->dst_ptrs; + uint32_t sglen_src, sglen_dst; + + *src_sges = rte_zmalloc(NULL, nr_buf * sizeof(struct rte_dma_sge), + RTE_CACHE_LINE_SIZE); + if (*src_sges == NULL) { + printf("Error: src_sges array malloc failed.\n"); + return -1; + } + + *dst_sges = rte_zmalloc(NULL, nr_buf * sizeof(struct rte_dma_sge), + RTE_CACHE_LINE_SIZE); + if (*dst_sges == NULL) { + printf("Error: dst_sges array malloc failed.\n"); + return -1; + } + + sglen_src = cur_buf_size / src_ptrs; + sglen_dst = cur_buf_size / dst_ptrs; + + for (i = 0; i < nr_buf; i++) { + (*src_sges)[i].addr = rte_pktmbuf_iova((*srcs)[i]); + (*src_sges)[i].length = sglen_src; + if (!((i+1) % src_ptrs)) + (*src_sges)[i].length += (cur_buf_size % src_ptrs); + + (*dst_sges)[i].addr = rte_pktmbuf_iova((*dsts)[i]); + (*dst_sges)[i].length = sglen_dst; + if (!((i+1) % dst_ptrs)) + (*dst_sges)[i].length += (cur_buf_size % dst_ptrs); + } + } + return 0; } int -mem_copy_benchmark(struct test_configure *cfg, bool is_dma) +mem_copy_benchmark(struct test_configure *cfg) { - uint32_t i; + uint32_t i, j; uint32_t offset; unsigned int lcore_id = 0; struct rte_mbuf **srcs = NULL, **dsts = NULL, **m = NULL; + struct rte_dma_sge *src_sges = NULL, *dst_sges = NULL; struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map; + const uint32_t mcore_id = rte_get_main_lcore(); unsigned int buf_size = cfg->buf_size.cur; uint16_t kick_batch = cfg->kick_batch.cur; - uint32_t nr_buf = cfg->nr_buf = (cfg->mem_size.cur * 1024 * 1024) / (cfg->buf_size.cur * 2); uint16_t nb_workers = ldm->cnt; uint16_t test_secs = cfg->test_secs; float memory = 0; @@ -467,12 +585,32 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) uint32_t avg_cycles_total; float mops, mops_total; float bandwidth, bandwidth_total; + uint32_t nr_sgsrc = 0, nr_sgdst = 0; + uint32_t nr_buf; int ret = 0; - if (setup_memory_env(cfg, &srcs, &dsts) < 0) + /* Align number of buffers according to workers count */ + nr_buf = (cfg->mem_size.cur * 1024 * 1024) / (cfg->buf_size.cur * 2); + nr_buf -= (nr_buf % nb_workers); + if (cfg->is_sg) { + nr_buf /= nb_workers; + nr_buf -= nr_buf % (cfg->src_ptrs * cfg->dst_ptrs); + nr_buf *= nb_workers; + + if (cfg->dst_ptrs > cfg->src_ptrs) { + nr_sgsrc = (nr_buf / cfg->dst_ptrs * cfg->src_ptrs); + nr_sgdst = nr_buf; + } else { + nr_sgsrc = nr_buf; + nr_sgdst = (nr_buf / cfg->src_ptrs * cfg->dst_ptrs); + } + } + + cfg->nr_buf = nr_buf; + if (setup_memory_env(cfg, &srcs, &dsts, &src_sges, &dst_sges) < 0) goto out; - if (is_dma) + if (cfg->is_dma) if (config_dmadevs(cfg) < 0) goto out; @@ -486,13 +624,23 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) for (i = 0; i < nb_workers; i++) { lcore_id = ldm->lcores[i]; + if (lcore_id == mcore_id) { + printf("lcore parameters can not use main core id %d\n", mcore_id); + goto out; + } + + if (rte_eal_lcore_role(lcore_id) == ROLE_OFF) { + printf("lcore parameters can not use offline core id %d\n", lcore_id); + goto out; + } + offset = nr_buf / nb_workers * i; lcores[i] = rte_malloc(NULL, sizeof(struct lcore_params), 0); if (lcores[i] == NULL) { printf("lcore parameters malloc failure for lcore %d\n", lcore_id); break; } - if (is_dma) { + if (cfg->is_dma) { lcores[i]->dma_name = ldm->dma_names[i]; lcores[i]->dev_id = ldm->dma_ids[i]; lcores[i]->kick_batch = kick_batch; @@ -506,10 +654,23 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) lcores[i]->scenario_id = cfg->scenario_id; lcores[i]->lcore_id = lcore_id; - if (is_dma) - rte_eal_remote_launch(do_dma_mem_copy, (void *)(lcores[i]), lcore_id); - else + if (cfg->is_sg) { + lcores[i]->src_ptrs = cfg->src_ptrs; + lcores[i]->dst_ptrs = cfg->dst_ptrs; + lcores[i]->src_sges = src_sges + (nr_sgsrc / nb_workers * i); + lcores[i]->dst_sges = dst_sges + (nr_sgdst / nb_workers * i); + } + + if (cfg->is_dma) { + if (!cfg->is_sg) + rte_eal_remote_launch(do_dma_plain_mem_copy, (void *)(lcores[i]), + lcore_id); + else + rte_eal_remote_launch(do_dma_sg_mem_copy, (void *)(lcores[i]), + lcore_id); + } else { rte_eal_remote_launch(do_cpu_mem_copy, (void *)(lcores[i]), lcore_id); + } } while (1) { @@ -541,13 +702,53 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) rte_eal_mp_wait_lcore(); - for (i = 0; i < (nr_buf / nb_workers) * nb_workers; i++) { - if (memcmp(rte_pktmbuf_mtod(srcs[i], void *), - rte_pktmbuf_mtod(dsts[i], void *), - cfg->buf_size.cur) != 0) { - printf("Copy validation fails for buffer number %d\n", i); - ret = -1; - goto out; + if (!cfg->is_sg && cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_MEM) { + for (i = 0; i < (nr_buf / nb_workers) * nb_workers; i++) { + if (memcmp(rte_pktmbuf_mtod(srcs[i], void *), + rte_pktmbuf_mtod(dsts[i], void *), + cfg->buf_size.cur) != 0) { + printf("Copy validation fails for buffer number %d\n", i); + ret = -1; + goto out; + } + } + } else if (cfg->is_sg && cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_MEM) { + size_t src_remsz = buf_size % cfg->src_ptrs; + size_t dst_remsz = buf_size % cfg->dst_ptrs; + size_t src_sz = buf_size / cfg->src_ptrs; + size_t dst_sz = buf_size / cfg->dst_ptrs; + uint8_t src[buf_size], dst[buf_size]; + uint8_t *sbuf, *dbuf, *ptr; + + for (i = 0; i < (nr_buf / RTE_MAX(cfg->src_ptrs, cfg->dst_ptrs)); i++) { + sbuf = src; + dbuf = dst; + ptr = NULL; + + for (j = 0; j < cfg->src_ptrs; j++) { + ptr = rte_pktmbuf_mtod(srcs[i * cfg->src_ptrs + j], uint8_t *); + memcpy(sbuf, ptr, src_sz); + sbuf += src_sz; + } + + if (src_remsz) + memcpy(sbuf, ptr + src_sz, src_remsz); + + for (j = 0; j < cfg->dst_ptrs; j++) { + ptr = rte_pktmbuf_mtod(dsts[i * cfg->dst_ptrs + j], uint8_t *); + memcpy(dbuf, ptr, dst_sz); + dbuf += dst_sz; + } + + if (dst_remsz) + memcpy(dbuf, ptr + dst_sz, dst_remsz); + + if (memcmp(src, dst, buf_size) != 0) { + printf("SG Copy validation fails for buffer number %d\n", + i * cfg->src_ptrs); + ret = -1; + goto out; + } } } @@ -558,10 +759,8 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) calc_result(buf_size, nr_buf, nb_workers, test_secs, lcores[i]->worker_info.test_cpl, &memory, &avg_cycles, &bandwidth, &mops); - output_result(cfg->scenario_id, lcores[i]->lcore_id, - lcores[i]->dma_name, cfg->ring_size.cur, kick_batch, - avg_cycles, buf_size, nr_buf / nb_workers, memory, - bandwidth, mops, is_dma); + output_result(cfg, lcores[i], kick_batch, avg_cycles, buf_size, + nr_buf / nb_workers, memory, bandwidth, mops); mops_total += mops; bandwidth_total += bandwidth; avg_cycles_total += avg_cycles; @@ -604,13 +803,20 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma) rte_mempool_free(dst_pool); dst_pool = NULL; + /* free sges for mbufs */ + rte_free(src_sges); + src_sges = NULL; + + rte_free(dst_sges); + dst_sges = NULL; + /* free the worker parameters */ for (i = 0; i < nb_workers; i++) { rte_free(lcores[i]); lcores[i] = NULL; } - if (is_dma) { + if (cfg->is_dma) { for (i = 0; i < nb_workers; i++) { printf("Stopping dmadev %d\n", ldm->dma_ids[i]); rte_dma_stop(ldm->dma_ids[i]); diff --git a/app/test-dma-perf/config.ini b/app/test-dma-perf/config.ini index 9c8221025e..28f6c9d1db 100644 --- a/app/test-dma-perf/config.ini +++ b/app/test-dma-perf/config.ini @@ -38,6 +38,14 @@ ; "skip" To skip a test-case set skip to 1. +; Parameters to be configured for SG copy: +; ======================================== +; "dma_src_sge" denotes number of source segments. +; "dma_dst_sge" denotes number of destination segments. +; +; For SG copy, both the parameters need to be configured and they are valid only +; when type is DMA_MEM_COPY. +; ; Parameters to be configured for data transfers from "mem to dev" and "dev to mem": ; ================================================================================== ; "direction" denotes the direction of data transfer. It can take 3 values: @@ -69,6 +77,21 @@ lcore_dma=lcore10@0000:00:04.2, lcore11@0000:00:04.3 eal_args=--in-memory --file-prefix=test [case2] +type=DMA_MEM_COPY +mem_size=10 +buf_size=64,8192,2,MUL +dma_ring_size=1024 +dma_src_sge=4 +dma_dst_sge=1 +kick_batch=32 +src_numa_node=0 +dst_numa_node=0 +cache_flush=0 +test_seconds=2 +lcore_dma=lcore10@0000:00:04.2, lcore11@0000:00:04.3 +eal_args=--in-memory --file-prefix=test + +[case3] skip=1 type=DMA_MEM_COPY direction=dev2mem @@ -84,7 +107,7 @@ test_seconds=2 lcore_dma=lcore10@0000:00:04.2, lcore11@0000:00:04.3 eal_args=--in-memory --file-prefix=test -[case3] +[case4] type=CPU_MEM_COPY mem_size=10 buf_size=64,8192,2,MUL diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c index df05bcd7df..a27e4c9429 100644 --- a/app/test-dma-perf/main.c +++ b/app/test-dma-perf/main.c @@ -108,10 +108,8 @@ run_test_case(struct test_configure *case_cfg) switch (case_cfg->test_type) { case TEST_TYPE_DMA_MEM_COPY: - ret = mem_copy_benchmark(case_cfg, true); - break; case TEST_TYPE_CPU_MEM_COPY: - ret = mem_copy_benchmark(case_cfg, false); + ret = mem_copy_benchmark(case_cfg); break; default: printf("Unknown test type. %s\n", case_cfg->test_type_str); @@ -365,7 +363,8 @@ load_configs(const char *path) const char *case_type; const char *transfer_dir; const char *lcore_dma; - const char *mem_size_str, *buf_size_str, *ring_size_str, *kick_batch_str; + const char *mem_size_str, *buf_size_str, *ring_size_str, *kick_batch_str, + *src_ptrs_str, *dst_ptrs_str; const char *skip; struct rte_kvargs *kvlist; const char *vchan_dev; @@ -467,6 +466,7 @@ load_configs(const char *path) rte_kvargs_free(kvlist); } + test_case->is_dma = is_dma; test_case->src_numa_node = (int)atoi(rte_cfgfile_get_entry(cfgfile, section_name, "src_numa_node")); test_case->dst_numa_node = (int)atoi(rte_cfgfile_get_entry(cfgfile, @@ -501,6 +501,32 @@ load_configs(const char *path) } else if (args_nr == 4) nb_vp++; + src_ptrs_str = rte_cfgfile_get_entry(cfgfile, section_name, + "dma_src_sge"); + if (src_ptrs_str != NULL) { + test_case->src_ptrs = (int)atoi(rte_cfgfile_get_entry(cfgfile, + section_name, "dma_src_sge")); + } + + dst_ptrs_str = rte_cfgfile_get_entry(cfgfile, section_name, + "dma_dst_sge"); + if (dst_ptrs_str != NULL) { + test_case->dst_ptrs = (int)atoi(rte_cfgfile_get_entry(cfgfile, + section_name, "dma_dst_sge")); + } + + if ((src_ptrs_str != NULL && dst_ptrs_str == NULL) || + (src_ptrs_str == NULL && dst_ptrs_str != NULL)) { + printf("parse dma_src_sge, dma_dst_sge error in case %d.\n", + i + 1); + test_case->is_valid = false; + continue; + } else if (src_ptrs_str != NULL && dst_ptrs_str != NULL) { + test_case->is_sg = true; + } else { + test_case->is_sg = false; + } + kick_batch_str = rte_cfgfile_get_entry(cfgfile, section_name, "kick_batch"); args_nr = parse_entry(kick_batch_str, &test_case->kick_batch); if (args_nr < 0) { diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h index 1123e7524a..baf149b72b 100644 --- a/app/test-dma-perf/main.h +++ b/app/test-dma-perf/main.h @@ -53,11 +53,14 @@ struct test_configure { uint16_t dst_numa_node; uint16_t opcode; bool is_dma; + bool is_sg; struct lcore_dma_map_t lcore_dma_map; struct test_configure_entry mem_size; struct test_configure_entry buf_size; struct test_configure_entry ring_size; struct test_configure_entry kick_batch; + uint8_t src_ptrs; + uint8_t dst_ptrs; uint8_t cache_flush; uint32_t nr_buf; uint16_t test_secs; @@ -66,6 +69,6 @@ struct test_configure { struct test_vchan_dev_config vchan_dev; }; -int mem_copy_benchmark(struct test_configure *cfg, bool is_dma); +int mem_copy_benchmark(struct test_configure *cfg); #endif /* MAIN_H */