From patchwork Mon Oct 28 02:31:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147447 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3BE5D45BE5; Mon, 28 Oct 2024 03:09:34 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1A945406B4; Mon, 28 Oct 2024 03:09:14 +0100 (CET) Received: from smtpbgsg2.qq.com (smtpbgsg2.qq.com [54.254.200.128]) by mails.dpdk.org (Postfix) with ESMTP id 51BD740656; Mon, 28 Oct 2024 03:09:00 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081307tdzshwu X-QQ-Originating-IP: Xmex+swh0K4XPlFrJhgh7O0hTMSWMhuw6Z4v4X47+Rs= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:27 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 3655854909871179664 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH v2 01/13] net/txgbe: fix swfw mbox failure Date: Mon, 28 Oct 2024 10:31:35 +0800 Message-Id: <20241028023147.60157-2-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: Mmv2azxffly/qf6rnrs6vhXQjrjcg5brsVD7KMucyrEG3VezTZoPNxOP fYt4sIGRQT604Y1I+lJDmMT6sN584GalVlq2T7t4Cv0hopCglX1+Q9Qk5IJksYrk8b7CFKC TbUqCThkPNm1bLg/zTkhqUvcLmrZlLWU2c4WcHokY2f3T4+DTQuW0hFHqN0rJ/WFjY9eq3c EyJnrQmXYMotZ08//zDsjzDkTqAO5hZFVxDu3gEPNJpQDjp2iPQnqdDMD/AuAz0mGceOhIJ cU4ULldm6AZeWZirv1vWii/4sXn87HSN0OQmDFPs0KKPtnw3bPCjaFT91z9VR3zglmuEicI DoS4p0tcqqE9btT5uK73JrLshN5YhycAN3N9LWagE9PcAtBa8ZOn1x9IjxpNmm3/UXvtPWV 0OEAtt0r2aAxzJUNTcq4/H2KJvmFjpRky2OEIeG7C+87lFZo7d5FzFZMrTGFdxaKTFlP0PW QgzurCuASmTTF0+srpCjUPkGYobCnwOyhBMhH1UXdGY1gDZh5b26qLLAxptA9kTuRoTPgwQ kxmdDAVri4OUMWLNibwPTSpaf9k0yqjmlEteJyNdr/DhbKfUqK1epJTVUNgF/8bGSaa8FXg bQhwGHctZAe+4RrhEXmWVBcpGBOaKiOzK1rQr395ElizS28xj66IRPlQaPfXyFDMQr6qWFv ZXT+xGPLWVkvQGo7bjjk6Fd7xj66+odIbNRG5P7Sqib4jqZN9I3XDbPwPNrlVs1pgviD0VN VnSG4Zoi1XZ539lZ54JEZ5vpNQZoSEmBWc69dcWkwsM8XptOVQ31mEfeuLDsxOdFex6uOJC eIwbqhVUJw6GgPIWyfDn+uPo0AXyit6zo/S6ol5UVdEoppCFu57RfyFW/TesUoJRJg/wKlj cs5DYbk3NOAtyW0pVuOrsX4d7o55DG8F4570hKLrlS/6J6LDMzCOLlQGoxEmxrZV7NgCA3X h/uc= X-QQ-XMRINFO: Nq+8W0+stu50PRdwbJxPCL0= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org There is a unknown bug that the register TXGBE_MNGMBX cannot be written in the loop, when DPDK is built with GCC high version. Access any register before write TXGBE_MNGMBX can fix it. Bugzilla ID: 1531 Fixes: 35c90ecccfd4 ("net/txgbe: add EEPROM functions") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_mng.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/txgbe/base/txgbe_mng.c b/drivers/net/txgbe/base/txgbe_mng.c index 20db982891..7dc8f21183 100644 --- a/drivers/net/txgbe/base/txgbe_mng.c +++ b/drivers/net/txgbe/base/txgbe_mng.c @@ -58,6 +58,7 @@ txgbe_hic_unlocked(struct txgbe_hw *hw, u32 *buffer, u32 length, u32 timeout) dword_len = length >> 2; + txgbe_flush(hw); /* The device driver writes the relevant command block * into the ram area. */ From patchwork Mon Oct 28 02:31:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147440 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 39FA145BE5; Mon, 28 Oct 2024 03:08:48 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 06ADE40662; Mon, 28 Oct 2024 03:08:47 +0100 (CET) Received: from smtpbguseast2.qq.com (smtpbguseast2.qq.com [54.204.34.130]) by mails.dpdk.org (Postfix) with ESMTP id B3F3240656; Mon, 28 Oct 2024 03:08:43 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081309t4zsaxi X-QQ-Originating-IP: XKJTTxmvHMGAWHy0vjmRVcuS8wKQ45i43w7/981fgEw= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:29 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 11424326221770304914 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH v2 02/13] net/txgbe: fix VF-PF mbox interrupt Date: Mon, 28 Oct 2024 10:31:36 +0800 Message-Id: <20241028023147.60157-3-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: M+0YV038q5N181kB1R3fgKfP3RL353q4ogBuq6+LAthrsMYBCULUel/W Lpz5Z8DOlhIzNu1uFni1YhxM+xz033GJbDfQIJcc2A5HoEFv4oW+qi9Eu3ItCL/hEUj+6yq EMNUPRijP0tjeVm7SP3VPZtXMN3ZAcQ28KFFe4gOG5avJOV7JM/f2HxOFnh9Xc9HpTL6u4l t3ADfTQqq6c07WqaQ/7UWCloIIplZ9it3Wt54FxqVK9fsfW4Z5Nn6/WUXWdCGWJvuSyHjeA 7VTqqUvzhjyXh7h7KAouCj94ph48Rh/m3QZQOt1xlSc6xC78X02V0XXb0oJhS8Afk0nU7v4 7NRcOrThk+4oeZltasC2NpC4xxAedLHAInB7hMtLr2GiXxoMyuL1Ol0t93xxAmxtCjCE4in NklmVOAGdLpnE3z1gg74r7AQPF9egPrSrwxX7JfJFU+50RXP1vj/lTLaKQUQUbq8qXWcbDN YYXTyXEcHdMiri7QXxrmb5UcGV9H0suQfeCDjjBHZw9MKtLQnUEhJmcG1kCsRjP216hyCDe qzroj16mVF3XjfKEKIlcfVDaFpq70YNegLdnMD0mDIeimFgjgGx8yfqKiJwoZcwsxKHnpDi Ks7AZ+q+EbHs/7l7AA/xxhyhWX3Zhq2p6Vf15/cN2lvLDOba8ybZKtolGk7hfC2tyz/yzaF nZkSLJGGeDeJXvwAIcnOxd5QhpTzqeXGyiey+uRxkDg5pWYXLPyPS6N0X/+CaFgC9yF2g6j m9PeR9m7MeDCzbvsh9gIjLFgcBqneooQ0dzxCJ59dHutlfduRGYFmN8w8v+a43uyqf424gQ S/a4eqkq+5vkWMcWdyu0YY2Fp0H3zWxB4Ryd2Al6pPbYAyYC7j/MhM4DwTCPtU/XrF+0BYz 1QTrNZ1dMc+JwpjRFsitvCukN50trVhznNwZaTKoavQgTBQCV21OWKvTZy2ZZFr9QVQytEG nkw2dp1p49pXvKjN8pWTClXdU X-QQ-XMRINFO: MSVp+SPm3vtS1Vd6Y4Mggwc= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org There was a incorrect bit to define TXGBE_ICRMISC_VFMBX that prevents the interrupt from being handled correctly. Fixes: a6712cd029a4 ("net/txgbe: add PF module init and uninit for SRIOV") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h index 4ea4a2e3d8..b46d65331e 100644 --- a/drivers/net/txgbe/base/txgbe_regs.h +++ b/drivers/net/txgbe/base/txgbe_regs.h @@ -1197,7 +1197,7 @@ enum txgbe_5tuple_protocol { #define TXGBE_ICRMISC_ANDONE MS(19, 0x1) /* link auto-nego done */ #define TXGBE_ICRMISC_ERRIG MS(20, 0x1) /* integrity error */ #define TXGBE_ICRMISC_SPI MS(21, 0x1) /* SPI interface */ -#define TXGBE_ICRMISC_VFMBX MS(22, 0x1) /* VF-PF message box */ +#define TXGBE_ICRMISC_VFMBX MS(23, 0x1) /* VF-PF message box */ #define TXGBE_ICRMISC_GPIO MS(26, 0x1) /* GPIO interrupt */ #define TXGBE_ICRMISC_ERRPCI MS(27, 0x1) /* pcie request error */ #define TXGBE_ICRMISC_HEAT MS(28, 0x1) /* overheat detection */ From patchwork Mon Oct 28 02:31:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147441 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0854C45BE5; Mon, 28 Oct 2024 03:08:54 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 747D14065E; Mon, 28 Oct 2024 03:08:52 +0100 (CET) Received: from smtpbgeu2.qq.com (smtpbgeu2.qq.com [18.194.254.142]) by mails.dpdk.org (Postfix) with ESMTP id 068FE40652; Mon, 28 Oct 2024 03:08:45 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081312t7zlijl X-QQ-Originating-IP: 9nMgD5BClozsQ+gXOWwWkPYfMM3IFD6LGzofyQO6/VY= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:31 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 7714603451660356390 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH v2 03/13] net/txgbe: remove outer UDP checksum capability Date: Mon, 28 Oct 2024 10:31:37 +0800 Message-Id: <20241028023147.60157-4-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: MPEorwW6cFo9cLk8rNCuVo+FfZPMz+kDa4dAqwKxWSQ3miBPt8G4Pb4f SG/hQIazZIkiHS9gl4XrSOLhal8zLwjPZJienuM9ZpLTxufi5358HaQuwV+WvjHFNlmKLqB NQvuRxRkjk7LZDgorYfbrAhtkD90OmJWSqBzr4fwjMSUef1hbKfh/GKOppuVg5V2tnMq7TU KbtQGnOEEi4FjQ3IBu1B5BoI9q1HwSzK+DKkAvxCzqCOf3FHStWJ6H0TzQ/fn9ibZU/hehA RG6dn/3S22Z9N/o+r6N9qPvjyqVXbtFDzTZqitpmL7Zks0gxPiDngoi3uCL1OCq3m8RjNjU aTwILqsvSjuh3wIZbiEELrF++k9D1/VFAZWrA6X9NMWS33aJ+IWmvuunbXBNUzw0RfrSumE VVSeII7tgPgotVACgQRWgHV1cu7tS9AtHoBIOAaF8Y9ZLtckEHq0WDPgIvE+Zr20XAmNMtl /Mh2rw7MgSLaAlltfKLh2xXCTjSlycmVUIHkou0aJh1wR+RhgSum/PteoUs3J4NplIGoNUE bCSj3QSD7YXfGtehtKC5wvq1YDJjjtJvw9+vLhIc88ByUR651gFscGlP6ThUykaXnPNWGud Vc8k1TbXrMM6ZBdG0IUKKieqhIjk0ILnhhfmjc5kKGHtRjnosxP8gOqPDV4K8L50SD89CKw SxEcrIxM4Nc9QlyS+MCqCJ57ufUtOYNz0C7K3/QVRfc6v5GusXFxDrSZH0nrmYo41p79Bek c6WN7oaWBd3G2jdSV+25kq1gOd6BTnfw8e6xrwKxfb8ni/MiBhhekqrcD369SkE/LXlqun7 gYYt4UDzpobxH8qnCkGSA4007wljJD+nK4STB/hZZk9OklWpqatNhhwWT5jUXsYPoAomCBQ GlfCaaPslvjNKSdYWTOWkXysvK5pjRhlPI50tRSFUnf6YcfsXbUpuQZ8U/A2OYaMBaDYXTg DvReWQXr0RSaq42hz4SvKKKwJ0k65IFHrxEU9SJChY0oVPA== X-QQ-XMRINFO: Mp0Kj//9VHAxr69bL5MkOOs= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The hardware does not support outer UDP checksum for tunnel packets. It's wrong to claim this Tx offload capability, so fix it. Bugzilla ID: 1529 Fixes: b950203be7f1 ("net/txgbe: support VXLAN-GPE") Fixes: 295968d17407 ("ethdev: add namespace") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_rxtx.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c index 5bc0f8772f..c12726553c 100644 --- a/drivers/net/txgbe/txgbe_rxtx.c +++ b/drivers/net/txgbe/txgbe_rxtx.c @@ -2284,8 +2284,7 @@ txgbe_get_tx_port_offloads(struct rte_eth_dev *dev) tx_offload_capa |= RTE_ETH_TX_OFFLOAD_MACSEC_INSERT; - tx_offload_capa |= RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM | - RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM; + tx_offload_capa |= RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM; #ifdef RTE_LIB_SECURITY if (dev->security_ctx) From patchwork Mon Oct 28 02:31:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147439 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 92FB245BE5; Mon, 28 Oct 2024 03:08:42 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 827D240649; Mon, 28 Oct 2024 03:08:42 +0100 (CET) Received: from smtpbgbr1.qq.com (smtpbgbr1.qq.com [54.207.19.206]) by mails.dpdk.org (Postfix) with ESMTP id E0C61402A3; Mon, 28 Oct 2024 03:08:38 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081314tc3no6h X-QQ-Originating-IP: SqSl7TrWlUR7qaAd/MJDVWy6qqB484m2jc5MN8Oxlng= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:33 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 15610977390140531478 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH v2 04/13] net/txgbe: fix driver load bit to inform firmware Date: Mon, 28 Oct 2024 10:31:38 +0800 Message-Id: <20241028023147.60157-5-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: NhvpCzAv3WKAt/M36PCC7xiP65Dj8Z3F7swSwqQ53ugqWHELakVgTi2W VSgSNhH2Tt9jC2KnP8rG1FyfDrjmj+NxmMPgnmZ6T19CoytuNI3IY5d+9kRNP7d7+vntjO+ Nqw+ZWo21iihkxFIj1BXc5In8RAmbkN0jYdTDYBzTQZZSCKNDfx1pwDYDcRh+kLmMgSDaLc Ur+SIlF6y/9KKG35owXGFXt0bmUOul+DD4DWN+jWC1+He/McJmvV0kFvL5FBOOoKPVDLAB4 Bi1wwxXAAWBiYeUPzsjXIr9wHH7Qkz1NyqzTApt9ZZo2M+XRlBd3ywtWSdI1j5PJ1j2v2T4 0Y3QIZZpndhftAm7U2Ukb0R4aleXXD6693Jt1iWPoCy2fhdUkhHk/IKUCVQHs/Fl0GJBqqd CkF7gCFvxyLTZXAby85w/NsESDwHHFI/enoqV/qP4gPlZpzYufWjRY+stz1O9S+kb9Pb4kj i2c+jf5uOaXswC2CLOV3mS2i1lfsFeflnc6JEKU1MvR10nRJu9T4BCNOdWlz20b3CW+J39X SS4ikcR2HFmxaDq8ket3GZpkJdmw10f0muvPNgOvx0EjRrN2VN+Wlw34bgLB3LW4j4Vu/ap mSRecAv5B6I/ve/m1TAFQFZuXdfDzqT3h8OrElx5ZMnlNfryXzlBsvlC41TTeSsUWEKTYg6 uqOlxIhEaef4lOn7mWWomLInR8jXASrjhJc1pWIyTmnkOsvjTJkOhF8D/4WUeaiNxp8DKXM lE4F6jBE1E9xyIgUlmHEElZuYFQlQpaZzJa7tT7LXbrsX1yIjFPCwf2CGqa3B6bg2dp7Au1 B9MUhKXNmM3SR+/I2d6Lj0AVisxV/bO3xvUA8KeewTF6vTLiPudgU7J5vi+7V/yOMSrRicg FMngYnqMkO0PCgIoixqTFAHUW8wBO9aar1NakVDzg7yxwAYMfxrHCywP5xC0suA3gfj2A4C 094kcBCIkeW1yVm8VeQbyKFD9JdVQz3CZPM/KIDpk1lt5W3DMX1MlZnN6 X-QQ-XMRINFO: M/715EihBoGSf6IYSX1iLFg= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Drv_load bit will be reset to default 0 after hardware LAN reset, reconfigure it to inform firmware that driver is loaded. And set it to 0 when device is closed. Fixes: b1f596677d8e ("net/txgbe: support device start") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 2834468764..4aa3bfd0bc 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -331,6 +331,8 @@ txgbe_pf_reset_hw(struct txgbe_hw *hw) status = hw->mac.reset_hw(hw); ctrl_ext = rd32(hw, TXGBE_PORTCTL); + /* let hardware know driver is loaded */ + ctrl_ext |= TXGBE_PORTCTL_DRVLOAD; /* Set PF Reset Done bit so PF/VF Mail Ops can work */ ctrl_ext |= TXGBE_PORTCTL_RSTDONE; wr32(hw, TXGBE_PORTCTL, ctrl_ext); @@ -2061,6 +2063,9 @@ txgbe_dev_close(struct rte_eth_dev *dev) ret = txgbe_dev_stop(dev); + /* Let firmware take over control of hardware */ + wr32m(hw, TXGBE_PORTCTL, TXGBE_PORTCTL_DRVLOAD, 0); + txgbe_dev_free_queues(dev); txgbe_set_pcie_master(hw, false); From patchwork Mon Oct 28 02:31:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147448 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E909345BE5; Mon, 28 Oct 2024 03:09:39 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 87B5C40A76; Mon, 28 Oct 2024 03:09:15 +0100 (CET) Received: from smtpbgsg2.qq.com (smtpbgsg2.qq.com [54.254.200.128]) by mails.dpdk.org (Postfix) with ESMTP id 5737240672 for ; Mon, 28 Oct 2024 03:09:00 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081316tn5o1ih X-QQ-Originating-IP: 7/NTMT6ClEu6QVzzEk9gzdoB9KZ27+CpPMSsU5EE2Y0= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:36 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 3150395720473210606 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Subject: [PATCH v2 05/13] net/txgbe: enable Tx descriptor error interrupt Date: Mon, 28 Oct 2024 10:31:39 +0800 Message-Id: <20241028023147.60157-6-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: NhUkPfKlCtQwiK1njQ1Tqnsho1fPtAvLvr2ewAuwZQNTdXGmrxr+idOo L8qZ/nbZfLfQJMgGDob8pHskyPl/zmFpxfiw3AcBY+5OkryUhAWhZwWWMeUwGlCv+2ABEPS SHHj9kzqkpzNWPSKYbldg/NUrLMMmdYiiu9wJhhFQZitqD6p2cIUtBk57VsQuSanfIg7tR+ 9JFOuuXb7E716JSR8OexBiIchhzF09zqdoLCrg9Orl7gl0jDcwHlb546b+xPzhNOthtdkyH uAbzeZ6kERgKqNl966AWxAmYQTD9CvRBIlPS0pBhqqfGC4Xw/N3NxnIut9ix/taAf/p6Bwr J6x3+p4BSeUhp5XYmT7eQ9ayZBxogeNUfhTXn1qQwgNLgc85nPv1DG2Twi9cMNRMlpWjs10 Aryfn9C3oNt8QvW8UW36xnClLW75qhO8i1BYHssPr2ELIpFInlM3/ogXrs7Ug7hkXvhpXui 32JVMaMck3o2jlGgAtQxaIBLBOlxM+olGrQQjxyTEQ0zyAz2aRTxzL96zOh4kwGBTHwJ8bF n6+UiZa7R6hO2G3kb5oEWPMPxqnATrFfkq2OESVqL9jrfO6INccHG5exdumA4+6kyZH/DWT 5nG8xmyVJ3kbCJFJ9EG45WkVmIgiV6Eqwny54BKVedQP8nxAlz/nuWM7H8bv/t2FOfoZK4R qOXkiCl/Avvn5u4cLKLHRjJJEsXw9SJ3WUMKUTPwq6lMmgmSgStx6vz5hxkLFlZZO+MUzqP hEuxlmdX909jDpo/Pni29EhI8KRNXqMf3vm7H70FTkZLWEFlR6GwOZqSQ74bBag8TadSme6 p6wnSXpfOeOMXV0Ok6LbdwRjKRH3Z6xNUMnU9cZceh0khUsJyfS2FvrNxrJWGPn9gfpIsqp u+i2+jYPlu3gyQW2cmcXbrqKbPyE9ntPGAVNSdWe7PxSGzy+M4nF+GGxmU+HIgpTxMWYvqQ Z7VDmqWHasSD8/xWcQu9HP3XkHJXgJlXa7Vc= X-QQ-XMRINFO: MSVp+SPm3vtS1Vd6Y4Mggwc= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Enable Tdm_desc_chk then handle the interrupt of TDM desc error. If it's a non-fatal error, clear the error to reset the queue. If it's a fatal error, require users to manually restart the port. This flow prevents the hardware from PCIe pending due to Tx hang, resulting in a reboot to recover. But remarkably, when packet layer length does not match the packet type in TX descriptor, it will cause non-fatal error if Tdm_desc_chk is enabled. But it can be transmitted normally if Tdm_desc_chk is disabled. So in order to prevent hardware over check, fix the layer length on the basis of packet type. Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_regs.h | 6 ++ drivers/net/txgbe/txgbe_ethdev.c | 64 ++++++++++++++++++ drivers/net/txgbe/txgbe_ethdev.h | 3 + drivers/net/txgbe/txgbe_rxtx.c | 100 ++++++++++++++++++++++++++++ drivers/net/txgbe/txgbe_rxtx.h | 1 + 5 files changed, 174 insertions(+) diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h index b46d65331e..7a9ba6976f 100644 --- a/drivers/net/txgbe/base/txgbe_regs.h +++ b/drivers/net/txgbe/base/txgbe_regs.h @@ -1197,6 +1197,7 @@ enum txgbe_5tuple_protocol { #define TXGBE_ICRMISC_ANDONE MS(19, 0x1) /* link auto-nego done */ #define TXGBE_ICRMISC_ERRIG MS(20, 0x1) /* integrity error */ #define TXGBE_ICRMISC_SPI MS(21, 0x1) /* SPI interface */ +#define TXGBE_ICRMISC_TXDESC MS(22, 0x1) /* TDM desc error */ #define TXGBE_ICRMISC_VFMBX MS(23, 0x1) /* VF-PF message box */ #define TXGBE_ICRMISC_GPIO MS(26, 0x1) /* GPIO interrupt */ #define TXGBE_ICRMISC_ERRPCI MS(27, 0x1) /* pcie request error */ @@ -1382,6 +1383,11 @@ enum txgbe_5tuple_protocol { #define TXGBE_TXCFG_WTHRESH(v) LS(v, 16, 0x7F) #define TXGBE_TXCFG_FLUSH MS(26, 0x1) +#define TXGBE_TDM_DESC_CHK(i) (0x0180B0 + (i) * 4) /*0-3*/ +#define TXGBE_TDM_DESC_NONFATAL(i) (0x0180C0 + (i) * 4) /*0-3*/ +#define TXGBE_TDM_DESC_FATAL(i) (0x0180D0 + (i) * 4) /*0-3*/ +#define TXGBE_TDM_DESC_MASK(v) MS(v, 0x1) + /* interrupt registers */ #define TXGBE_ITRI 0x000180 #define TXGBE_ITR(i) (0x000200 + 4 * (i)) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 4aa3bfd0bc..bafa9cf829 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -1936,6 +1936,7 @@ txgbe_dev_stop(struct rte_eth_dev *dev) PMD_INIT_FUNC_TRACE(); rte_eal_alarm_cancel(txgbe_dev_detect_sfp, dev); + rte_eal_alarm_cancel(txgbe_tx_queue_clear_error, dev); txgbe_dev_wait_setup_link_complete(dev, 0); /* disable interrupts */ @@ -2838,6 +2839,60 @@ txgbe_dev_setup_link_alarm_handler(void *param) intr->flags &= ~TXGBE_FLAG_NEED_LINK_CONFIG; } +static void +txgbe_do_reset(struct rte_eth_dev *dev) +{ + struct txgbe_hw *hw = TXGBE_DEV_HW(dev); + struct txgbe_tx_queue *txq; + u32 i; + + for (i = 0; i < dev->data->nb_tx_queues; i++) { + txq = dev->data->tx_queues[i]; + txq->resetting = true; + } + + rte_delay_ms(1); + wr32(hw, TXGBE_RST, TXGBE_RST_LAN(hw->bus.lan_id)); + txgbe_flush(hw); + + PMD_DRV_LOG(ERR, "Please manually restart the port %d", + dev->data->port_id); +} + +static void +txgbe_tx_ring_recovery(struct rte_eth_dev *dev) +{ + struct txgbe_hw *hw = TXGBE_DEV_HW(dev); + u32 desc_error[4] = {0, 0, 0, 0}; + struct txgbe_tx_queue *txq; + u32 i; + + /* check tdm fatal error */ + for (i = 0; i < 4; i++) { + desc_error[i] = rd32(hw, TXGBE_TDM_DESC_FATAL(i)); + if (desc_error[i] != 0) { + PMD_DRV_LOG(ERR, "TDM fatal error reg[%d]: 0x%x", i, desc_error[i]); + txgbe_do_reset(dev); + return; + } + } + + /* check tdm non-fatal error */ + for (i = 0; i < 4; i++) + desc_error[i] = rd32(hw, TXGBE_TDM_DESC_NONFATAL(i)); + + for (i = 0; i < dev->data->nb_tx_queues; i++) { + if (desc_error[i / 32] & (1 << i % 32)) { + PMD_DRV_LOG(ERR, "TDM non-fatal error, reset port[%d] queue[%d]", + dev->data->port_id, i); + dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED; + txq = dev->data->tx_queues[i]; + txq->resetting = true; + rte_eal_alarm_set(1000, txgbe_tx_queue_clear_error, (void *)dev); + } + } +} + /* * If @timeout_ms was 0, it means that it will not return until link complete. * It returns 1 on complete, return 0 on timeout. @@ -3096,6 +3151,7 @@ txgbe_dev_misc_interrupt_setup(struct rte_eth_dev *dev) intr->mask |= mask; intr->mask_misc |= TXGBE_ICRMISC_GPIO; intr->mask_misc |= TXGBE_ICRMISC_ANDONE; + intr->mask_misc |= TXGBE_ICRMISC_TXDESC; return 0; } @@ -3191,6 +3247,9 @@ txgbe_dev_interrupt_get_status(struct rte_eth_dev *dev, if (eicr & TXGBE_ICRMISC_HEAT) intr->flags |= TXGBE_FLAG_OVERHEAT; + if (eicr & TXGBE_ICRMISC_TXDESC) + intr->flags |= TXGBE_FLAG_TX_DESC_ERR; + ((u32 *)hw->isb_mem)[TXGBE_ISB_MISC] = 0; return 0; @@ -3310,6 +3369,11 @@ txgbe_dev_interrupt_action(struct rte_eth_dev *dev, intr->flags &= ~TXGBE_FLAG_OVERHEAT; } + if (intr->flags & TXGBE_FLAG_TX_DESC_ERR) { + txgbe_tx_ring_recovery(dev); + intr->flags &= ~TXGBE_FLAG_TX_DESC_ERR; + } + PMD_DRV_LOG(DEBUG, "enable intr immediately"); txgbe_enable_intr(dev); rte_intr_enable(intr_handle); diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h index f0f4ced5b0..302ea9f037 100644 --- a/drivers/net/txgbe/txgbe_ethdev.h +++ b/drivers/net/txgbe/txgbe_ethdev.h @@ -31,6 +31,7 @@ #define TXGBE_FLAG_NEED_LINK_CONFIG (uint32_t)(1 << 4) #define TXGBE_FLAG_NEED_AN_CONFIG (uint32_t)(1 << 5) #define TXGBE_FLAG_OVERHEAT (uint32_t)(1 << 6) +#define TXGBE_FLAG_TX_DESC_ERR (uint32_t)(1 << 7) /* * Defines that were not part of txgbe_type.h as they are not used by the @@ -474,6 +475,8 @@ int txgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id); int txgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id); +void txgbe_tx_queue_clear_error(void *param); + void txgbe_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, struct rte_eth_rxq_info *qinfo); diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c index c12726553c..2d2b437643 100644 --- a/drivers/net/txgbe/txgbe_rxtx.c +++ b/drivers/net/txgbe/txgbe_rxtx.c @@ -728,6 +728,66 @@ txgbe_get_tun_len(struct rte_mbuf *mbuf) return tun_len; } +static inline void +txgbe_fix_offload_len(union txgbe_tx_offload *ol) +{ + uint8_t ptid = ol->ptid; + + if (ptid & TXGBE_PTID_PKT_TUN) { + if (ol->outer_l2_len == 0) + ol->outer_l2_len = sizeof(struct rte_ether_hdr); + if (ol->outer_l3_len == 0) { + if (ptid & TXGBE_PTID_TUN_IPV6) + ol->outer_l3_len = sizeof(struct rte_ipv6_hdr); + else + ol->outer_l3_len = sizeof(struct rte_ipv4_hdr); + } + if ((ptid & 0xF) == 0) { + ol->l3_len = 0; + ol->l4_len = 0; + } else { + goto inner; + } + } + + if ((ptid & 0xF0) == TXGBE_PTID_PKT_MAC) { + if (ol->l2_len == 0) + ol->l2_len = sizeof(struct rte_ether_hdr); + ol->l3_len = 0; + ol->l4_len = 0; + } else if ((ptid & 0xF0) == TXGBE_PTID_PKT_IP) { + if (ol->l2_len == 0) + ol->l2_len = sizeof(struct rte_ether_hdr); +inner: + if (ol->l3_len == 0) { + if (ptid & TXGBE_PTID_PKT_IPV6) + ol->l3_len = sizeof(struct rte_ipv6_hdr); + else + ol->l3_len = sizeof(struct rte_ipv4_hdr); + } + switch (ptid & 0x7) { + case 0x1: + case 0x2: + ol->l4_len = 0; + break; + case 0x3: + if (ol->l4_len == 0) + ol->l4_len = sizeof(struct rte_udp_hdr); + break; + case 0x4: + if (ol->l4_len == 0) + ol->l4_len = sizeof(struct rte_tcp_hdr); + break; + case 0x5: + if (ol->l4_len == 0) + ol->l4_len = sizeof(struct rte_sctp_hdr); + break; + default: + break; + } + } +} + static inline uint8_t txgbe_parse_tun_ptid(struct rte_mbuf *tx_pkt, uint8_t tun_len) { @@ -782,6 +842,10 @@ txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint8_t use_ipsec; #endif + txq = tx_queue; + if (txq->resetting) + return 0; + tx_offload.data[0] = 0; tx_offload.data[1] = 0; txq = tx_queue; @@ -826,6 +890,7 @@ txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, if (tx_offload.ptid & TXGBE_PTID_PKT_TUN) tx_offload.ptid |= txgbe_parse_tun_ptid(tx_pkt, tx_offload.outer_tun_len); + txgbe_fix_offload_len(&tx_offload); #ifdef RTE_LIB_SECURITY if (use_ipsec) { @@ -4570,6 +4635,11 @@ txgbe_dev_tx_init(struct rte_eth_dev *dev) wr32(hw, TXGBE_TXWP(txq->reg_idx), 0); } +#ifndef RTE_LIB_SECURITY + for (i = 0; i < 4; i++) + wr32(hw, TXGBE_TDM_DESC_CHK(i), 0xFFFFFFFF); +#endif + /* Device configured with multiple TX queues. */ txgbe_dev_mq_tx_configure(dev); } @@ -4806,6 +4876,7 @@ txgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) rte_wmb(); wr32(hw, TXGBE_TXWP(txq->reg_idx), txq->tx_tail); dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED; + txq->resetting = false; return 0; } @@ -4863,6 +4934,35 @@ txgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) return 0; } +void +txgbe_tx_queue_clear_error(void *param) +{ + struct rte_eth_dev *dev = (struct rte_eth_dev *)param; + struct txgbe_hw *hw = TXGBE_DEV_HW(dev); + struct txgbe_tx_queue *txq; + u32 i; + + for (i = 0; i < dev->data->nb_tx_queues; i++) { + txq = dev->data->tx_queues[i]; + if (!txq->resetting) + continue; + + txgbe_dev_save_tx_queue(hw, i); + + /* tx ring reset */ + wr32(hw, TXGBE_TDM_DESC_NONFATAL(i / 32), + TXGBE_TDM_DESC_MASK(i % 32)); + + if (txq->ops != NULL) { + txq->ops->release_mbufs(txq); + txq->ops->reset(txq); + } + + txgbe_dev_store_tx_queue(hw, i); + txgbe_dev_tx_queue_start(dev, i); + } +} + void txgbe_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, struct rte_eth_rxq_info *qinfo) diff --git a/drivers/net/txgbe/txgbe_rxtx.h b/drivers/net/txgbe/txgbe_rxtx.h index 9155eb1f70..e668b60b1e 100644 --- a/drivers/net/txgbe/txgbe_rxtx.h +++ b/drivers/net/txgbe/txgbe_rxtx.h @@ -412,6 +412,7 @@ struct txgbe_tx_queue { /**< indicates that IPsec TX feature is in use */ #endif const struct rte_memzone *mz; + bool resetting; }; struct txgbe_txq_ops { From patchwork Mon Oct 28 02:31:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147449 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D134745BE5; Mon, 28 Oct 2024 03:09:45 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 13DD140A82; Mon, 28 Oct 2024 03:09:17 +0100 (CET) Received: from smtpbguseast1.qq.com (smtpbguseast1.qq.com [54.204.34.129]) by mails.dpdk.org (Postfix) with ESMTP id B1A884069F for ; Mon, 28 Oct 2024 03:09:04 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081318tyxpjbp X-QQ-Originating-IP: gy+1aeAzT5szuSGGycr/mKx2mDJnrrDaTJ/fcayyOKU= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:38 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 18063511842555537454 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Subject: [PATCH v2 06/13] net/txgbe: check length of Tx packets Date: Mon, 28 Oct 2024 10:31:40 +0800 Message-Id: <20241028023147.60157-7-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: N02q4IFO9cRVCM16UMTWIfiZUZJLQDzYQGl6Z1LWpe8IZ2GjxPZTv8cg UhRESYl3QjMXYNuGqkAObvDj1I6u/fxTkGDietSOrDHig0hDV3FU4EdUaaY1eoar+e49bJD rrKYb0Jt0etIYkg5uwkDa4Bir5Wtl2lUc5qQEDAcuhgufREx6okufWJTy/O0OSb1FbbhlLh sZv65pN4p90YxAtE8dc4bST2QgUbaL92oYsfxYzRvepI40wNpmmi2dh2r9yB8KGBZpQu+io u4GKywAvsFYYPvSOETa2D5/zWxdpse79aglHs6zKncY/p6map+vk1FfGaLdeGJEJjDM5cOb 9Sb1AfSte2seZMhUxgYRRbVKrjTTzaEh4t/CZ6Xp93OtuAIMeOO4U+QW4lScXTMNzTSjHyS AC7Z8HbSuP5qlIapHkZMu8ic4eFTKZC1z3DoE5QuIEy50k3DTdBA8Iz8fCs8xN7uWO0MLs3 NJuh0Z4WobuYXhtOP95XQnQQG15EQ6lrkwE8vK0BxYHKQnUy9M8aPodChmOH8+K5kmQlGGE bggzz+5DIl/cMKIDOaA+Yygh4SFuoRo63NAhIxKtF6Irxd711g4j79JjtVm28CH+ga/1M/Q 0uBRGjKVuZz5o+IHIITrnlU/s5R7XXJ6HwTiQ9XhOFPW3PSAH0+EfpOddGZegQeUwe/GNth eoUq/+UKYRNKcSTAIDU+pG6noTpmTDkA68Qo7+E7OAJwmf4xuF+hHTuui91bNfYz37QBIP2 78WC3osoch+COFJTCsEF9unSRgzKgqWFwnDw8P2Fkze/rpeC7ozUY59qE07un08gseksGcy Ok+1oCHzUYsUEAKo4ifPhqzZmqdFx4jaLq4BnL4hbsRkwN97cyWG+DVYa4hbiEiBAJuPC9k 35tK8M1GMZqlfy933I4NGTSToRULgHxp9frKFTBRXWry4LghXSHqXcNtbwm+8B3iWGS4SLW OsvuPtvgOVF5esLXCsNUWl47J0uU5qN/LFNjZp9lHZYpBFmZpcnFe7/MU X-QQ-XMRINFO: M/715EihBoGSf6IYSX1iLFg= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add checking of the Tx packet length to avoid TDM fatal error as far as possible. Set the pkt_len=1518 for invalid packet in simple Tx code path, and drop it directly in featured Tx code path. Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_rxtx.c | 33 +++++++++++++++++++++++++ drivers/net/txgbe/txgbe_rxtx_vec_neon.c | 10 +++++--- drivers/net/txgbe/txgbe_rxtx_vec_sse.c | 11 ++++++--- 3 files changed, 48 insertions(+), 6 deletions(-) diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c index 2d2b437643..06acbd0881 100644 --- a/drivers/net/txgbe/txgbe_rxtx.c +++ b/drivers/net/txgbe/txgbe_rxtx.c @@ -160,6 +160,8 @@ tx4(volatile struct txgbe_tx_desc *txdp, struct rte_mbuf **pkts) for (i = 0; i < 4; ++i, ++txdp, ++pkts) { buf_dma_addr = rte_mbuf_data_iova(*pkts); pkt_len = (*pkts)->data_len; + if (pkt_len < RTE_ETHER_HDR_LEN) + pkt_len = TXGBE_FRAME_SIZE_DFT; /* write data to descriptor */ txdp->qw0 = rte_cpu_to_le_64(buf_dma_addr); @@ -180,6 +182,8 @@ tx1(volatile struct txgbe_tx_desc *txdp, struct rte_mbuf **pkts) buf_dma_addr = rte_mbuf_data_iova(*pkts); pkt_len = (*pkts)->data_len; + if (pkt_len < RTE_ETHER_HDR_LEN) + pkt_len = TXGBE_FRAME_SIZE_DFT; /* write data to descriptor */ txdp->qw0 = cpu_to_le64(buf_dma_addr); @@ -813,6 +817,30 @@ txgbe_parse_tun_ptid(struct rte_mbuf *tx_pkt, uint8_t tun_len) return ptid; } +static inline bool +txgbe_check_pkt_err(struct rte_mbuf *tx_pkt) +{ + uint32_t total_len = 0, nb_seg = 0; + struct rte_mbuf *mseg; + + mseg = tx_pkt; + do { + if (mseg->data_len == 0) + return true; + total_len += mseg->data_len; + nb_seg++; + mseg = mseg->next; + } while (mseg != NULL); + + if (tx_pkt->pkt_len != total_len || tx_pkt->pkt_len == 0) + return true; + + if (tx_pkt->nb_segs != nb_seg || tx_pkt->nb_segs > 64) + return true; + + return false; +} + uint16_t txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) @@ -864,6 +892,11 @@ txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) { new_ctx = 0; tx_pkt = *tx_pkts++; + if (txgbe_check_pkt_err(tx_pkt)) { + rte_pktmbuf_free(tx_pkt); + continue; + } + pkt_len = tx_pkt->pkt_len; /* diff --git a/drivers/net/txgbe/txgbe_rxtx_vec_neon.c b/drivers/net/txgbe/txgbe_rxtx_vec_neon.c index a96baf9b1d..d4d647fab5 100644 --- a/drivers/net/txgbe/txgbe_rxtx_vec_neon.c +++ b/drivers/net/txgbe/txgbe_rxtx_vec_neon.c @@ -476,9 +476,13 @@ static inline void vtx1(volatile struct txgbe_tx_desc *txdp, struct rte_mbuf *pkt, uint64_t flags) { - uint64x2_t descriptor = { - pkt->buf_iova + pkt->data_off, - (uint64_t)pkt->pkt_len << 45 | flags | pkt->data_len}; + uint16_t pkt_len = pkt->data_len; + + if (pkt_len < RTE_ETHER_HDR_LEN) + pkt_len = TXGBE_FRAME_SIZE_DFT; + + uint64x2_t descriptor = {pkt->buf_iova + pkt->data_off, + (uint64_t)pkt_len << 45 | flags | pkt_len}; vst1q_u64((uint64_t *)(uintptr_t)txdp, descriptor); } diff --git a/drivers/net/txgbe/txgbe_rxtx_vec_sse.c b/drivers/net/txgbe/txgbe_rxtx_vec_sse.c index 1a3f2ce3cd..8ecce33471 100644 --- a/drivers/net/txgbe/txgbe_rxtx_vec_sse.c +++ b/drivers/net/txgbe/txgbe_rxtx_vec_sse.c @@ -607,9 +607,14 @@ static inline void vtx1(volatile struct txgbe_tx_desc *txdp, struct rte_mbuf *pkt, uint64_t flags) { - __m128i descriptor = _mm_set_epi64x((uint64_t)pkt->pkt_len << 45 | - flags | pkt->data_len, - pkt->buf_iova + pkt->data_off); + uint16_t pkt_len = pkt->data_len; + __m128i descriptor; + + if (pkt_len < RTE_ETHER_HDR_LEN) + pkt_len = TXGBE_FRAME_SIZE_DFT; + + descriptor = _mm_set_epi64x((uint64_t)pkt_len << 45 | flags | pkt_len, + pkt->buf_iova + pkt->data_off); _mm_store_si128((__m128i *)(uintptr_t)txdp, descriptor); } From patchwork Mon Oct 28 02:31:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147445 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 19EB145BE5; Mon, 28 Oct 2024 03:09:18 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1B0E440648; Mon, 28 Oct 2024 03:09:05 +0100 (CET) Received: from smtpbg150.qq.com (smtpbg150.qq.com [18.132.163.193]) by mails.dpdk.org (Postfix) with ESMTP id C48E74060A for ; Mon, 28 Oct 2024 03:08:58 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081321tdh688d X-QQ-Originating-IP: GQNW5YV3cV2JH38+r7WXL0P2XY76C1Q8RbO8yibqA+s= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:40 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 8201093619708008879 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Subject: [PATCH v2 07/13] net/txgbe: add Tx descriptor error statistics Date: Mon, 28 Oct 2024 10:31:41 +0800 Message-Id: <20241028023147.60157-8-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: Mm/8i8/T4ynebcIX8kOemOfJHahVf98g56eghHw+W/NLH0VjjVZzrSGw CfahLvnXaMWZymOjvx2vtFbchf2VL3l4F9gfv6gIJuzbTu4uJOvhdYvZpAUvOFMTQtOvDwk nXvpOIXt8k0p3FPRKBfx/Zmb94UHSaG8ld+uvYsEElUfe8gABPozCXjYMU381+dqdmdaD1f VHXN0xWaidJaqaldlYfXtcE9dQ17CdqrcRk3U/0KDt5YDYvxOdSBueRIS5h+SsNsfwcT+vc WIUpSByaIZq1Cy790wO56Sc+Efm7//FZu7FF5D02BGjwwKDxZyO1gzW3HGTUtOVbH9ae4xX KstS7w5uhCZYys6S+WYgbfjh473Kvr1sdDx2ye7jx6OQMg0VJFO0lzEw9QPrUbvMCLzTMRS Aoza8Uu6hX55aiS2/Nr6CnU5H2cgEKj/VzxTjFQa4DumMrWJGFvW6WKi+pEclaxgbwVEJjm Vb0kVtF/cDxWO2NZW4a9pGuk4dnpZqQp7xpyykASezNbrL/eWfAvSBjbN84DMxQoMBvhxnt noU8EKF5jed20qO1+K+Hci38UZuQ2vuFN605q0h5P7ZxOZ5T44hg+S91v8Hc18zH/qWo5WT cEI6VWtGmUyFmjelf1bRCfOWoauRe+aLAlHVvb/epl2Uw+k2vCqas10OryNieUvsGX4sGNa SzXlgwMWcC68A52sMBganSqRTVixP3M8kqu2aC7uc79GxmhJY4yvMlIkK0fHoh+KxaZo5s0 D18e1jAwGnpQ5irH0VyQle84yzAfG5xNUb6sUTmuxAIc2stE4/xYqOmHZBT2RML+QQi9uq2 /1ID29+LITScdGHxmXIXu4jHLzTqNxGnrbIhxeKUY1ezuu8KknSVkcyQxeE5plUKAUgtCdj 6r86150hSaqcbP5B9xwv8YNbMQlNp07UFQmb80pWBaF3PSaFYUg9dBHmWqi2xULnJHZTsl0 5YLPNYmtugLddr9AbuTECYWXU X-QQ-XMRINFO: Nq+8W0+stu50PRdwbJxPCL0= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Count the number of packets not sent due to Tx descriptor error. Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev.c | 6 ++++++ drivers/net/txgbe/txgbe_rxtx.c | 3 +++ drivers/net/txgbe/txgbe_rxtx.h | 1 + 3 files changed, 10 insertions(+) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index bafa9cf829..0c76e986f4 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -2344,6 +2344,7 @@ txgbe_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) struct txgbe_hw_stats *hw_stats = TXGBE_DEV_STATS(dev); struct txgbe_stat_mappings *stat_mappings = TXGBE_DEV_STAT_MAPPINGS(dev); + struct txgbe_tx_queue *txq; uint32_t i, j; txgbe_read_stats_registers(hw, hw_stats); @@ -2398,6 +2399,11 @@ txgbe_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) /* Tx Errors */ stats->oerrors = 0; + for (i = 0; i < dev->data->nb_tx_queues; i++) { + txq = dev->data->tx_queues[i]; + stats->oerrors += txq->desc_error; + } + return 0; } diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c index 06acbd0881..fc9e7b14f5 100644 --- a/drivers/net/txgbe/txgbe_rxtx.c +++ b/drivers/net/txgbe/txgbe_rxtx.c @@ -894,6 +894,7 @@ txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, tx_pkt = *tx_pkts++; if (txgbe_check_pkt_err(tx_pkt)) { rte_pktmbuf_free(tx_pkt); + txq->desc_error++; continue; } @@ -2523,6 +2524,7 @@ txgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, txgbe_set_tx_function(dev, txq); txq->ops->reset(txq); + txq->desc_error = 0; dev->data->tx_queues[queue_idx] = txq; @@ -4980,6 +4982,7 @@ txgbe_tx_queue_clear_error(void *param) if (!txq->resetting) continue; + txq->desc_error++; txgbe_dev_save_tx_queue(hw, i); /* tx ring reset */ diff --git a/drivers/net/txgbe/txgbe_rxtx.h b/drivers/net/txgbe/txgbe_rxtx.h index e668b60b1e..622a0d3981 100644 --- a/drivers/net/txgbe/txgbe_rxtx.h +++ b/drivers/net/txgbe/txgbe_rxtx.h @@ -412,6 +412,7 @@ struct txgbe_tx_queue { /**< indicates that IPsec TX feature is in use */ #endif const struct rte_memzone *mz; + uint64_t desc_error; bool resetting; }; From patchwork Mon Oct 28 02:31:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147442 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4FB7245BE5; Mon, 28 Oct 2024 03:08:59 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B32A14067C; Mon, 28 Oct 2024 03:08:53 +0100 (CET) Received: from bg1.exmail.qq.com (bg1.exmail.qq.com [114.132.67.179]) by mails.dpdk.org (Postfix) with ESMTP id DBE374067A for ; Mon, 28 Oct 2024 03:08:49 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081323tdc765b X-QQ-Originating-IP: iPDa7CkpqNwC2HmsKYbWx7pwtkOKFdsXZNiHfaisePg= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:42 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 17615118539695730899 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Subject: [PATCH v2 08/13] net/ngbe: check length of Tx packets Date: Mon, 28 Oct 2024 10:31:42 +0800 Message-Id: <20241028023147.60157-9-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: MYfhlf1c9BtRUi1JlFMWXgzI+Fa1YZxCDrlnnBz0DP0iYZroQEqFd52l 9XXIiFg9pBvK05bZ5XZgEDovSsu+nr0RyC01FbvZVt4i+6KgleFh7NwAn46H5CoqPDt9ajL UBDVnFq6VKVSLtBubmB/curHd6WKGbN7vIYbdcHJXTVXC7KC3FJd2E93RCBNFOwXX4DtWR/ GVm2Lz1gAEVg1GUg+osp/AEICLo6cHh+z1NvcYtSGcLZFj3odhZfagcTXjqUlDqDwdL3Mzx Cm09yrvxzYpbKvxt2hztQv99XxhS3UFighcHS0qsNNJpwO7sHRb5C5JIBXkCixnzJMOWrH7 R6aI7Mf8VNtF/iSHsdqSd7UyVhRCtnGuVkSoGHK/Ol8CNlDCpRfDLeUYCYudTbqjf8DEI1m 6X/z4T6d7ENIuY6qVL6iZEnsQfdMIX18QabbpIFmVQQW4X3he4UPUHPgpfH/hnxxllLeO4E l6nlxSRKuJg4E2PCI1jvbQySnMZ90eZrAgYRKXGMNctbme+1UFH+byBalO6239ZNtofKjqz NH1NfGFWtrae3IPGpv5BLVARQ4Q6CMskaYwSqx7V8RmC4UFRbpNPRG1IOjvG5lMGQOZbukI 1wBkx4m1ZRjHsh5pbm5UE7C5crrrwtrkjFbnDtfULy4lRehGYsuLqNp5c1zNG6qNH0a8WNT BzbxKTweDt3E3LFkZQoPbroNlsgR0bwSGvPUhnluBJ+Tt8KrpWZ3NkJKhJoNRKdOeQPFulp 4X874O4+nXNCFGjwNnGr/BtUI1OGFJ2QBXufcpyFUlklJheXJIWonrH+3kGxkfBRysQSNkC XXwt1GMsoXWiCDYexsIpryc26wPYx6nlalmorgoqXmifo7ITgENuKPh8Myx6X8cHwA/XN7L JP4aJrKnzL6kcfHLBJHUXx6GvDtfwbDu6WQlYFptSD4IvozQFAI1d5lWuJOk3mqJy2wzctj /fjMnkSLTYvnN0m99VsVju51FrdmjAPvH8dI3QrfFi+RgU8MphodCSP9l0uQZwgWx+9S1wZ s4s0LamFYSwcqE+4ZG X-QQ-XMRINFO: MSVp+SPm3vtS1Vd6Y4Mggwc= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add checking of the Tx packet length to avoid TDM fatal error as far as possible. Set the pkt_len=1518 for invalid packet in simple Tx code path, and drop it directly in featured Tx code path. Althrough the hardware does not support TDM desc check. Signed-off-by: Jiawen Wu --- drivers/net/ngbe/ngbe_rxtx.c | 33 +++++++++++++++++++++++++++ drivers/net/ngbe/ngbe_rxtx_vec_neon.c | 10 +++++--- drivers/net/ngbe/ngbe_rxtx_vec_sse.c | 11 ++++++--- 3 files changed, 48 insertions(+), 6 deletions(-) diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c index f3eb797d0c..25a314f10a 100644 --- a/drivers/net/ngbe/ngbe_rxtx.c +++ b/drivers/net/ngbe/ngbe_rxtx.c @@ -113,6 +113,8 @@ tx4(volatile struct ngbe_tx_desc *txdp, struct rte_mbuf **pkts) for (i = 0; i < 4; ++i, ++txdp, ++pkts) { buf_dma_addr = rte_mbuf_data_iova(*pkts); pkt_len = (*pkts)->data_len; + if (pkt_len < RTE_ETHER_HDR_LEN) + pkt_len = NGBE_FRAME_SIZE_DFT; /* write data to descriptor */ txdp->qw0 = rte_cpu_to_le_64(buf_dma_addr); @@ -133,6 +135,8 @@ tx1(volatile struct ngbe_tx_desc *txdp, struct rte_mbuf **pkts) buf_dma_addr = rte_mbuf_data_iova(*pkts); pkt_len = (*pkts)->data_len; + if (pkt_len < RTE_ETHER_HDR_LEN) + pkt_len = NGBE_FRAME_SIZE_DFT; /* write data to descriptor */ txdp->qw0 = cpu_to_le64(buf_dma_addr); @@ -555,6 +559,30 @@ ngbe_xmit_cleanup(struct ngbe_tx_queue *txq) return 0; } +static inline bool +ngbe_check_pkt_err(struct rte_mbuf *tx_pkt) +{ + uint32_t total_len = 0, nb_seg = 0; + struct rte_mbuf *mseg; + + mseg = tx_pkt; + do { + if (mseg->data_len == 0) + return true; + total_len += mseg->data_len; + nb_seg++; + mseg = mseg->next; + } while (mseg != NULL); + + if (tx_pkt->pkt_len != total_len || tx_pkt->pkt_len == 0) + return true; + + if (tx_pkt->nb_segs != nb_seg || tx_pkt->nb_segs > 64) + return true; + + return false; +} + uint16_t ngbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) @@ -599,6 +627,11 @@ ngbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) { new_ctx = 0; tx_pkt = *tx_pkts++; + if (ngbe_check_pkt_err(tx_pkt)) { + rte_pktmbuf_free(tx_pkt); + continue; + } + pkt_len = tx_pkt->pkt_len; /* diff --git a/drivers/net/ngbe/ngbe_rxtx_vec_neon.c b/drivers/net/ngbe/ngbe_rxtx_vec_neon.c index dcf12b7070..37075ea5e7 100644 --- a/drivers/net/ngbe/ngbe_rxtx_vec_neon.c +++ b/drivers/net/ngbe/ngbe_rxtx_vec_neon.c @@ -476,9 +476,13 @@ static inline void vtx1(volatile struct ngbe_tx_desc *txdp, struct rte_mbuf *pkt, uint64_t flags) { - uint64x2_t descriptor = { - pkt->buf_iova + pkt->data_off, - (uint64_t)pkt->pkt_len << 45 | flags | pkt->data_len}; + uint16_t pkt_len = pkt->data_len; + + if (pkt_len < RTE_ETHER_HDR_LEN) + pkt_len = NGBE_FRAME_SIZE_DFT; + + uint64x2_t descriptor = {pkt->buf_iova + pkt->data_off, + (uint64_t)pkt_len << 45 | flags | pkt_len}; vst1q_u64((uint64_t *)(uintptr_t)txdp, descriptor); } diff --git a/drivers/net/ngbe/ngbe_rxtx_vec_sse.c b/drivers/net/ngbe/ngbe_rxtx_vec_sse.c index b128bd3a67..19c69cdfa6 100644 --- a/drivers/net/ngbe/ngbe_rxtx_vec_sse.c +++ b/drivers/net/ngbe/ngbe_rxtx_vec_sse.c @@ -563,9 +563,14 @@ static inline void vtx1(volatile struct ngbe_tx_desc *txdp, struct rte_mbuf *pkt, uint64_t flags) { - __m128i descriptor = _mm_set_epi64x((uint64_t)pkt->pkt_len << 45 | - flags | pkt->data_len, - pkt->buf_iova + pkt->data_off); + uint16_t pkt_len = pkt->data_len; + __m128i descriptor; + + if (pkt_len < RTE_ETHER_HDR_LEN) + pkt_len = NGBE_FRAME_SIZE_DFT; + + descriptor = _mm_set_epi64x((uint64_t)pkt_len << 45 | flags | pkt_len, + pkt->buf_iova + pkt->data_off); _mm_store_si128((__m128i *)(uintptr_t)txdp, descriptor); } From patchwork Mon Oct 28 02:31:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147443 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 62B0945BE5; Mon, 28 Oct 2024 03:09:05 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E608140678; Mon, 28 Oct 2024 03:08:54 +0100 (CET) Received: from smtpbg151.qq.com (smtpbg151.qq.com [18.169.211.239]) by mails.dpdk.org (Postfix) with ESMTP id AF6724065E for ; Mon, 28 Oct 2024 03:08:50 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081328t9lcgx4 X-QQ-Originating-IP: T7gU74u0aFOB0G+LJ4TJzT+gS+DA9c48gQYDmzhcZ2U= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:47 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 13548977480319350377 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Subject: [PATCH v2 09/13] net/ngbe: add Tx descriptor error statistics Date: Mon, 28 Oct 2024 10:31:43 +0800 Message-Id: <20241028023147.60157-10-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: NhUkPfKlCtQwiK1njQ1TqnsEOQxbgpJAjAxU+jarvB3FtSnzti0jF4Jk Lap1vP9P2gMXNS/gKf2hENAC5Ktx29Pm5OK2ML9x8aXEkyarQZHOifqs/P9bsSoiiWc3ROW SALTbqDA2QV7Wo5LJV9+cOBm63ADoln8Pb9lXSNuYnvYFQxCdtNo/ad9NJQLpBjMqvIWcDC Ox25wyaPgpbNLS+JWGCNd4zSZK/vUZdWoorHqyJFvf48CGYnNfeoMw81TzYGGERZ1aiz0qm AUbZErKSYEj2JiVXnXzuqcLPzMoJi2QgQhVjjRdm7+5RsffOkHT9k10IPiNHKBKekx0QK4b e62AL4dStp5LfSvmYjOZCdfjDp0/k3yoD79vGzRyIrPblkX/AFeohqze11vjkDCyAZqUcZD Nzv+JdY9qvl3TFN4PvN5CwREnl2MnoI/tcyAfeY/TxONaavtDCUP9BPK8iRybLvkFrK8tTw O5LX6WXj0A2cuu0D572dj0dW1z6dJIBFlgTfsJfGgmelvqGJaGVF0M1AdM1HcHqEyDAyaOh XpnfQ5w2K21//jnz0bgTZUsnNVq8cjCs9qumgLX9Trz2n+yZcssTrDJvsnhNUWza/gE9Gz4 ubHsPMFcWszX3KyMvXxHIusaJKvWstc81zRALQh62JGpTFBUtsgZpIg+o1d9KoyPzV3nU9e X2H9WeThduUSxiAWrrZiSaTP5Rv8SbHAW1xNsV7Tj+0jMnZgp3l1zNkMj2otzFiCE/vel5V a2UN/tJc8fXbk8uNTGdsE3DHmCfeiB4fIfQeXQegQMCO6jpTUfJDZYXQUxMJZaZ2Sz60OUr Zy4o/639tPYU/1NDUDywM7nSkFuYneXxeQXepVvDmiX0JnfnhA4rh2NQjTySiaDAb7uS6gd WyaWgvRnrIjavpBuTUQa6zeZxh5sB98F7RPh6UpY/3pEXCcRqp7U/RYJ/aR69tHEx4nfwXX aFLXyltckRl/T3uABgn8wHxpSCEy/ag6ElTo= X-QQ-XMRINFO: Nq+8W0+stu50PRdwbJxPCL0= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Count the number of packets not sent due to Tx descriptor error. Signed-off-by: Jiawen Wu --- drivers/net/ngbe/ngbe_ethdev.c | 6 ++++++ drivers/net/ngbe/ngbe_rxtx.c | 2 ++ drivers/net/ngbe/ngbe_rxtx.h | 1 + 3 files changed, 9 insertions(+) diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index 6c45ffaad3..d9d2daf656 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -1507,6 +1507,7 @@ ngbe_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) struct ngbe_hw_stats *hw_stats = NGBE_DEV_STATS(dev); struct ngbe_stat_mappings *stat_mappings = NGBE_DEV_STAT_MAPPINGS(dev); + struct ngbe_tx_queue *txq; uint32_t i, j; ngbe_read_stats_registers(hw, hw_stats); @@ -1559,6 +1560,11 @@ ngbe_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) /* Tx Errors */ stats->oerrors = 0; + for (i = 0; i < dev->data->nb_tx_queues; i++) { + txq = dev->data->tx_queues[i]; + stats->oerrors += txq->desc_error; + } + return 0; } diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c index 25a314f10a..8d31d47de9 100644 --- a/drivers/net/ngbe/ngbe_rxtx.c +++ b/drivers/net/ngbe/ngbe_rxtx.c @@ -629,6 +629,7 @@ ngbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, tx_pkt = *tx_pkts++; if (ngbe_check_pkt_err(tx_pkt)) { rte_pktmbuf_free(tx_pkt); + txq->desc_error++; continue; } @@ -2100,6 +2101,7 @@ ngbe_dev_tx_queue_setup(struct rte_eth_dev *dev, ngbe_set_tx_function(dev, txq); txq->ops->reset(txq); + txq->desc_error = 0; dev->data->tx_queues[queue_idx] = txq; diff --git a/drivers/net/ngbe/ngbe_rxtx.h b/drivers/net/ngbe/ngbe_rxtx.h index 7574db32d8..8534ec123a 100644 --- a/drivers/net/ngbe/ngbe_rxtx.h +++ b/drivers/net/ngbe/ngbe_rxtx.h @@ -375,6 +375,7 @@ struct ngbe_tx_queue { const struct ngbe_txq_ops *ops; /**< txq ops */ const struct rte_memzone *mz; + uint64_t desc_error; }; struct ngbe_txq_ops { From patchwork Mon Oct 28 02:31:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147444 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9143B45BE5; Mon, 28 Oct 2024 03:09:11 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 41CC440672; Mon, 28 Oct 2024 03:09:03 +0100 (CET) Received: from smtpbg154.qq.com (smtpbg154.qq.com [15.184.224.54]) by mails.dpdk.org (Postfix) with ESMTP id C6E4C40684; Mon, 28 Oct 2024 03:08:53 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081330tlyn2uq X-QQ-Originating-IP: LVV9hxeIov6OqWPOfYNIy47cQPPAIUeqly3fcgwPb8Q= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:49 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 6194721514714591776 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH v2 10/13] net/ngbe: fix driver load bit to inform firmware Date: Mon, 28 Oct 2024 10:31:44 +0800 Message-Id: <20241028023147.60157-11-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: MkhAA4qIuU0puR6EDKZ5L+ifs98d9NlZm/4AKf6wjGLGM//kyHWOLyLY zCzOxpy9GXXZZbR8Hzk7syxiVcG+CHccGy2B8+M7AeNAp6Eb1rppTYSfdyw7Nlom/udKbnz pHEO7qteSGEBvA120tN6iAlxvvT8kZF3enh4QgBT/BiKkXlMcw3Ja4o1CjA0WB8NCti3uod dIJ2OWbm+VLn1LziKkAOE0H4nfK9yxjhSSB8hiodUo+rmakRO59VTbSteikJuGxEJGppx/8 cH87JoZZOt2DBZclWzSiHlzUVs0hwiGx1SXhQdOwnr6L3e+gj89v6fMhdzIYUqUWiN3w7h/ gw/5XHWAEXjyiSDTthCXrN3KOxCO3cF2cQe9ApFskTf9DMCg/AhN8Xe0OJBOAfw7h67YeNz 8ghvW9LMpFXi0YQK4qIKEAKzM6UbMTX48bJmtuxJ1PUAHXH15AHFdFVOIIAnaUac2W7Ka7w NqgOZuoCnuJjnqbt8bnjrNx/E5mnr5zAFZmUq885yQuNU12iEuDpoOaheEFPjqMqfiZLjqY jfJn72YB6yeSRA/tNbcwQb7PLUIbmoCbBaExf/QlIEdcl/7BwIG0jbB33WuRcFbMv7CV0xx eHtm8wpOWilzgCjAXxw2rvOTukREjwUvgPB6238a6YGlC8JT20QYSbpWYBSFiG2t+D7GRLT M+/d2Wa0RGNxwDkdMVbxWLF2tY9NLdrk1gsepwKY61AO+dxTdbBfulTYnhbRA52otUYqWyw UMB2C9XEpe+JxTWR0HgFohAcDR6VxXwVtnxIErMbXetZJYEUV0n5dcxbQfqRFy6ixzbPOr4 Dwq94Z9rlR/O95+gGqUopFNChfz1e31wLUwkuv5XnzOwxl6YD3j0C9GysX/dC4NF4ESOVWQ entES2eM7BzNYI/jVG0MaCZHs2TiKJ5s4l+N8ssiMI3VPwjhcdFl6DMzVBgzO0WurGPVpHv Nxsz7zxkwYqNDodSd6ife/ri8OQFa4DabAXKm8gWDhybHs3U9fA78Hk9k2sb0Do8nLkoCIz /SQsoD/Rjd7x8EiNfw7VePOsY623xBzwejuQiRMg== X-QQ-XMRINFO: OD9hHCdaPRBwq3WW+NvGbIU= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Drv_load bit will be reset to default 0 after hardware LAN reset, reconfigure it to inform firmware that driver is loaded. And set it to 0 when device is closed. Fixes: 3518df5774c7 ("net/ngbe: support device start/stop") Fixes: cc63194e89cb ("net/ngbe: support close and reset device") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/ngbe/ngbe_ethdev.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index d9d2daf656..ba46dcf2a5 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -263,6 +263,8 @@ ngbe_pf_reset_hw(struct ngbe_hw *hw) status = hw->mac.reset_hw(hw); ctrl_ext = rd32(hw, NGBE_PORTCTL); + /* let hardware know driver is loaded */ + ctrl_ext |= NGBE_PORTCTL_DRVLOAD; /* Set PF Reset Done bit so PF/VF Mail Ops can work */ ctrl_ext |= NGBE_PORTCTL_RSTDONE; wr32(hw, NGBE_PORTCTL, ctrl_ext); @@ -1277,6 +1279,9 @@ ngbe_dev_close(struct rte_eth_dev *dev) ngbe_dev_stop(dev); + /* Let firmware take over control of hardware */ + wr32m(hw, NGBE_PORTCTL, NGBE_PORTCTL_DRVLOAD, 0); + ngbe_dev_free_queues(dev); ngbe_set_pcie_master(hw, false); From patchwork Mon Oct 28 02:31:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147446 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9BDCE45BE5; Mon, 28 Oct 2024 03:09:24 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 722CB4068A; Mon, 28 Oct 2024 03:09:06 +0100 (CET) Received: from bg1.exmail.qq.com (bg1.exmail.qq.com [114.132.58.223]) by mails.dpdk.org (Postfix) with ESMTP id D6EFB4060A; Mon, 28 Oct 2024 03:08:59 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081333td7aqzq X-QQ-Originating-IP: 6MF+kqNwGQ5az8aykQ2PAvcOspCZYZCV4+xd+I0uXYo= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:52 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 11705363039825570677 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH v2 11/13] net/ngbe: reconfigure more MAC Rx registers Date: Mon, 28 Oct 2024 10:31:45 +0800 Message-Id: <20241028023147.60157-12-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: NRYSeI3Ux+UPdgiQ2LbZhbXGiFF/C00hjWBEnLug/WoLUAAXhXl46+Bv vD9kOeLF2ahwYVfqooYbXJps5o9JLzguVbh1P+m2iIjOPhfTKU2a+laQve7XRrmV51fW4KF x4YUtB6aDVmxfiuEBF+lJt0QuBu+wXcqCPaoRNJ7IQAmZOU/tEP/Ho7o3rqT8kUtvsGqBAi 9wjqt5b5psYzBlcEdd2EX/t5nKmoN+CYG1s3Qu43pOzW9fLxia210yLU1McrOGeB1oLPmbl VvwstqWMtHZvi1hGCquYj2EFxGw08iEcYHdiNWRjhdZ6vS6kjNHCtS/6uqn2rtQFugcCl/a OdJmqaIpYPpqW2O3/u/JxOyLAtiX2i4q1q1fmUQrreJeT4gV3va2EQd/2pfEsSlWcVWGHQ5 wxCaQkmykAUXZmmadSWGxL6aSLQvrb2xj/pSaUnfN6IUVkMvpzCj3VinqrkAZDpnz+CUmmm 2spVy79/5xA1ehEp+DYuPqQT5iQufMVWGtdXEVWki6Vy9KsqMi1F2WPgDFYecBUKE6cl8KU URysGnoCE26n60z+iLKwPEmD8gV4v4fQIRX5dUbZF5lIbnIdwLaumQYWXnm0m0Zmv8zf7Lj 50hooVsveaWcgL3bW3oWPDGc0Ao1jwC1fQ9nqeGPZVjBRRNI7ZeMWxECnFK0Oru43ikBZR3 pA824K/x3TuY/VFFgALfj6fth9wSFlNq7Awy9QdixQjMGbt5Jeiz0BDCcUwwTRb7+/qubFY 3ft9PNKLdLPo27lQEGaNERHHDEWVz62SS/UxobbwTWb4ruWJQxgAbiywxNcOMzpVYtTRVy+ Rxo8Rob7jKHNwDKdaAW2IipqKrT53kiU0nCH1toxnf2knPUfG5pJX+VIrycG7TJeU/tsdkY X3/IEkC0lKxniF3yHYDUvmjStC/PaUGt9SyKzgyVdkug5/Ka6F3X+g1kKyT9ieol8ihyzK9 ce+0K7ikdVlDJFa0TMihifH8MRKQZgjJTBY7UadCK/cHWJURM/Sr/Zf0k X-QQ-XMRINFO: NyFYKkN4Ny6FSmKK/uo/jdU= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When link status changes, there is a probability that no more packets can be received on the port, due to hardware defects. These MAC Rx registers should be reconfigured to fix this problem. Fixes: b9246b8fa280 ("net/ngbe: support link update") Fixes: a7c5f95ed9c2 ("net/ngbe: reconfigure MAC Rx when link update") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/ngbe/base/ngbe_regs.h | 2 ++ drivers/net/ngbe/ngbe_ethdev.c | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/drivers/net/ngbe/base/ngbe_regs.h b/drivers/net/ngbe/base/ngbe_regs.h index 8a6776b0e6..b1295280a7 100644 --- a/drivers/net/ngbe/base/ngbe_regs.h +++ b/drivers/net/ngbe/base/ngbe_regs.h @@ -712,6 +712,8 @@ enum ngbe_5tuple_protocol { #define NGBE_MACRXFLT_CTL_PASS LS(3, 6, 0x3) #define NGBE_MACRXFLT_RXALL MS(31, 0x1) +#define NGBE_MAC_WDG_TIMEOUT 0x01100C + /****************************************************************************** * Statistic Registers ******************************************************************************/ diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index ba46dcf2a5..3ea7ed43ff 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -1934,6 +1934,7 @@ ngbe_dev_link_update_share(struct rte_eth_dev *dev, bool link_up; int err; int wait = 1; + u32 reg; memset(&link, 0, sizeof(link)); link.link_status = RTE_ETH_LINK_DOWN; @@ -1991,8 +1992,13 @@ ngbe_dev_link_update_share(struct rte_eth_dev *dev, wr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_SPEED_MASK, NGBE_MACTXCFG_SPEED_1G | NGBE_MACTXCFG_TE); } + /* Re configure MAC RX */ + reg = rd32(hw, NGBE_MACRXCFG); + wr32(hw, NGBE_MACRXCFG, reg); wr32m(hw, NGBE_MACRXFLT, NGBE_MACRXFLT_PROMISC, NGBE_MACRXFLT_PROMISC); + reg = rd32(hw, NGBE_MAC_WDG_TIMEOUT); + wr32(hw, NGBE_MAC_WDG_TIMEOUT, reg); } return rte_eth_linkstatus_set(dev, &link); From patchwork Mon Oct 28 02:31:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147450 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0448945BE5; Mon, 28 Oct 2024 03:09:51 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5F42A4066C; Mon, 28 Oct 2024 03:09:18 +0100 (CET) Received: from smtpbg154.qq.com (smtpbg154.qq.com [15.184.224.54]) by mails.dpdk.org (Postfix) with ESMTP id D0E32406B4; Mon, 28 Oct 2024 03:09:10 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081338tizcfdb X-QQ-Originating-IP: QBrMfbmcqWxFiaDYmDhwr2mg9pkWB8BwSvki6jGIzwU= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:57 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 10065984695752085265 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH v2 12/13] net/ngbe: fix interrupt lost in legacy or MSI mode Date: Mon, 28 Oct 2024 10:31:46 +0800 Message-Id: <20241028023147.60157-13-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: NSahpW5IwUZO5+rPoqC7jUDyuEben5CYRUk9ewLQK5CO/FfMwUGm3YMw PmGjCuN7AldDCzJZJAWJhNSUHMWkOVCX914Mqzbbr9/WCOK6eDtJcJvJyAWbiRIy3JVJgnW DJ+JSgWj8p+nrbXDBoKM/ft0aFUJlJ95pUnUmi+7ng5szSgcgDacguyXmp3GVy6H2I6TiNX DVuKZ5NiJ+LXUOCrpoIx3HY3h7t40AfM6ot82hy3IxDqTbUz8Iu5s8maXTR2TAZ6WTW8h+h x8vfOPkguPknige3ZTDOpC618TAQG+sNDPSd2C83P2ct6Ew0Sa7LZbguajQfyisMHaDBXb1 Bito7+gLN76Fq7PYvfrebLe6d3C1wI3uzCBhy4xUeww8diiqfMV77RwPuK2LpSjkbjMeGHY 86wGGWrOs7wcURqwpj0f5RFNelEfdcrVN1wkvzLmAekW+shgwcEDEhIdnwrk4drWi+fFQqz E1SJkJ0ykudwNY9QrfMJxm7qMwPRZLlCziXWcM+9UaeCa/YNgDPHqgnxc7O38+5As/pe6wQ V+P5svdN9PABPAW+r06fW+/3xYCMmrS+JPIkqI54j/iRLHyDM4lB8zZ+9otF+uIgR+eeuRr oRow7NRvT8T8uG8X0+ZEzrK9IZ1k9C1MfP4BCvSQ1sPhn8hsvzAfvZiEVshWxdDP5j/8YlZ v47rL8LS2YZ3dbJaIB8++SVx1FPz4KqpPMiSNaWWmEaOMzh3QRcK96Bdd5J7XbnisNN6pXa nYw+/3ETywGW4S/CnR1U5dkHRNF5JqJdMq17Hk8XqvpW3F3jucL7aG6g7h+YQ9CL1zuSpRd Pg25cZXKsbpbKt8cVuQgiwVTTIWr4uDxCdjCwVL2mQ30fb+gzlxNu1BZMdYrcxBD5NnFUuV g/z/fv7A6+39p6+mboqkpRG5PldXOXzLO7y8r+QmEoYXMg+/OJYTnvkF/N/1NL1p6CdggUK ZK1K4gqdxUIa0si1XnPi1p8iyWwBildoX5fIX3IHNSMYAn3v6Csow/Yu+ X-QQ-XMRINFO: Mp0Kj//9VHAxr69bL5MkOOs= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When interrupt is legacy or MSI mode, shared interrupt may cause the interrupt cannot be re-enabled. So fix to read the shared interrupt. Fixes: b9246b8fa280 ("net/ngbe: support link update") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/ngbe/ngbe_ethdev.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index 3ea7ed43ff..e7dc1c0f94 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -2186,6 +2186,19 @@ ngbe_dev_interrupt_get_status(struct rte_eth_dev *dev) struct ngbe_hw *hw = ngbe_dev_hw(dev); struct ngbe_interrupt *intr = ngbe_dev_intr(dev); + eicr = ((u32 *)hw->isb_mem)[NGBE_ISB_VEC0]; + if (!eicr) { + /* + * shared interrupt alert! + * make sure interrupts are enabled because the read will + * have disabled interrupts. + */ + if (!hw->adapter_stopped) + ngbe_enable_intr(dev); + return 0; + } + ((u32 *)hw->isb_mem)[NGBE_ISB_VEC0] = 0; + /* read-on-clear nic registers here */ eicr = ((u32 *)hw->isb_mem)[NGBE_ISB_MISC]; PMD_DRV_LOG(DEBUG, "eicr %x", eicr); From patchwork Mon Oct 28 02:31:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 147451 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1C46F45BE5; Mon, 28 Oct 2024 03:09:57 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D129A4067E; Mon, 28 Oct 2024 03:09:27 +0100 (CET) Received: from smtpbgeu1.qq.com (smtpbgeu1.qq.com [52.59.177.22]) by mails.dpdk.org (Postfix) with ESMTP id 65B2040A87; Mon, 28 Oct 2024 03:09:18 +0100 (CET) X-QQ-mid: bizesmtpsz8t1730081341tzs12g4 X-QQ-Originating-IP: b/AXkS/dK+BwLLmCQAMYE+CD3KojtZMfzn5NuNqv+R0= Received: from wxdbg.localdomain.com ( [36.24.66.21]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 28 Oct 2024 10:08:59 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 1418775142941140719 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH v2 13/13] net/ngbe: restrict configuration of VLAN strip offload Date: Mon, 28 Oct 2024 10:31:47 +0800 Message-Id: <20241028023147.60157-14-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241028023147.60157-1-jiawenwu@trustnetic.com> References: <20241023064836.2017879-1-jiawenwu@trustnetic.com> <20241028023147.60157-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-QQ-XMAILINFO: NkHKfw09D6j8SEZnsxRIX1w+zGk8AjgcvQI6RkhdS6MrHrCX4HN81F/1 WEpX4uRFXNwRy4aD3Chfi0+fAaGeaEJtVT9y0HuvTr+pCZBmyRVdzOIu4G3gnfzyKrTetVd xDIFJCTqRyQcKLW0M/v2448cZ4tc6P2X93wU8USYFsyvQJKZQUNyzjW1KqMFvyIqYs69c3k Cyg7iwSl2NH206eT3LcZwTJ1pT7aJ9Lc1nz3BhvNcMNMFtlHc1LXqPJM1EkYq2T5cpZ+ufn h5uk7NCGtKgeac+c7TyBaWfvU6R5BPVH5d6q3Ou6kFpLlQ4+HPsWc1e7/KEFvZWfHHWvGxr Ci6n28L+RjkcG9HvH22b1sBDXu4WDtK2eP+BmChqkm/Eeur5277OQGBYZ6PE+Rp9m8z8Jt9 oYwl+RXpbXsW1OLQOFldMGeob8GB9iY93orqa+kXasjsBC4Auu5AAm0b+IXxMWQAu2i9jlg oGuEHgOcG2oeGAMYvJ4ZZfb7pbN9rA73M1SV3GaWaww3pSiY90yuSIn5B8kHnAxvcYwg3bS FKXPWYX/xSYXwNzg5oWABpw3q+dbXFYjJ8eueoFWWhpOpMOToY5l4UhC/5DJ1SUk2UGGt8O I+tdY5mdlydARtT5xUymFAlyjD9co+tp174foVkM/pHw1z5y0zc0IRn+9tOzowPfHDVqPHk n5c7wMyRy+9vy1WPaXwr35qKdRYc+7KKlq3lYrYLmhCSlUPoUd8EGALGjJ7Ug2NRV4oLVW8 ww8Pz8eD3vYhhQZs9l1XGQa1kiXyDi9I1XFHffBSgZGThVA+5+oN7zKHbLkf4DCvOmqLIM+ 0EbtIcMaBD/EWkTk/CrXfeJL8aNb6ynCv5UWu3uMd/n4odwNMnw4Plr9OM0ql1nimbfkZsn 7496FZUWRlC3c0fTATp+/J7O7cF+6Zmrk+JottDPKKbVjUh1WxJCpKQ7buXzOLT4F/zpYkV xZHuz98+ymg14kvm9fXAjR1pdATcl4h7CZAG1F8YXarWtxmYgnVS8d2T2 X-QQ-XMRINFO: MPJ6Tf5t3I/ycC2BItcBVIA= X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org There is a hardware limitation that Rx ring config register is not writable when Rx ring is enabled, i.e. the NGBE_RXCFG_ENA bit is set. But disabling the ring when there is traffic will cause ring get stuck. So restrict the configuration of VLAN strip offload only if device is started. Fixes: 59b46438fdaa ("net/ngbe: support VLAN offload and VLAN filter") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/ngbe/ngbe_ethdev.c | 49 ++++++++++++++-------------------- 1 file changed, 20 insertions(+), 29 deletions(-) diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index e7dc1c0f94..eef31af233 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -586,41 +586,25 @@ ngbe_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) } static void -ngbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on) +ngbe_vlan_strip_q_set(struct rte_eth_dev *dev, uint16_t queue, int on) { - struct ngbe_hw *hw = ngbe_dev_hw(dev); - struct ngbe_rx_queue *rxq; - bool restart; - uint32_t rxcfg, rxbal, rxbah; - if (on) ngbe_vlan_hw_strip_enable(dev, queue); else ngbe_vlan_hw_strip_disable(dev, queue); +} - rxq = dev->data->rx_queues[queue]; - rxbal = rd32(hw, NGBE_RXBAL(rxq->reg_idx)); - rxbah = rd32(hw, NGBE_RXBAH(rxq->reg_idx)); - rxcfg = rd32(hw, NGBE_RXCFG(rxq->reg_idx)); - if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) { - restart = (rxcfg & NGBE_RXCFG_ENA) && - !(rxcfg & NGBE_RXCFG_VLAN); - rxcfg |= NGBE_RXCFG_VLAN; - } else { - restart = (rxcfg & NGBE_RXCFG_ENA) && - (rxcfg & NGBE_RXCFG_VLAN); - rxcfg &= ~NGBE_RXCFG_VLAN; - } - rxcfg &= ~NGBE_RXCFG_ENA; +static void +ngbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on) +{ + struct ngbe_hw *hw = ngbe_dev_hw(dev); - if (restart) { - /* set vlan strip for ring */ - ngbe_dev_rx_queue_stop(dev, queue); - wr32(hw, NGBE_RXBAL(rxq->reg_idx), rxbal); - wr32(hw, NGBE_RXBAH(rxq->reg_idx), rxbah); - wr32(hw, NGBE_RXCFG(rxq->reg_idx), rxcfg); - ngbe_dev_rx_queue_start(dev, queue); + if (!hw->adapter_stopped) { + PMD_DRV_LOG(ERR, "Please stop port first"); + return; } + + ngbe_vlan_strip_q_set(dev, queue, on); } static int @@ -846,9 +830,9 @@ ngbe_vlan_hw_strip_config(struct rte_eth_dev *dev) rxq = dev->data->rx_queues[i]; if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) - ngbe_vlan_hw_strip_enable(dev, i); + ngbe_vlan_strip_q_set(dev, i, 1); else - ngbe_vlan_hw_strip_disable(dev, i); + ngbe_vlan_strip_q_set(dev, i, 0); } } @@ -910,6 +894,13 @@ ngbe_vlan_offload_config(struct rte_eth_dev *dev, int mask) static int ngbe_vlan_offload_set(struct rte_eth_dev *dev, int mask) { + struct ngbe_hw *hw = ngbe_dev_hw(dev); + + if (!hw->adapter_stopped && (mask & RTE_ETH_VLAN_STRIP_MASK)) { + PMD_DRV_LOG(ERR, "Please stop port first"); + return -EPERM; + } + ngbe_config_vlan_strip_on_all_queues(dev, mask); ngbe_vlan_offload_config(dev, mask);