From patchwork Mon Nov 18 17:36:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 148585 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1B8FA45D39; Mon, 18 Nov 2024 18:36:23 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4E894410E7; Mon, 18 Nov 2024 18:36:22 +0100 (CET) Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) by mails.dpdk.org (Postfix) with ESMTP id B79AB4025E for ; Mon, 18 Nov 2024 18:36:18 +0100 (CET) Received: by mail-pf1-f176.google.com with SMTP id d2e1a72fcca58-71e681bc315so3142631b3a.0 for ; Mon, 18 Nov 2024 09:36:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1731951377; x=1732556177; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=4AlCxqBPtVrzsLq9U9XkwQuuvYwUcxhmr5HHKJJ/gOc=; b=amuYz+Q5qAYZUIbytznZYQiwmyUYOF9o9+8IearU8RClH8hH6yZw64eHMo5n95nu0g vuHGmS1Dog69FmmI4gJVbPRcfG9LH8lGFESHKNeXEl8MBUzwyvbXzDLl4h7hAE3Mzq2D 0uKI8QLopArEa6TccDmbPZG5T0FKkvIMMqfWE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731951377; x=1732556177; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4AlCxqBPtVrzsLq9U9XkwQuuvYwUcxhmr5HHKJJ/gOc=; b=ZcUDoyupcE+AYI8H7Ux9W1KE+C8F42wCk/grYdD8krcGRdwHRJttVrCim5PiovS6OO i1RQSGhW9u1Czs2OMwiyEblrvCEqRySfUHRILgq+ow41JE2VS1oTq5PfgLRt44UpYHX7 lZESNXzX4uUMhYn9evEp5gXBn+6hLRNcM6Lh3N6MeUIk0hF/plwNDo3IXglbHNhTMV0J 8S1sbPDJEld8jWIhcTLx+v17EpHCNw7vtTv1+q1HjW7UexzDfxLwAXM2f7BP/dIC4Z9f zh9YObBv1KHimAzzLO7jb1F/iAUmgidf4HGbDLcC3foU/mVhU61fQJ/iq0m5h/OfcAMu RpvQ== X-Gm-Message-State: AOJu0YxuOhDeB9SlHHwC/GgGLVpQCJobgch0aW2sKqr8gySQhWQP6Fq7 SYn8esXeTac/KTbUEg91ZS718qokHbZfZeQVPOPgzokBJ5rQFCgPLC9R+CGCO0pXkTEVJUN+Vq7 oqv0+mQmbTU7lklui6H4lfs6TujmFanpdnYlL5pVhYkP6GFtT5ejMjBUMN18L+TGZWrklQM37Wh /3INRoWIrlSrgtVV62/LkSVXo/KvXy X-Google-Smtp-Source: AGHT+IG0+4y+mi56PMBI/7uBhLf36DIa6RlxyFNwxwzhFHxJfztImZNs0TA+swQtlqllCNb7gCPlGA== X-Received: by 2002:a05:6a00:2ea9:b0:724:66cf:163f with SMTP id d2e1a72fcca58-724af8de538mr294870b3a.3.1731951377285; Mon, 18 Nov 2024 09:36:17 -0800 (PST) Received: from C02GC2QQMD6T.wifi.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-724771229d2sm6410438b3a.80.2024.11.18.09.36.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Nov 2024 09:36:16 -0800 (PST) From: Ajit Khaparde To: dev@dpdk.org Subject: [PATCH 1/3] net/bnxt: update HWRM API Date: Mon, 18 Nov 2024 09:36:11 -0800 Message-Id: <20241118173613.94224-2-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20241118173613.94224-1-ajit.khaparde@broadcom.com> References: <20241118173613.94224-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Update HWRM API to select ring profile. Signed-off-by: Ajit Khaparde --- drivers/net/bnxt/hsi_struct_def_dpdk.h | 71 +++++++++++++++++++++++++- 1 file changed, 69 insertions(+), 2 deletions(-) diff --git a/drivers/net/bnxt/hsi_struct_def_dpdk.h b/drivers/net/bnxt/hsi_struct_def_dpdk.h index 8f348c20fb..737bf2693b 100644 --- a/drivers/net/bnxt/hsi_struct_def_dpdk.h +++ b/drivers/net/bnxt/hsi_struct_def_dpdk.h @@ -15617,7 +15617,46 @@ struct hwrm_func_qcaps_output { * (SR-IOV) disabled or on a VF. */ uint32_t roce_vf_max_gid; - uint8_t unused_3[3]; + uint32_t flags_ext3; + /* + * When this bit is '1', firmware supports the driver using + * FUNC_CFG (or FUNC_VF_CFG) to decrease resource reservations + * while some resources are still allocated. An error is returned + * if the driver tries to set the reservation to be less than the + * number of allocated resources. + */ + #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_RM_RSV_WHILE_ALLOC_CAP \ + UINT32_C(0x1) + /* + * When this bit is '1', the PF requires an L2 filter to be + * allocated by the driver using HWRM_CFA_L2_FILTER_ALLOC after + * bringing the interface up, before traffic is sent. + */ + #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_REQUIRE_L2_FILTER \ + UINT32_C(0x2) + /* + * When set to 1, indicates the field max_roce_vfs in the structure + * is valid. If this bit is 0, the driver should not use the + * 'max_roce_vfs' field. + */ + #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_MAX_ROCE_VFS_SUPPORTED \ + UINT32_C(0x4) + /* + * When set to 1, indicates the field 'rx_rate_profile_sel' in + * RING_ALLOC can specify a valid RX rate profile when allocating + * RX or RX aggregation rings. If this bit is 0, the driver + * should not use the 'rx_rate_profile_sel' field. + */ + #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_RX_RATE_PROFILE_SEL_SUPPORTED \ + UINT32_C(0x8) + /* + * The number of VFs that can be used for RoCE on the function. If less + * than max_vfs, roce vfs will be assigned to the first VF of the + * function and be contiguous. + * This is valid only on the PF with SR-IOV and RDMA enabled. + */ + uint16_t max_roce_vfs; + uint8_t unused_3[5]; /* * This field is used in Output records to indicate that the output * is completely written to RAM. This field should be read as '1' @@ -45026,6 +45065,14 @@ struct hwrm_ring_alloc_input { */ #define HWRM_RING_ALLOC_INPUT_ENABLES_STEERING_TAG_VALID \ UINT32_C(0x800) + /* + * This bit must be '1' for the rx_rate_profile_sel field to + * be configured. This should only be used when + * 'rx_rate_profile_sel_supported' bit is set in flags_ext3 + * field of FUNC_QCAPS response. + */ + #define HWRM_RING_ALLOC_INPUT_ENABLES_RX_RATE_PROFILE_VALID \ + UINT32_C(0x1000) /* Ring Type. */ uint8_t ring_type; /* L2 Completion Ring (CR) */ @@ -45362,7 +45409,27 @@ struct hwrm_ring_alloc_input { #define HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_PRIMATE UINT32_C(0x4) #define HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_LAST \ HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_PRIMATE - uint8_t unused_4[2]; + /* RX rate profile select */ + uint8_t rx_rate_profile_sel; + /* + * Indicate default RX rate profile when allocating + * RX or RX aggregation rings. This should only be + * used when 'rx_rate_profile_sel_supported' bit is + * set in flags_ext3 field of FUNC_QCAPS response. + */ + #define HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_DEFAULT \ + UINT32_C(0x0) + /* + * Indicate poll_mode RX rate profile when allocating + * RX or RX aggregation rings. This should only be + * used when 'rx_rate_profile_sel_supported' bit is + * set in flags_ext3 field of FUNC_QCAPS response. + */ + #define HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_POLL_MODE \ + UINT32_C(0x1) + #define HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_LAST \ + HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_POLL_MODE + uint8_t unused_4; /* * The cq_handle is specified when allocating a completion ring. For * devices that support NQs, this cq_handle will be included in the From patchwork Mon Nov 18 17:36:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 148586 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F0FB445D39; Mon, 18 Nov 2024 18:36:28 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6B2BB410FB; Mon, 18 Nov 2024 18:36:23 +0100 (CET) Received: from mail-pg1-f181.google.com (mail-pg1-f181.google.com [209.85.215.181]) by mails.dpdk.org (Postfix) with ESMTP id 3AAA4410D4 for ; Mon, 18 Nov 2024 18:36:20 +0100 (CET) Received: by mail-pg1-f181.google.com with SMTP id 41be03b00d2f7-7ea8de14848so1830134a12.2 for ; Mon, 18 Nov 2024 09:36:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1731951379; x=1732556179; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FspJsoOE3JTM61D0JHSzFeo7osLzbLtdyOF0dJ9SyYA=; b=GhORzTpK7fPnyg2VKGpZpeIl0VdRxM1O+y1xq4nyx5azvk6hKJgLP4JKybrBqahad5 tB6/LcmQGXuXbtgvZbssnmLQFJO31V5E8yKK2oS0Dz1hnGmdI/mLslsVqOoa+CGs/q4H EwMT/CZLhF47D9H6AwA6pw4iN4qTjx5b1f/Uk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731951379; x=1732556179; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FspJsoOE3JTM61D0JHSzFeo7osLzbLtdyOF0dJ9SyYA=; b=KDe3wO3Uz2iKxWyO3ic1UFkVwKFaTmi44haCnYn1KtLp6PQAv4Gatlj2CUV6ImV2wT GB9ZpJFLTOK8zD41uijT8cxBVXcAveMN4OGZc6Dn4+KX9W2DID1zhNjzYcPw2/bpwwCI dAJR3ExxBC+miYGk1BUBZujyzLkCgv2tLEk/kmsesdiY3Adap85ThYxieuhNNoTsDhoQ E9fNHSQSVR20BxKQsKIZNTQl0TbztIRFSWN45EWK3+OXcOuaJ3YiFJ1/K9+a1Fjfce8s nSet7fNxDEMs/kQAGZm0Krgr7ekMDnGPxOqg6+VRttv5DXBuS7J84vJ7n63DzVmamOvU JRpA== X-Gm-Message-State: AOJu0YwSkpoj4CtfSv3TooMQ2VkSqA8xdU20SgI1qIvL+5uzQWzR7xUT 56yaJ3zs1pEqqtn+bqoyw+iPsdvGSBDAYV+jX5i7vIp7fedeV8F4vfoBGvsU625nrlzITImzj4A rKC7aajpfTTPf/FWzaLSokQDIfOXga0WoB5YyD04o6QDcgpj/jI96S9zd+9Z07Aic1nFZhCplmX HWsh+nKtVweRqM9XMStsvyTS9d8H1k X-Google-Smtp-Source: AGHT+IFA6ypd37Gi8h+VaQC/USAmkxeooTVkbcoDJKKliPOuJsDcb8WaWHq4aNcifrvuOZQ3qoTtXQ== X-Received: by 2002:a05:6a20:2447:b0:1db:de38:294b with SMTP id adf61e73a8af0-1dc90c1a822mr21156260637.38.1731951378757; Mon, 18 Nov 2024 09:36:18 -0800 (PST) Received: from C02GC2QQMD6T.wifi.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-724771229d2sm6410438b3a.80.2024.11.18.09.36.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Nov 2024 09:36:17 -0800 (PST) From: Ajit Khaparde To: dev@dpdk.org Cc: Andy Gospodarek Subject: [PATCH 2/3] net/bnxt: add support for Rx profile selection Date: Mon, 18 Nov 2024 09:36:12 -0800 Message-Id: <20241118173613.94224-3-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20241118173613.94224-1-ajit.khaparde@broadcom.com> References: <20241118173613.94224-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Some firmware versions can support the selection of Rx profile during Rx and AGG ring allocation. Check if the firmware sets the HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_RX_RATE_PROFILE_SEL_SUPPORTED flag and set the new Rx profile. Signed-off-by: Ajit Khaparde Reviewed-by: Andy Gospodarek --- drivers/net/bnxt/bnxt.h | 1 + drivers/net/bnxt/bnxt_hwrm.c | 15 ++++++++++++++- 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index 771349de6c..0402de3eb9 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -866,6 +866,7 @@ struct bnxt { #define BNXT_FW_CAP_TX_COAL_CMPL BIT(10) #define BNXT_FW_CAP_RX_ALL_PKT_TS BIT(11) #define BNXT_FW_CAP_BACKING_STORE_V2 BIT(12) +#define BNXT_FW_CAP_RX_RATE_PROFILE BIT(17) #define BNXT_FW_BACKING_STORE_V2_EN(bp) \ ((bp)->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2) #define BNXT_FW_BACKING_STORE_V1_EN(bp) \ diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 351effb28f..d015ba2b9c 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -1139,8 +1139,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp) int rc = 0; struct hwrm_func_qcaps_input req = {.req_type = 0 }; struct hwrm_func_qcaps_output *resp = bp->hwrm_cmd_resp_addr; + uint32_t flags, flags_ext2, flags_ext3; uint16_t new_max_vfs; - uint32_t flags, flags_ext2; HWRM_PREP(&req, HWRM_FUNC_QCAPS, BNXT_USE_CHIMP_MB); @@ -1153,6 +1153,7 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp) bp->max_ring_grps = rte_le_to_cpu_32(resp->max_hw_ring_grps); flags = rte_le_to_cpu_32(resp->flags); flags_ext2 = rte_le_to_cpu_32(resp->flags_ext2); + flags_ext3 = rte_le_to_cpu_32(resp->flags_ext3); if (BNXT_PF(bp)) { bp->pf->port_id = resp->port_id; @@ -1259,6 +1260,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp) bp->fw_cap |= BNXT_FW_CAP_RX_ALL_PKT_TS; if (flags_ext2 & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT2_UDP_GSO_SUPPORTED) bp->fw_cap |= BNXT_FW_CAP_UDP_GSO; + if (flags_ext3 & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_RX_RATE_PROFILE_SEL_SUPPORTED) + bp->fw_cap |= BNXT_FW_CAP_RX_RATE_PROFILE; unlock: HWRM_UNLOCK(); @@ -2227,6 +2230,11 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp, if (stats_ctx_id != INVALID_STATS_CTX_ID) enables |= HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID; + if (bp->fw_cap & BNXT_FW_CAP_RX_RATE_PROFILE) { + req.rx_rate_profile_sel = + HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_POLL_MODE; + enables |= HWRM_RING_ALLOC_INPUT_ENABLES_RX_RATE_PROFILE_VALID; + } break; case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL: req.ring_type = ring_type; @@ -2257,6 +2265,11 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp, enables |= HWRM_RING_ALLOC_INPUT_ENABLES_RX_RING_ID_VALID | HWRM_RING_ALLOC_INPUT_ENABLES_RX_BUF_SIZE_VALID | HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID; + if (bp->fw_cap & BNXT_FW_CAP_RX_RATE_PROFILE) { + req.rx_rate_profile_sel = + HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_POLL_MODE; + enables |= HWRM_RING_ALLOC_INPUT_ENABLES_RX_RATE_PROFILE_VALID; + } break; default: PMD_DRV_LOG_LINE(ERR, "hwrm alloc invalid ring type %d", From patchwork Mon Nov 18 17:36:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 148587 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 13C4845D39; Mon, 18 Nov 2024 18:36:35 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9ADBF42793; Mon, 18 Nov 2024 18:36:24 +0100 (CET) Received: from mail-pf1-f178.google.com (mail-pf1-f178.google.com [209.85.210.178]) by mails.dpdk.org (Postfix) with ESMTP id 5257E410E8 for ; Mon, 18 Nov 2024 18:36:22 +0100 (CET) Received: by mail-pf1-f178.google.com with SMTP id d2e1a72fcca58-723db2798caso3599042b3a.0 for ; Mon, 18 Nov 2024 09:36:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1731951380; x=1732556180; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KpxaAyZkeN5QwpyYJHHOafW1ARq+GKp78+gzjz1zjMQ=; b=OprwAWAQp0Sk8V6MeoOU/pII89ZwfTbNmTJlCu45H63TVcP7LTZo+5rc1dAlwySK5q 71m1GVE0M4HupdgzB1AjOQeRBX89R+0+8At9GvHXyX4YQtEAAjn4Ti1QRSunK9ftd/zf W7aN9x0bgBCmTVnZ+VdidkNhwAwS6EZvi8LDU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731951380; x=1732556180; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KpxaAyZkeN5QwpyYJHHOafW1ARq+GKp78+gzjz1zjMQ=; b=WwJATUoNaLnzdVtzL1/6srDCdNfxYupOy6yyMH7wokcLljDauo3ll3yrMFsV2UWgKy HXcUxelvvX4JfZGOXx2TnueFW8bUaRXx5UlKNSxdo54fTI0ZtsGong2PcoQjhMz8O0mT ucdLFdP7j8OO8rARXf/zz5RSVJPaW7U2D1EkVJW3K7FVoJ70oCrZag+bZ8GZL9n9UCV8 Thh1sCLAWYkuHE/NiRfH2IGxQeBU4OO+rdnrJs1liPeomBz23vd6PTzv0fcXB7Xz5szc lsLqBUkDgeX8asFHB9pHVlG277/Q0E2Eun2CyfaMOhmdHuv56rAFrQzK3SnhcNd8jd4L u3/w== X-Gm-Message-State: AOJu0YwMLLpd34c102qWndhikKxsIc2FUu4YOsyRR+1+TgzyVhNdYcVU wyx1utQBSXHK0TMfv3csrcFCBnAvs22Oz1DrfM/aF6pCNqwi2Bzth8M3JXgNp9aX3gEEbG1CQ/7 wt7B5AkCOCXOhXCdxixMNdvD76cmvVtJgBeuvKTx2kHhDFXVYtt9Cujgt7e5peOwqaa1jeTEYwn ALQSKe6Icn6HjbMtJY1dso7cwwDb8p X-Google-Smtp-Source: AGHT+IG6nur2C7v6BPpVn+o3UvHzrQfSZVLIacPQ/937dfuDowlCIbJp6qPWQejN8T5eO0nyT5szAw== X-Received: by 2002:a05:6a00:3a14:b0:71e:755c:6dad with SMTP id d2e1a72fcca58-72476b72566mr16631788b3a.5.1731951379975; Mon, 18 Nov 2024 09:36:19 -0800 (PST) Received: from C02GC2QQMD6T.wifi.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-724771229d2sm6410438b3a.80.2024.11.18.09.36.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Nov 2024 09:36:19 -0800 (PST) From: Ajit Khaparde To: dev@dpdk.org Cc: Kishore Padmanabha Subject: [PATCH 3/3] net/bnxt: set max VFs count for P7 Date: Mon, 18 Nov 2024 09:36:13 -0800 Message-Id: <20241118173613.94224-4-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20241118173613.94224-1-ajit.khaparde@broadcom.com> References: <20241118173613.94224-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The number of max VFs per PF is 128 for P7 devices. Cap the vnic hash table creation if the number of max VNICs is less than 8. Signed-off-by: Kishore Padmanabha Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/bnxt.h | 1 + drivers/net/bnxt/bnxt_vnic.c | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index 0402de3eb9..b8b0ecc7e7 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -260,6 +260,7 @@ struct bnxt_pf_info { #define BNXT_MAX_VFS(bp) ((bp)->pf->max_vfs) #define BNXT_MAX_VF_REPS_P4 64 #define BNXT_MAX_VF_REPS_P5 256 +#define BNXT_MAX_VF_REPS_P7 128 #define BNXT_MAX_VF_REPS(bp) \ (BNXT_CHIP_P5(bp) ? BNXT_MAX_VF_REPS_P5 : \ BNXT_MAX_VF_REPS_P4) diff --git a/drivers/net/bnxt/bnxt_vnic.c b/drivers/net/bnxt/bnxt_vnic.c index 7b028f2ee5..4b5ac84d70 100644 --- a/drivers/net/bnxt/bnxt_vnic.c +++ b/drivers/net/bnxt/bnxt_vnic.c @@ -978,6 +978,12 @@ int32_t bnxt_vnic_queue_db_init(struct bnxt *bp) hash_tbl_params.name = hash_tbl_name; hash_tbl_params.entries = (bp->max_vnics > BNXT_VNIC_MAX_SUPPORTED_ID) ? BNXT_VNIC_MAX_SUPPORTED_ID : bp->max_vnics; + + /* if the number of max vnics is less than bucket size */ + /* then let the max entries size be the least value */ + if (hash_tbl_params.entries <= RTE_HASH_BUCKET_ENTRIES) + hash_tbl_params.entries = RTE_HASH_BUCKET_ENTRIES; + hash_tbl_params.key_len = BNXT_VNIC_MAX_QUEUE_SZ_IN_8BITS; hash_tbl_params.socket_id = rte_socket_id(); bp->vnic_queue_db.rss_q_db = rte_hash_create(&hash_tbl_params);