From patchwork Thu Apr 18 13:15:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ori Kam X-Patchwork-Id: 52933 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 875541BA5A; Thu, 18 Apr 2019 15:16:24 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 6DB6E1B9E7 for ; Thu, 18 Apr 2019 15:16:20 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Apr 2019 16:16:13 +0300 Received: from pegasus03.mtr.labs.mlnx (pegasus03.mtr.labs.mlnx [10.210.16.124]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3IDGDS7003631; Thu, 18 Apr 2019 16:16:13 +0300 From: Ori Kam To: yskoh@mellanox.com, shahafs@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com, motih@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Thu, 18 Apr 2019 13:15:59 +0000 Message-Id: <1555593367-144772-2-git-send-email-orika@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1555593367-144772-1-git-send-email-orika@mellanox.com> References: <1555276357-4892-1-git-send-email-orika@mellanox.com> <1555593367-144772-1-git-send-email-orika@mellanox.com> Subject: [dpdk-dev] [PATCH v3 1/9] net/mlx5: fix translate vport function name X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Modify the translate vport function to match other translate items naming convestions. Fixes: 0fe3f18f78d8 ("net/mlx5: add source vport match to the ingress rules") Cc: viacheslavo@mellanox.com Signed-off-by: Ori Kam Acked-by: Yongseok Koh --- drivers/net/mlx5/mlx5_flow_dv.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 04ab3d6..1e25e0b 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -3087,8 +3087,8 @@ struct field_modify_info modify_tcp[] = { * Mask */ static void -flow_dv_translate_source_vport(void *matcher, void *key, - int16_t port, uint16_t mask) +flow_dv_translate_item_source_vport(void *matcher, void *key, + int16_t port, uint16_t mask) { void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters); void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters); @@ -3492,10 +3492,10 @@ struct field_modify_info modify_tcp[] = { * Add matching on source vport index only * for ingress rules in E-Switch configurations. */ - flow_dv_translate_source_vport(matcher.mask.buf, - dev_flow->dv.value.buf, - priv->vport_id, - 0xffff); + flow_dv_translate_item_source_vport(matcher.mask.buf, + dev_flow->dv.value.buf, + priv->vport_id, + 0xffff); } for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); From patchwork Thu Apr 18 13:16:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ori Kam X-Patchwork-Id: 52941 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2B6D11BB14; Thu, 18 Apr 2019 15:16:42 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 82A671BA59 for ; Thu, 18 Apr 2019 15:16:20 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Apr 2019 16:16:13 +0300 Received: from pegasus03.mtr.labs.mlnx (pegasus03.mtr.labs.mlnx [10.210.16.124]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3IDGDS8003631; Thu, 18 Apr 2019 16:16:13 +0300 From: Ori Kam To: yskoh@mellanox.com, shahafs@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com, motih@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Thu, 18 Apr 2019 13:16:00 +0000 Message-Id: <1555593367-144772-3-git-send-email-orika@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1555593367-144772-1-git-send-email-orika@mellanox.com> References: <1555276357-4892-1-git-send-email-orika@mellanox.com> <1555593367-144772-1-git-send-email-orika@mellanox.com> Subject: [dpdk-dev] [PATCH v3 2/9] net/mlx5: fix meson build for Direct Rules X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The meson build was missing the define for Direct Rules. Fixes: 4f84a19779ca ("net/mlx5: add Direct Rules API") Cc: orika@mellanox.com Signed-off-by: Ori Kam Acked-by: Yongseok Koh --- drivers/net/mlx5/meson.build | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/mlx5/meson.build b/drivers/net/mlx5/meson.build index a4c684e..0037e15 100644 --- a/drivers/net/mlx5/meson.build +++ b/drivers/net/mlx5/meson.build @@ -111,6 +111,8 @@ if build 'mlx5dv_devx_obj_create' ], [ 'HAVE_IBV_FLOW_DEVX_COUNTERS', 'infiniband/mlx5dv.h', 'MLX5DV_FLOW_ACTION_COUNTERS_DEVX' ], + [ 'HAVE_MLX5DV_DR', 'infiniband/mlx5dv.h', + 'MLX5DV_DR_NS_TYPE_TERMINATING' ], [ 'HAVE_SUPPORTED_40000baseKR4_Full', 'linux/ethtool.h', 'SUPPORTED_40000baseKR4_Full' ], [ 'HAVE_SUPPORTED_40000baseCR4_Full', 'linux/ethtool.h', From patchwork Thu Apr 18 13:16:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ori Kam X-Patchwork-Id: 52936 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DEA1D1BAA0; Thu, 18 Apr 2019 15:16:31 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 6FFF81B9EC for ; Thu, 18 Apr 2019 15:16:20 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Apr 2019 16:16:14 +0300 Received: from pegasus03.mtr.labs.mlnx (pegasus03.mtr.labs.mlnx [10.210.16.124]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3IDGDS9003631; Thu, 18 Apr 2019 16:16:13 +0300 From: Ori Kam To: yskoh@mellanox.com, shahafs@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com, motih@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Thu, 18 Apr 2019 13:16:01 +0000 Message-Id: <1555593367-144772-4-git-send-email-orika@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1555593367-144772-1-git-send-email-orika@mellanox.com> References: <1555276357-4892-1-git-send-email-orika@mellanox.com> <1555593367-144772-1-git-send-email-orika@mellanox.com> Subject: [dpdk-dev] [PATCH v3 3/9] net/mlx5: add Direct Rules E-Switch support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This commit checks the for DR E-Switch support. The support is based on both Device and Kernel. This commit also enables the user to manualy disable this this feature. Signed-off-by: Ori Kam Acked-by: Yongseok Koh --- v3: * Add comment to fdb_tbl --- drivers/net/mlx5/Makefile | 5 + drivers/net/mlx5/meson.build | 2 + drivers/net/mlx5/mlx5.c | 53 +++++- drivers/net/mlx5/mlx5.h | 13 ++ drivers/net/mlx5/mlx5_devx_cmds.c | 44 +++++ drivers/net/mlx5/mlx5_flow.c | 2 +- drivers/net/mlx5/mlx5_prm.h | 328 ++++++++++++++++++++++++++++++++++++++ 7 files changed, 441 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/Makefile b/drivers/net/mlx5/Makefile index 93bc869..2b72a33 100644 --- a/drivers/net/mlx5/Makefile +++ b/drivers/net/mlx5/Makefile @@ -161,6 +161,11 @@ mlx5_autoconf.h.new: $(RTE_SDK)/buildtools/auto-config-h.sh enum MLX5DV_DR_NS_TYPE_TERMINATING \ $(AUTOCONF_OUTPUT) $Q sh -- '$<' '$@' \ + HAVE_MLX5DV_DR_ESWITCH \ + infiniband/mlx5dv.h \ + enum MLX5DV_DR_NS_DOMAIN_FDB_BYPASS \ + $(AUTOCONF_OUTPUT) + $Q sh -- '$<' '$@' \ HAVE_IBV_DEVX_OBJ \ infiniband/mlx5dv.h \ func mlx5dv_devx_obj_create \ diff --git a/drivers/net/mlx5/meson.build b/drivers/net/mlx5/meson.build index 0037e15..9dfd28d 100644 --- a/drivers/net/mlx5/meson.build +++ b/drivers/net/mlx5/meson.build @@ -113,6 +113,8 @@ if build 'MLX5DV_FLOW_ACTION_COUNTERS_DEVX' ], [ 'HAVE_MLX5DV_DR', 'infiniband/mlx5dv.h', 'MLX5DV_DR_NS_TYPE_TERMINATING' ], + [ 'HAVE_MLX5DV_DR_ESWITCH', 'infiniband/mlx5dv.h', + 'MLX5DV_DR_NS_DOMAIN_FDB_BYPASS' ], [ 'HAVE_SUPPORTED_40000baseKR4_Full', 'linux/ethtool.h', 'SUPPORTED_40000baseKR4_Full' ], [ 'HAVE_SUPPORTED_40000baseCR4_Full', 'linux/ethtool.h', diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 9ff50df..ff24e1d 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -101,6 +101,9 @@ /* Allow L3 VXLAN flow creation. */ #define MLX5_L3_VXLAN_EN "l3_vxlan_en" +/* Activate DV E-Switch flow steering. */ +#define MLX5_DV_ESW_EN "dv_esw_en" + /* Activate DV flow steering. */ #define MLX5_DV_FLOW_EN "dv_flow_en" @@ -344,6 +347,18 @@ struct mlx5_dev_spawn_data { } pthread_mutex_init(&sh->dv_mutex, NULL); sh->tx_ns = ns; +#ifdef HAVE_MLX5DV_DR_ESWITCH + if (priv->config.dv_esw_en) { + ns = mlx5_glue->dr_create_ns(sh->ctx, + MLX5DV_DR_NS_DOMAIN_FDB_BYPASS); + if (!ns) { + DRV_LOG(ERR, "FDB mlx5dv_dr_create_ns failed"); + err = errno; + goto error; + } + sh->fdb_ns = ns; + } +#endif sh->dv_refcnt++; priv->dr_shared = 1; return 0; @@ -358,6 +373,10 @@ struct mlx5_dev_spawn_data { mlx5dv_dr_destroy_ns(sh->tx_ns); sh->tx_ns = NULL; } + if (sh->fdb_ns) { + mlx5_glue->dr_destroy_ns(sh->fdb_ns); + sh->fdb_ns = NULL; + } return err; #else (void)priv; @@ -393,6 +412,12 @@ struct mlx5_dev_spawn_data { mlx5dv_dr_destroy_ns(sh->tx_ns); sh->tx_ns = NULL; } +#ifdef HAVE_MLX5DV_DR_ESWITCH + if (sh->fdb_ns) { + mlx5_glue->dr_destroy_ns(sh->fdb_ns); + sh->fdb_ns = NULL; + } +#endif pthread_mutex_destroy(&sh->dv_mutex); #else (void)priv; @@ -861,6 +886,8 @@ struct mlx5_dev_spawn_data { config->l3_vxlan_en = !!tmp; } else if (strcmp(MLX5_VF_NL_EN, key) == 0) { config->vf_nl_en = !!tmp; + } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) { + config->dv_esw_en = !!tmp; } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) { config->dv_flow_en = !!tmp; } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) { @@ -905,6 +932,7 @@ struct mlx5_dev_spawn_data { MLX5_RX_VEC_EN, MLX5_L3_VXLAN_EN, MLX5_VF_NL_EN, + MLX5_DV_ESW_EN, MLX5_DV_FLOW_EN, MLX5_MR_EXT_MEMSEG_EN, MLX5_REPRESENTOR, @@ -1458,11 +1486,6 @@ struct mlx5_dev_spawn_data { priv->tcf_context = NULL; } } - if (config.dv_flow_en) { - err = mlx5_alloc_shared_dr(priv); - if (err) - goto error; - } TAILQ_INIT(&priv->flows); TAILQ_INIT(&priv->ctrl_flows); /* Hint libmlx5 to use PMD allocator for data plane resources */ @@ -1484,8 +1507,27 @@ struct mlx5_dev_spawn_data { * Verbs context returned by ibv_open_device(). */ mlx5_link_update(eth_dev, 0); +#ifdef HAVE_IBV_DEVX_OBJ + err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr); + if (err) { + err = -err; + goto error; + } +#endif +#ifdef HAVE_MLX5DV_DR_ESWITCH + if (!(config.hca_attr.eswitch_manager && config.dv_flow_en && + (switch_info->representor || switch_info->master))) + config.dv_esw_en = 0; +#else + config.dv_esw_en = 0; +#endif /* Store device configuration on private structure. */ priv->config = config; + if (config.dv_flow_en) { + err = mlx5_alloc_shared_dr(priv); + if (err) + goto error; + } /* Supported Verbs flow priority number detection. */ err = mlx5_flow_discover_priorities(eth_dev); if (err < 0) { @@ -1876,6 +1918,7 @@ struct mlx5_dev_spawn_data { .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN, .min_rxqs_num = MLX5_MPRQ_MIN_RXQS, }, + .dv_esw_en = 1, }; /* Device specific configuration. */ switch (pci_dev->id.device_id) { diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 14c7f3c..f20e589 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -138,6 +138,11 @@ struct mlx5_devx_counter_set { int id; /* Flow counter ID */ }; +/* HCA attributes. */ +struct mlx5_hca_attr { + uint32_t eswitch_manager:1; +}; + /* Flow list . */ TAILQ_HEAD(mlx5_flows, rte_flow); @@ -171,6 +176,7 @@ struct mlx5_dev_config { /* Whether memseg should be extended for MR creation. */ unsigned int l3_vxlan_en:1; /* Enable L3 VXLAN flow creation. */ unsigned int vf_nl_en:1; /* Enable Netlink requests in VF mode. */ + unsigned int dv_esw_en:1; /* Enable E-Switch DV flow. */ unsigned int dv_flow_en:1; /* Enable DV flow. */ unsigned int swp:1; /* Tx generic tunnel checksum and TSO offload. */ unsigned int devx:1; /* Whether devx interface is available or not. */ @@ -192,6 +198,7 @@ struct mlx5_dev_config { int txqs_inline; /* Queue number threshold for inlining. */ int txqs_vec; /* Queue number threshold for vectorized Tx. */ int inline_max_packet_sz; /* Max packet size for inlining. */ + struct mlx5_hca_attr hca_attr; /* HCA attributes. */ }; /** @@ -241,6 +248,7 @@ struct mlx5_flow_tbl_resource { }; #define MLX5_MAX_TABLES 1024 +#define MLX5_MAX_TABLES_FDB 32 #define MLX5_GROUP_FACTOR 1 /* @@ -260,6 +268,9 @@ struct mlx5_ibv_shared { /* Shared DV/DR flow data section. */ pthread_mutex_t dv_mutex; /* DV context mutex. */ uint32_t dv_refcnt; /* DV/DR data reference counter. */ + void *fdb_ns; /* FDB Direct Rules name space handle. */ + struct mlx5_flow_tbl_resource fdb_tbl[MLX5_MAX_TABLES_FDB]; + /* FDB Direct Rules tables. */ void *rx_ns; /* RX Direct Rules name space handle. */ struct mlx5_flow_tbl_resource rx_tbl[MLX5_MAX_TABLES]; /* RX Direct Rules tables. */ @@ -539,4 +550,6 @@ int mlx5_devx_cmd_flow_counter_alloc(struct ibv_context *ctx, int mlx5_devx_cmd_flow_counter_query(struct mlx5_devx_counter_set *dcx, int clear, uint64_t *pkts, uint64_t *bytes); +int mlx5_devx_cmd_query_hca_attr(struct ibv_context *ctx, + struct mlx5_hca_attr *attr); #endif /* RTE_PMD_MLX5_H_ */ diff --git a/drivers/net/mlx5/mlx5_devx_cmds.c b/drivers/net/mlx5/mlx5_devx_cmds.c index a9dff58..e5776c4 100644 --- a/drivers/net/mlx5/mlx5_devx_cmds.c +++ b/drivers/net/mlx5/mlx5_devx_cmds.c @@ -105,3 +105,47 @@ int mlx5_devx_cmd_flow_counter_free(struct mlx5dv_devx_obj *obj) *bytes = MLX5_GET64(traffic_counter, stats, octets); return 0; } + +/** + * Query HCA attributes. + * Using those attributes we can check on run time if the device + * is having the required capabilities. + * + * @param[in] ctx + * ibv contexts returned from mlx5dv_open_device. + * @param[out] attr + * Attributes device values. + * + * @return + * 0 on success, a negative value otherwise. + */ +int +mlx5_devx_cmd_query_hca_attr(struct ibv_context *ctx, + struct mlx5_hca_attr *attr) +{ + uint32_t in[MLX5_ST_SZ_DW(query_hca_cap_in)] = {0}; + uint32_t out[MLX5_ST_SZ_DW(query_hca_cap_out)] = {0}; + void *hcattr; + int status, syndrome, rc; + + MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP); + MLX5_SET(query_hca_cap_in, in, op_mod, + MLX5_GET_HCA_CAP_OP_MOD_GENERAL_DEVICE | + MLX5_HCA_CAP_OPMOD_GET_CUR); + + rc = mlx5_glue->devx_general_cmd(ctx, + in, sizeof(in), out, sizeof(out)); + if (rc) + return rc; + status = MLX5_GET(query_hca_cap_out, out, status); + syndrome = MLX5_GET(query_hca_cap_out, out, syndrome); + if (status) { + DRV_LOG(DEBUG, "Failed to query devx HCA capabilities, " + "status %x, syndrome = %x", + status, syndrome); + return -1; + } + hcattr = MLX5_ADDR_OF(query_hca_cap_out, out, capability); + attr->eswitch_manager = MLX5_GET(cmd_hca_cap, hcattr, eswitch_manager); + return 0; +} diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index a0683ee..b1effda 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -1784,7 +1784,7 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, struct mlx5_priv *priv = dev->data->dev_private; enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX; - if (attr->transfer) + if (attr->transfer && !priv->config.dv_esw_en) type = MLX5_FLOW_TYPE_TCF; else type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : diff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h index b15266f..8c42380 100644 --- a/drivers/net/mlx5/mlx5_prm.h +++ b/drivers/net/mlx5/mlx5_prm.h @@ -529,6 +529,7 @@ enum { }; enum { + MLX5_CMD_OP_QUERY_HCA_CAP = 0x100, MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939, MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b, }; @@ -591,6 +592,333 @@ struct mlx5_ifc_query_flow_counter_in_bits { u8 flow_counter_id[0x20]; }; +enum { + MLX5_GET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0 << 1, + MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP = 0xc << 1, +}; + +enum { + MLX5_HCA_CAP_OPMOD_GET_MAX = 0, + MLX5_HCA_CAP_OPMOD_GET_CUR = 1, +}; + +struct mlx5_ifc_cmd_hca_cap_bits { + u8 reserved_at_0[0x30]; + u8 vhca_id[0x10]; + u8 reserved_at_40[0x40]; + u8 log_max_srq_sz[0x8]; + u8 log_max_qp_sz[0x8]; + u8 reserved_at_90[0xb]; + u8 log_max_qp[0x5]; + u8 reserved_at_a0[0xb]; + u8 log_max_srq[0x5]; + u8 reserved_at_b0[0x10]; + u8 reserved_at_c0[0x8]; + u8 log_max_cq_sz[0x8]; + u8 reserved_at_d0[0xb]; + u8 log_max_cq[0x5]; + u8 log_max_eq_sz[0x8]; + u8 reserved_at_e8[0x2]; + u8 log_max_mkey[0x6]; + u8 reserved_at_f0[0x8]; + u8 dump_fill_mkey[0x1]; + u8 reserved_at_f9[0x3]; + u8 log_max_eq[0x4]; + u8 max_indirection[0x8]; + u8 fixed_buffer_size[0x1]; + u8 log_max_mrw_sz[0x7]; + u8 force_teardown[0x1]; + u8 reserved_at_111[0x1]; + u8 log_max_bsf_list_size[0x6]; + u8 umr_extended_translation_offset[0x1]; + u8 null_mkey[0x1]; + u8 log_max_klm_list_size[0x6]; + u8 reserved_at_120[0xa]; + u8 log_max_ra_req_dc[0x6]; + u8 reserved_at_130[0xa]; + u8 log_max_ra_res_dc[0x6]; + u8 reserved_at_140[0xa]; + u8 log_max_ra_req_qp[0x6]; + u8 reserved_at_150[0xa]; + u8 log_max_ra_res_qp[0x6]; + u8 end_pad[0x1]; + u8 cc_query_allowed[0x1]; + u8 cc_modify_allowed[0x1]; + u8 start_pad[0x1]; + u8 cache_line_128byte[0x1]; + u8 reserved_at_165[0xa]; + u8 qcam_reg[0x1]; + u8 gid_table_size[0x10]; + u8 out_of_seq_cnt[0x1]; + u8 vport_counters[0x1]; + u8 retransmission_q_counters[0x1]; + u8 debug[0x1]; + u8 modify_rq_counter_set_id[0x1]; + u8 rq_delay_drop[0x1]; + u8 max_qp_cnt[0xa]; + u8 pkey_table_size[0x10]; + u8 vport_group_manager[0x1]; + u8 vhca_group_manager[0x1]; + u8 ib_virt[0x1]; + u8 eth_virt[0x1]; + u8 vnic_env_queue_counters[0x1]; + u8 ets[0x1]; + u8 nic_flow_table[0x1]; + u8 eswitch_manager[0x1]; + u8 device_memory[0x1]; + u8 mcam_reg[0x1]; + u8 pcam_reg[0x1]; + u8 local_ca_ack_delay[0x5]; + u8 port_module_event[0x1]; + u8 enhanced_error_q_counters[0x1]; + u8 ports_check[0x1]; + u8 reserved_at_1b3[0x1]; + u8 disable_link_up[0x1]; + u8 beacon_led[0x1]; + u8 port_type[0x2]; + u8 num_ports[0x8]; + u8 reserved_at_1c0[0x1]; + u8 pps[0x1]; + u8 pps_modify[0x1]; + u8 log_max_msg[0x5]; + u8 reserved_at_1c8[0x4]; + u8 max_tc[0x4]; + u8 temp_warn_event[0x1]; + u8 dcbx[0x1]; + u8 general_notification_event[0x1]; + u8 reserved_at_1d3[0x2]; + u8 fpga[0x1]; + u8 rol_s[0x1]; + u8 rol_g[0x1]; + u8 reserved_at_1d8[0x1]; + u8 wol_s[0x1]; + u8 wol_g[0x1]; + u8 wol_a[0x1]; + u8 wol_b[0x1]; + u8 wol_m[0x1]; + u8 wol_u[0x1]; + u8 wol_p[0x1]; + u8 stat_rate_support[0x10]; + u8 reserved_at_1f0[0xc]; + u8 cqe_version[0x4]; + u8 compact_address_vector[0x1]; + u8 striding_rq[0x1]; + u8 reserved_at_202[0x1]; + u8 ipoib_enhanced_offloads[0x1]; + u8 ipoib_basic_offloads[0x1]; + u8 reserved_at_205[0x1]; + u8 repeated_block_disabled[0x1]; + u8 umr_modify_entity_size_disabled[0x1]; + u8 umr_modify_atomic_disabled[0x1]; + u8 umr_indirect_mkey_disabled[0x1]; + u8 umr_fence[0x2]; + u8 reserved_at_20c[0x3]; + u8 drain_sigerr[0x1]; + u8 cmdif_checksum[0x2]; + u8 sigerr_cqe[0x1]; + u8 reserved_at_213[0x1]; + u8 wq_signature[0x1]; + u8 sctr_data_cqe[0x1]; + u8 reserved_at_216[0x1]; + u8 sho[0x1]; + u8 tph[0x1]; + u8 rf[0x1]; + u8 dct[0x1]; + u8 qos[0x1]; + u8 eth_net_offloads[0x1]; + u8 roce[0x1]; + u8 atomic[0x1]; + u8 reserved_at_21f[0x1]; + u8 cq_oi[0x1]; + u8 cq_resize[0x1]; + u8 cq_moderation[0x1]; + u8 reserved_at_223[0x3]; + u8 cq_eq_remap[0x1]; + u8 pg[0x1]; + u8 block_lb_mc[0x1]; + u8 reserved_at_229[0x1]; + u8 scqe_break_moderation[0x1]; + u8 cq_period_start_from_cqe[0x1]; + u8 cd[0x1]; + u8 reserved_at_22d[0x1]; + u8 apm[0x1]; + u8 vector_calc[0x1]; + u8 umr_ptr_rlky[0x1]; + u8 imaicl[0x1]; + u8 reserved_at_232[0x4]; + u8 qkv[0x1]; + u8 pkv[0x1]; + u8 set_deth_sqpn[0x1]; + u8 reserved_at_239[0x3]; + u8 xrc[0x1]; + u8 ud[0x1]; + u8 uc[0x1]; + u8 rc[0x1]; + u8 uar_4k[0x1]; + u8 reserved_at_241[0x9]; + u8 uar_sz[0x6]; + u8 reserved_at_250[0x8]; + u8 log_pg_sz[0x8]; + u8 bf[0x1]; + u8 driver_version[0x1]; + u8 pad_tx_eth_packet[0x1]; + u8 reserved_at_263[0x8]; + u8 log_bf_reg_size[0x5]; + u8 reserved_at_270[0xb]; + u8 lag_master[0x1]; + u8 num_lag_ports[0x4]; + u8 reserved_at_280[0x10]; + u8 max_wqe_sz_sq[0x10]; + u8 reserved_at_2a0[0x10]; + u8 max_wqe_sz_rq[0x10]; + u8 max_flow_counter_31_16[0x10]; + u8 max_wqe_sz_sq_dc[0x10]; + u8 reserved_at_2e0[0x7]; + u8 max_qp_mcg[0x19]; + u8 reserved_at_300[0x10]; + u8 flow_counter_bulk_alloc[0x08]; + u8 log_max_mcg[0x8]; + u8 reserved_at_320[0x3]; + u8 log_max_transport_domain[0x5]; + u8 reserved_at_328[0x3]; + u8 log_max_pd[0x5]; + u8 reserved_at_330[0xb]; + u8 log_max_xrcd[0x5]; + u8 nic_receive_steering_discard[0x1]; + u8 receive_discard_vport_down[0x1]; + u8 transmit_discard_vport_down[0x1]; + u8 reserved_at_343[0x5]; + u8 log_max_flow_counter_bulk[0x8]; + u8 max_flow_counter_15_0[0x10]; + u8 reserved_at_360[0x3]; + u8 log_max_rq[0x5]; + u8 reserved_at_368[0x3]; + u8 log_max_sq[0x5]; + u8 reserved_at_370[0x3]; + u8 log_max_tir[0x5]; + u8 reserved_at_378[0x3]; + u8 log_max_tis[0x5]; + u8 basic_cyclic_rcv_wqe[0x1]; + u8 reserved_at_381[0x2]; + u8 log_max_rmp[0x5]; + u8 reserved_at_388[0x3]; + u8 log_max_rqt[0x5]; + u8 reserved_at_390[0x3]; + u8 log_max_rqt_size[0x5]; + u8 reserved_at_398[0x3]; + u8 log_max_tis_per_sq[0x5]; + u8 ext_stride_num_range[0x1]; + u8 reserved_at_3a1[0x2]; + u8 log_max_stride_sz_rq[0x5]; + u8 reserved_at_3a8[0x3]; + u8 log_min_stride_sz_rq[0x5]; + u8 reserved_at_3b0[0x3]; + u8 log_max_stride_sz_sq[0x5]; + u8 reserved_at_3b8[0x3]; + u8 log_min_stride_sz_sq[0x5]; + u8 hairpin[0x1]; + u8 reserved_at_3c1[0x2]; + u8 log_max_hairpin_queues[0x5]; + u8 reserved_at_3c8[0x3]; + u8 log_max_hairpin_wq_data_sz[0x5]; + u8 reserved_at_3d0[0x3]; + u8 log_max_hairpin_num_packets[0x5]; + u8 reserved_at_3d8[0x3]; + u8 log_max_wq_sz[0x5]; + u8 nic_vport_change_event[0x1]; + u8 disable_local_lb_uc[0x1]; + u8 disable_local_lb_mc[0x1]; + u8 log_min_hairpin_wq_data_sz[0x5]; + u8 reserved_at_3e8[0x3]; + u8 log_max_vlan_list[0x5]; + u8 reserved_at_3f0[0x3]; + u8 log_max_current_mc_list[0x5]; + u8 reserved_at_3f8[0x3]; + u8 log_max_current_uc_list[0x5]; + u8 general_obj_types[0x40]; + u8 reserved_at_440[0x20]; + u8 reserved_at_460[0x10]; + u8 max_num_eqs[0x10]; + u8 reserved_at_480[0x3]; + u8 log_max_l2_table[0x5]; + u8 reserved_at_488[0x8]; + u8 log_uar_page_sz[0x10]; + u8 reserved_at_4a0[0x20]; + u8 device_frequency_mhz[0x20]; + u8 device_frequency_khz[0x20]; + u8 reserved_at_500[0x20]; + u8 num_of_uars_per_page[0x20]; + u8 flex_parser_protocols[0x20]; + u8 reserved_at_560[0x20]; + u8 reserved_at_580[0x3c]; + u8 mini_cqe_resp_stride_index[0x1]; + u8 cqe_128_always[0x1]; + u8 cqe_compression_128[0x1]; + u8 cqe_compression[0x1]; + u8 cqe_compression_timeout[0x10]; + u8 cqe_compression_max_num[0x10]; + u8 reserved_at_5e0[0x10]; + u8 tag_matching[0x1]; + u8 rndv_offload_rc[0x1]; + u8 rndv_offload_dc[0x1]; + u8 log_tag_matching_list_sz[0x5]; + u8 reserved_at_5f8[0x3]; + u8 log_max_xrq[0x5]; + u8 affiliate_nic_vport_criteria[0x8]; + u8 native_port_num[0x8]; + u8 num_vhca_ports[0x8]; + u8 reserved_at_618[0x6]; + u8 sw_owner_id[0x1]; + u8 reserved_at_61f[0x1e1]; +}; + +struct mlx5_ifc_qos_cap_bits { + u8 packet_pacing[0x1]; + u8 esw_scheduling[0x1]; + u8 esw_bw_share[0x1]; + u8 esw_rate_limit[0x1]; + u8 reserved_at_4[0x1]; + u8 packet_pacing_burst_bound[0x1]; + u8 packet_pacing_typical_size[0x1]; + u8 flow_meter_srtcm[0x1]; + u8 reserved_at_8[0x8]; + u8 log_max_flow_meter[0x8]; + u8 flow_meter_reg_id[0x8]; + u8 reserved_at_25[0x20]; + u8 packet_pacing_max_rate[0x20]; + u8 packet_pacing_min_rate[0x20]; + u8 reserved_at_80[0x10]; + u8 packet_pacing_rate_table_size[0x10]; + u8 esw_element_type[0x10]; + u8 esw_tsar_type[0x10]; + u8 reserved_at_c0[0x10]; + u8 max_qos_para_vport[0x10]; + u8 max_tsar_bw_share[0x20]; + u8 reserved_at_100[0x6e8]; +}; + +union mlx5_ifc_hca_cap_union_bits { + struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap; + struct mlx5_ifc_qos_cap_bits qos_cap; + u8 reserved_at_0[0x8000]; +}; + +struct mlx5_ifc_query_hca_cap_out_bits { + u8 status[0x8]; + u8 reserved_at_8[0x18]; + u8 syndrome[0x20]; + u8 reserved_at_40[0x40]; + union mlx5_ifc_hca_cap_union_bits capability; +}; + +struct mlx5_ifc_query_hca_cap_in_bits { + u8 opcode[0x10]; + u8 reserved_at_10[0x10]; + u8 reserved_at_20[0x10]; + u8 op_mod[0x10]; + u8 reserved_at_40[0x40]; +}; + /* CQE format mask. */ #define MLX5E_CQE_FORMAT_MASK 0xc From patchwork Thu Apr 18 13:16:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ori Kam X-Patchwork-Id: 52932 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0F20B1B9E7; Thu, 18 Apr 2019 15:16:22 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 6B57C1B9CC for ; Thu, 18 Apr 2019 15:16:20 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Apr 2019 16:16:14 +0300 Received: from pegasus03.mtr.labs.mlnx (pegasus03.mtr.labs.mlnx [10.210.16.124]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3IDGDSA003631; Thu, 18 Apr 2019 16:16:13 +0300 From: Ori Kam To: yskoh@mellanox.com, shahafs@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com, motih@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Thu, 18 Apr 2019 13:16:02 +0000 Message-Id: <1555593367-144772-5-git-send-email-orika@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1555593367-144772-1-git-send-email-orika@mellanox.com> References: <1555276357-4892-1-git-send-email-orika@mellanox.com> <1555593367-144772-1-git-send-email-orika@mellanox.com> Subject: [dpdk-dev] [PATCH v3 4/9] net/mlx5: add validation for Direct Rule E-Switch X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add validation logic for E-Switch using Direct Rules. Signed-off-by: Ori Kam Acked-by: Yongseok Koh --- drivers/net/mlx5/mlx5.h | 2 + drivers/net/mlx5/mlx5_ethdev.c | 41 +++++++ drivers/net/mlx5/mlx5_flow.h | 5 + drivers/net/mlx5/mlx5_flow_dv.c | 243 ++++++++++++++++++++++++++++++++++++++-- 4 files changed, 280 insertions(+), 11 deletions(-) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index f20e589..5e70856 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -413,6 +413,8 @@ int mlx5_ibv_device_to_pci_addr(const struct ibv_device *device, unsigned int mlx5_dev_to_port_id(const struct rte_device *dev, uint16_t *port_list, unsigned int port_list_n); +int mlx5_port_to_eswitch_info(uint16_t port, uint16_t *es_domain_id, + uint16_t *es_port_id); int mlx5_sysfs_switch_info(unsigned int ifindex, struct mlx5_switch_info *info); bool mlx5_translate_port_name(const char *port_name_in, diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c index 3992918..695440a 100644 --- a/drivers/net/mlx5/mlx5_ethdev.c +++ b/drivers/net/mlx5/mlx5_ethdev.c @@ -1376,6 +1376,47 @@ int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size) } /** + * Get the E-Switch domain id this port belongs to. + * + * @param[in] port + * Device port id. + * @param[out] es_domain_id + * E-Switch domain id. + * @param[out] es_port_id + * The port id of the port in the E-Switch. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +int +mlx5_port_to_eswitch_info(uint16_t port, + uint16_t *es_domain_id, uint16_t *es_port_id) +{ + struct rte_eth_dev *dev; + struct mlx5_priv *priv; + + if (port >= RTE_MAX_ETHPORTS) { + rte_errno = EINVAL; + return -rte_errno; + } + if (!rte_eth_dev_is_valid_port(port)) { + rte_errno = ENODEV; + return -rte_errno; + } + dev = &rte_eth_devices[port]; + priv = dev->data->dev_private; + if (!(priv->representor || priv->master)) { + rte_errno = EINVAL; + return -rte_errno; + } + if (es_domain_id) + *es_domain_id = priv->domain_id; + if (es_port_id) + *es_port_id = priv->vport_id; + return 0; +} + +/** * Get switch information associated with network interface. * * @param ifindex diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 9f47fd4..85954c2 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -48,6 +48,7 @@ /* General pattern items bits. */ #define MLX5_FLOW_ITEM_METADATA (1u << 16) +#define MLX5_FLOW_ITEM_PORT_ID (1u << 17) /* Outer Masks. */ #define MLX5_FLOW_LAYER_OUTER_L3 \ @@ -118,6 +119,10 @@ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | \ MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_JUMP) +#define MLX5_FLOW_FATE_ESWITCH_ACTIONS \ + (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \ + MLX5_FLOW_ACTION_JUMP) + #define MLX5_FLOW_ENCAP_ACTIONS (MLX5_FLOW_ACTION_VXLAN_ENCAP | \ MLX5_FLOW_ACTION_NVGRE_ENCAP | \ MLX5_FLOW_ACTION_RAW_ENCAP) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 1e25e0b..b819359 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -613,6 +613,89 @@ struct field_modify_info modify_tcp[] = { } /** + * Validate vport item. + * + * @param[in] dev + * Pointer to the rte_eth_dev structure. + * @param[in] item + * Item specification. + * @param[in] attr + * Attributes of flow that includes this item. + * @param[in] item_flags + * Bit-fields that holds the items detected until now. + * @param[out] error + * Pointer to error structure. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +static int +flow_dv_validate_item_port_id(struct rte_eth_dev *dev, + const struct rte_flow_item *item, + const struct rte_flow_attr *attr, + uint64_t item_flags, + struct rte_flow_error *error) +{ + const struct rte_flow_item_port_id *spec = item->spec; + const struct rte_flow_item_port_id *mask = item->mask; + const struct rte_flow_item_port_id switch_mask = { + .id = 0xffffffff, + }; + uint16_t esw_domain_id; + uint16_t item_port_esw_domain_id; + int ret; + + if (!attr->transfer) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + NULL, + "match on port id is valid only" + " when transfer flag is enabled"); + if (item_flags & MLX5_FLOW_ITEM_PORT_ID) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ITEM, item, + "multiple source ports are not" + " supported"); + if (!mask) + mask = &switch_mask; + if (mask->id != 0xffffffff) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ITEM_MASK, + mask, + "no support for partial mask on" + " \"id\" field"); + ret = mlx5_flow_item_acceptable + (item, (const uint8_t *)mask, + (const uint8_t *)&rte_flow_item_port_id_mask, + sizeof(struct rte_flow_item_port_id), + error); + if (ret) + return ret; + if (!spec) + return 0; + ret = mlx5_port_to_eswitch_info(spec->id, &item_port_esw_domain_id, + NULL); + if (ret) + return rte_flow_error_set(error, -ret, + RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec, + "failed to obtain E-Switch info for" + " port"); + ret = mlx5_port_to_eswitch_info(dev->data->port_id, + &esw_domain_id, NULL); + if (ret < 0) + return rte_flow_error_set(error, -ret, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "failed to obtain E-Switch info"); + if (item_port_esw_domain_id != esw_domain_id) + return rte_flow_error_set(error, -ret, + RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec, + "cannot match on a port from a" + " different E-Switch"); + return 0; +} + +/** * Validate count action. * * @param[in] dev @@ -676,7 +759,7 @@ struct field_modify_info modify_tcp[] = { RTE_FLOW_ERROR_TYPE_ACTION, NULL, "can only have a single encap or" " decap action in a flow"); - if (attr->ingress) + if (!attr->transfer && attr->ingress) return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, NULL, @@ -761,7 +844,8 @@ struct field_modify_info modify_tcp[] = { "can only have a single encap" " action in a flow"); /* encap without preceding decap is not supported for ingress */ - if (attr->ingress && !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP)) + if (!attr->transfer && attr->ingress && + !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP)) return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, NULL, @@ -1561,6 +1645,77 @@ struct field_modify_info modify_tcp[] = { return 0; } +/* + * Validate the port_id action. + * + * @param[in] dev + * Pointer to rte_eth_dev structure. + * @param[in] action_flags + * Bit-fields that holds the actions detected until now. + * @param[in] action + * Port_id RTE action structure. + * @param[in] attr + * Attributes of flow that includes this action. + * @param[out] error + * Pointer to error structure. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +static int +flow_dv_validate_action_port_id(struct rte_eth_dev *dev, + uint64_t action_flags, + const struct rte_flow_action *action, + const struct rte_flow_attr *attr, + struct rte_flow_error *error) +{ + const struct rte_flow_action_port_id *port_id; + uint16_t port; + uint16_t esw_domain_id; + uint16_t act_port_domain_id; + int ret; + + if (!attr->transfer) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "port id action is valid in transfer" + " mode only"); + if (!action || !action->conf) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION_CONF, + NULL, + "port id action parameters must be" + " specified"); + if (action_flags & (MLX5_FLOW_FATE_ACTIONS | + MLX5_FLOW_FATE_ESWITCH_ACTIONS)) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, NULL, + "can have only one fate actions in" + " a flow"); + ret = mlx5_port_to_eswitch_info(dev->data->port_id, + &esw_domain_id, NULL); + if (ret < 0) + return rte_flow_error_set(error, -ret, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "failed to obtain E-Switch info"); + port_id = action->conf; + port = port_id->original ? dev->data->port_id : port_id->id; + ret = mlx5_port_to_eswitch_info(port, &act_port_domain_id, NULL); + if (ret) + return rte_flow_error_set + (error, -ret, + RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id, + "failed to obtain E-Switch port id for port"); + if (act_port_domain_id != esw_domain_id) + return rte_flow_error_set + (error, -ret, + RTE_FLOW_ERROR_TYPE_ACTION, NULL, + "port does not belong to" + " E-Switch being configured"); + return 0; +} /** * Find existing modify-header resource or create and register a new one. @@ -1759,11 +1914,29 @@ struct field_modify_info modify_tcp[] = { RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, NULL, "priority out of range"); - if (attributes->transfer) - return rte_flow_error_set(error, ENOTSUP, - RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, - NULL, - "transfer is not supported"); + if (attributes->transfer) { + if (!priv->config.dv_esw_en) + return rte_flow_error_set + (error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, + "E-Switch dr is not supported"); + if (!(priv->representor || priv->master)) + return rte_flow_error_set + (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, "E-Switch configurationd can only be" + " done by a master or a representor device"); + if (attributes->egress) + return rte_flow_error_set + (error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes, + "egress is not supported"); + if (attributes->group >= MLX5_MAX_TABLES_FDB) + return rte_flow_error_set + (error, EINVAL, + RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, + NULL, "group must be smaller than " + RTE_STR(MLX5_MAX_FDB_TABLES)); + } if (!(attributes->egress ^ attributes->ingress)) return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR, NULL, @@ -1812,6 +1985,13 @@ struct field_modify_info modify_tcp[] = { switch (items->type) { case RTE_FLOW_ITEM_TYPE_VOID: break; + case RTE_FLOW_ITEM_TYPE_PORT_ID: + ret = flow_dv_validate_item_port_id + (dev, items, attr, item_flags, error); + if (ret < 0) + return ret; + last_item |= MLX5_FLOW_ITEM_PORT_ID; + break; case RTE_FLOW_ITEM_TYPE_ETH: ret = mlx5_flow_validate_item_eth(items, item_flags, error); @@ -1943,6 +2123,17 @@ struct field_modify_info modify_tcp[] = { switch (actions->type) { case RTE_FLOW_ACTION_TYPE_VOID: break; + case RTE_FLOW_ACTION_TYPE_PORT_ID: + ret = flow_dv_validate_action_port_id(dev, + action_flags, + actions, + attr, + error); + if (ret) + return ret; + action_flags |= MLX5_FLOW_ACTION_PORT_ID; + ++actions_n; + break; case RTE_FLOW_ACTION_TYPE_FLAG: ret = mlx5_flow_validate_action_flag(action_flags, attr, error); @@ -2133,10 +2324,40 @@ struct field_modify_info modify_tcp[] = { "action not supported"); } } - if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress) - return rte_flow_error_set(error, EINVAL, - RTE_FLOW_ERROR_TYPE_ACTION, actions, - "no fate action is found"); + /* Eswitch has few restrictions on using items and actions */ + if (attr->transfer) { + if (action_flags & MLX5_FLOW_ACTION_FLAG) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, + NULL, + "unsupported action FLAG"); + if (action_flags & MLX5_FLOW_ACTION_MARK) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, + NULL, + "unsupported action MARK"); + if (action_flags & MLX5_FLOW_ACTION_QUEUE) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, + NULL, + "unsupported action QUEUE"); + if (action_flags & MLX5_FLOW_ACTION_RSS) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, + NULL, + "unsupported action RSS"); + if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS)) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, + actions, + "no fate action is found"); + } else { + if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, + actions, + "no fate action is found"); + } return 0; } From patchwork Thu Apr 18 13:16:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ori Kam X-Patchwork-Id: 52934 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 306A71BA68; Thu, 18 Apr 2019 15:16:27 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 745091B9FD for ; Thu, 18 Apr 2019 15:16:20 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Apr 2019 16:16:14 +0300 Received: from pegasus03.mtr.labs.mlnx (pegasus03.mtr.labs.mlnx [10.210.16.124]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3IDGDSB003631; Thu, 18 Apr 2019 16:16:14 +0300 From: Ori Kam To: yskoh@mellanox.com, shahafs@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com, motih@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Thu, 18 Apr 2019 13:16:03 +0000 Message-Id: <1555593367-144772-6-git-send-email-orika@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1555593367-144772-1-git-send-email-orika@mellanox.com> References: <1555276357-4892-1-git-send-email-orika@mellanox.com> <1555593367-144772-1-git-send-email-orika@mellanox.com> Subject: [dpdk-dev] [PATCH v3 5/9] net/mlx5: add port ID item to Direct Verbs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Adds the port ID item to the DV steering code. Signed-off-by: Ori Kam Acked-by: Yongseok Koh --- drivers/net/mlx5/mlx5_flow_dv.c | 84 ++++++++++++++++++++++++++++++----------- 1 file changed, 61 insertions(+), 23 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index b819359..e3d9aa2 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -3086,6 +3086,62 @@ struct field_modify_info modify_tcp[] = { } } +/** + * Add source vport match to the specified matcher. + * + * @param[in, out] matcher + * Flow matcher. + * @param[in, out] key + * Flow matcher value. + * @param[in] port + * Source vport value to match + * @param[in] mask + * Mask + */ +static void +flow_dv_translate_item_source_vport(void *matcher, void *key, + int16_t port, uint16_t mask) +{ + void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters); + void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters); + + MLX5_SET(fte_match_set_misc, misc_m, source_port, mask); + MLX5_SET(fte_match_set_misc, misc_v, source_port, port); +} + +/** + * Translate port-id item to eswitch match on port-id. + * + * @param[in] dev + * The devich to configure through. + * @param[in, out] matcher + * Flow matcher. + * @param[in, out] key + * Flow matcher value. + * @param[in] item + * Flow pattern to translate. + * + * @return + * 0 on success, a negative errno value otherwise. + */ +static int +flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher, + void *key, const struct rte_flow_item *item) +{ + const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL; + const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL; + uint16_t mask, val, id; + int ret; + + mask = pid_m ? pid_m->id : 0xffff; + id = pid_v ? pid_v->id : dev->data->port_id; + ret = mlx5_port_to_eswitch_info(id, NULL, &val); + if (ret) + return ret; + flow_dv_translate_item_source_vport(matcher, key, val, mask); + return 0; +} + static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 }; #define HEADER_IS_ZERO(match_criteria, headers) \ @@ -3296,29 +3352,6 @@ struct field_modify_info modify_tcp[] = { } /** - * Add source vport match to the specified matcher. - * - * @param[in, out] matcher - * Flow matcher. - * @param[in, out] key - * Flow matcher value. - * @param[in] port - * Source vport value to match - * @param[in] mask - * Mask - */ -static void -flow_dv_translate_item_source_vport(void *matcher, void *key, - int16_t port, uint16_t mask) -{ - void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters); - void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters); - - MLX5_SET(fte_match_set_misc, misc_m, source_port, mask); - MLX5_SET(fte_match_set_misc, misc_v, source_port, port); -} - -/** * Find existing tag resource or create and register a new one. * * @param dev[in, out] @@ -3724,6 +3757,11 @@ struct field_modify_info modify_tcp[] = { void *match_value = dev_flow->dv.value.buf; switch (items->type) { + case RTE_FLOW_ITEM_TYPE_PORT_ID: + flow_dv_translate_item_port_id(dev, match_mask, + match_value, items); + last_item = MLX5_FLOW_ITEM_PORT_ID; + break; case RTE_FLOW_ITEM_TYPE_ETH: flow_dv_translate_item_eth(match_mask, match_value, items, tunnel); From patchwork Thu Apr 18 13:16:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ori Kam X-Patchwork-Id: 52935 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A02A11BA90; Thu, 18 Apr 2019 15:16:29 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 78E941BA4D for ; Thu, 18 Apr 2019 15:16:20 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Apr 2019 16:16:14 +0300 Received: from pegasus03.mtr.labs.mlnx (pegasus03.mtr.labs.mlnx [10.210.16.124]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3IDGDSC003631; Thu, 18 Apr 2019 16:16:14 +0300 From: Ori Kam To: yskoh@mellanox.com, shahafs@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com, motih@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Thu, 18 Apr 2019 13:16:04 +0000 Message-Id: <1555593367-144772-7-git-send-email-orika@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1555593367-144772-1-git-send-email-orika@mellanox.com> References: <1555276357-4892-1-git-send-email-orika@mellanox.com> <1555593367-144772-1-git-send-email-orika@mellanox.com> Subject: [dpdk-dev] [PATCH v3 6/9] net/mlx5: add transfer attribute to matcher X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In current implementation the DV steering supported only NIC steering. This commit adds the transfer attribute in order to create a matcher on the FDB tabels. Signed-off-by: Ori Kam Acked-by: Yongseok Koh --- drivers/net/mlx5/mlx5_flow.c | 1 + drivers/net/mlx5/mlx5_flow.h | 2 ++ drivers/net/mlx5/mlx5_flow_dv.c | 22 ++++++++++++++++++---- 3 files changed, 21 insertions(+), 4 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index b1effda..8afb966 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -2095,6 +2095,7 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, flow = rte_calloc(__func__, 1, flow_size, 0); flow->drv_type = flow_get_drv_type(dev, attr); flow->ingress = attr->ingress; + flow->transfer = attr->transfer; assert(flow->drv_type > MLX5_FLOW_TYPE_MIN && flow->drv_type < MLX5_FLOW_TYPE_MAX); flow->queue = (void *)(flow + 1); diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 85954c2..9d72024 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -210,6 +210,7 @@ struct mlx5_flow_dv_matcher { uint16_t crc; /**< CRC of key. */ uint16_t priority; /**< Priority of matcher. */ uint8_t egress; /**< Egress matcher. */ + uint8_t transfer; /**< 1 if the flow is E-Switch flow. */ uint32_t group; /**< The matcher group. */ struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */ }; @@ -382,6 +383,7 @@ struct rte_flow { struct mlx5_fdir *fdir; /**< Pointer to associated FDIR if any. */ uint8_t ingress; /**< 1 if the flow is ingress. */ uint32_t group; /**< The group index. */ + uint8_t transfer; /**< 1 if the flow is E-Switch flow. */ }; typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev, diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index e3d9aa2..182abb3 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -3192,6 +3192,8 @@ struct field_modify_info modify_tcp[] = { * Table id to use. * @param[in] egress * Direction of the table. + * @param[in] transfer + * E-Switch or NIC flow. * @param[out] error * pointer to error structure. * @@ -3201,6 +3203,7 @@ struct field_modify_info modify_tcp[] = { static struct mlx5_flow_tbl_resource * flow_dv_tbl_resource_get(struct rte_eth_dev *dev, uint32_t table_id, uint8_t egress, + uint8_t transfer, struct rte_flow_error *error) { struct mlx5_priv *priv = dev->data->dev_private; @@ -3208,7 +3211,12 @@ struct field_modify_info modify_tcp[] = { struct mlx5_flow_tbl_resource *tbl; #ifdef HAVE_MLX5DV_DR - if (egress) { + if (transfer) { + tbl = &sh->fdb_tbl[table_id]; + if (!tbl->obj) + tbl->obj = mlx5_glue->dr_create_flow_tbl + (sh->fdb_ns, table_id); + } else if (egress) { tbl = &sh->tx_tbl[table_id]; if (!tbl->obj) tbl->obj = mlx5_glue->dr_create_flow_tbl @@ -3230,7 +3238,9 @@ struct field_modify_info modify_tcp[] = { #else (void)error; (void)tbl; - if (egress) + if (transfer) + return &sh->fdb_tbl[table_id]; + else if (egress) return &sh->tx_tbl[table_id]; else return &sh->rx_tbl[table_id]; @@ -3295,6 +3305,7 @@ struct field_modify_info modify_tcp[] = { matcher->priority == cache_matcher->priority && matcher->egress == cache_matcher->egress && matcher->group == cache_matcher->group && + matcher->transfer == cache_matcher->transfer && !memcmp((const void *)matcher->mask.buf, (const void *)cache_matcher->mask.buf, cache_matcher->mask.size)) { @@ -3316,7 +3327,8 @@ struct field_modify_info modify_tcp[] = { RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, "cannot allocate matcher memory"); tbl = flow_dv_tbl_resource_get(dev, matcher->group * MLX5_GROUP_FACTOR, - matcher->egress, error); + matcher->egress, matcher->transfer, + error); if (!tbl) { rte_free(cache_matcher); return rte_flow_error_set(error, ENOMEM, @@ -3643,7 +3655,8 @@ struct field_modify_info modify_tcp[] = { jump_data = action->conf; tbl = flow_dv_tbl_resource_get(dev, jump_data->group * MLX5_GROUP_FACTOR, - attr->egress, error); + attr->egress, + attr->transfer, error); if (!tbl) return rte_flow_error_set (error, errno, @@ -3871,6 +3884,7 @@ struct field_modify_info modify_tcp[] = { matcher.priority); matcher.egress = attr->egress; matcher.group = attr->group; + matcher.transfer = attr->transfer; if (flow_dv_matcher_register(dev, &matcher, dev_flow, error)) return -rte_errno; return 0; From patchwork Thu Apr 18 13:16:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ori Kam X-Patchwork-Id: 52938 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 70EE41BACB; Thu, 18 Apr 2019 15:16:36 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 854B31BA5A for ; Thu, 18 Apr 2019 15:16:20 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Apr 2019 16:16:14 +0300 Received: from pegasus03.mtr.labs.mlnx (pegasus03.mtr.labs.mlnx [10.210.16.124]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3IDGDSD003631; Thu, 18 Apr 2019 16:16:14 +0300 From: Ori Kam To: yskoh@mellanox.com, shahafs@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com, motih@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Thu, 18 Apr 2019 13:16:05 +0000 Message-Id: <1555593367-144772-8-git-send-email-orika@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1555593367-144772-1-git-send-email-orika@mellanox.com> References: <1555276357-4892-1-git-send-email-orika@mellanox.com> <1555593367-144772-1-git-send-email-orika@mellanox.com> Subject: [dpdk-dev] [PATCH v3 7/9] net/mlx5: add E-Switch port ID action to Direct Verbs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This commits adds matching on source port, using DV API. Signed-off-by: Ori Kam Acked-by: Yongseok Koh --- drivers/net/mlx5/mlx5.h | 2 + drivers/net/mlx5/mlx5_flow.h | 12 ++++ drivers/net/mlx5/mlx5_flow_dv.c | 149 ++++++++++++++++++++++++++++++++++++++++ drivers/net/mlx5/mlx5_glue.c | 14 ++++ drivers/net/mlx5/mlx5_glue.h | 1 + 5 files changed, 178 insertions(+) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 5e70856..907d5c3 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -282,6 +282,8 @@ struct mlx5_ibv_shared { LIST_HEAD(modify_cmd, mlx5_flow_dv_modify_hdr_resource) modify_cmds; LIST_HEAD(tag, mlx5_flow_dv_tag_resource) tags; LIST_HEAD(jump, mlx5_flow_dv_jump_tbl_resource) jump_tbl; + LIST_HEAD(port_id_action_list, mlx5_flow_dv_port_id_action_resource) + port_id_action_list; /* List of port ID actions. */ /* Shared interrupt handler section. */ pthread_mutex_t intr_mutex; /* Interrupt config mutex. */ uint32_t intr_cnt; /* Interrupt handler reference counter. */ diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 9d72024..c419e6b 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -267,6 +267,16 @@ struct mlx5_flow_dv_jump_tbl_resource { struct mlx5_flow_tbl_resource *tbl; /**< The target table. */ }; +/* Port ID resource structure. */ +struct mlx5_flow_dv_port_id_action_resource { + LIST_ENTRY(mlx5_flow_dv_port_id_action_resource) next; + /* Pointer to next element. */ + rte_atomic32_t refcnt; /**< Reference counter. */ + void *action; + /**< Verbs tag action object. */ + uint32_t port_id; /**< Port ID value. */ +}; + /* * Max number of actions per DV flow. * See CREATE_FLOW_MAX_FLOW_ACTIONS_SUPPORTED @@ -289,6 +299,8 @@ struct mlx5_flow_dv { struct ibv_flow *flow; /**< Installed flow. */ struct mlx5_flow_dv_jump_tbl_resource *jump; /**< Pointer to the jump action resource. */ + struct mlx5_flow_dv_port_id_action_resource *port_id_action; + /**< Pointer to port ID action resource. */ #ifdef HAVE_IBV_FLOW_DV_SUPPORT void *actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS]; /**< Action list. */ diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 182abb3..9c5826c 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1054,6 +1054,70 @@ struct field_modify_info modify_tcp[] = { } /** + * Find existing table port ID resource or create and register a new one. + * + * @param dev[in, out] + * Pointer to rte_eth_dev structure. + * @param[in, out] resource + * Pointer to port ID action resource. + * @parm[in, out] dev_flow + * Pointer to the dev_flow. + * @param[out] error + * pointer to error structure. + * + * @return + * 0 on success otherwise -errno and errno is set. + */ +static int +flow_dv_port_id_action_resource_register + (struct rte_eth_dev *dev, + struct mlx5_flow_dv_port_id_action_resource *resource, + struct mlx5_flow *dev_flow, + struct rte_flow_error *error) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_ibv_shared *sh = priv->sh; + struct mlx5_flow_dv_port_id_action_resource *cache_resource; + + /* Lookup a matching resource from cache. */ + LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) { + if (resource->port_id == cache_resource->port_id) { + DRV_LOG(DEBUG, "port id action resource resource %p: " + "refcnt %d++", + (void *)cache_resource, + rte_atomic32_read(&cache_resource->refcnt)); + rte_atomic32_inc(&cache_resource->refcnt); + dev_flow->dv.port_id_action = cache_resource; + return 0; + } + } + /* Register new port id action resource. */ + cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0); + if (!cache_resource) + return rte_flow_error_set(error, ENOMEM, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, + "cannot allocate resource memory"); + *cache_resource = *resource; + cache_resource->action = + mlx5_glue->dr_create_flow_action_dest_vport(priv->sh->fdb_ns, + resource->port_id); + if (!cache_resource->action) { + rte_free(cache_resource); + return rte_flow_error_set(error, ENOMEM, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, "cannot create action"); + } + rte_atomic32_init(&cache_resource->refcnt); + rte_atomic32_inc(&cache_resource->refcnt); + LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next); + dev_flow->dv.port_id_action = cache_resource; + DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++", + (void *)cache_resource, + rte_atomic32_read(&cache_resource->refcnt)); + return 0; +} + +/** * Get the size of specific rte_flow_item_type * * @param[in] item_type @@ -3456,6 +3520,44 @@ struct field_modify_info modify_tcp[] = { } /** + * Translate port ID action to vport. + * + * @param[in] dev + * Pointer to rte_eth_dev structure. + * @param[in] action + * Pointer to the port ID action. + * @param[out] dst_port_id + * The target port ID. + * @param[out] error + * Pointer to the error structure. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +static int +flow_dv_translate_action_port_id(struct rte_eth_dev *dev, + const struct rte_flow_action *action, + uint32_t *dst_port_id, + struct rte_flow_error *error) +{ + uint32_t port; + uint16_t port_id; + int ret; + const struct rte_flow_action_port_id *conf = + (const struct rte_flow_action_port_id *)action->conf; + + port = conf->original ? dev->data->port_id : conf->id; + ret = mlx5_port_to_eswitch_info(port, NULL, &port_id); + if (ret) + return rte_flow_error_set(error, -ret, + RTE_FLOW_ERROR_TYPE_ACTION, + NULL, + "No eswitch info was found for port"); + *dst_port_id = port_id; + return 0; +} + +/** * Fill the flow with DV spec. * * @param[in] dev @@ -3513,10 +3615,24 @@ struct field_modify_info modify_tcp[] = { const struct rte_flow_action_jump *jump_data; struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource; struct mlx5_flow_tbl_resource *tbl; + uint32_t port_id = 0; + struct mlx5_flow_dv_port_id_action_resource port_id_resource; switch (actions->type) { case RTE_FLOW_ACTION_TYPE_VOID: break; + case RTE_FLOW_ACTION_TYPE_PORT_ID: + if (flow_dv_translate_action_port_id(dev, action, + &port_id, error)) + return -rte_errno; + port_id_resource.port_id = port_id; + if (flow_dv_port_id_action_resource_register + (dev, &port_id_resource, dev_flow, error)) + return -rte_errno; + dev_flow->dv.actions[actions_n++] = + dev_flow->dv.port_id_action->action; + action_flags |= MLX5_FLOW_ACTION_PORT_ID; + break; case RTE_FLOW_ACTION_TYPE_FLAG: tag_resource.tag = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT); @@ -4116,6 +4232,37 @@ struct field_modify_info modify_tcp[] = { } /** + * Release port ID action resource. + * + * @param flow + * Pointer to mlx5_flow. + * + * @return + * 1 while a reference on it exists, 0 when freed. + */ +static int +flow_dv_port_id_action_resource_release(struct mlx5_flow *flow) +{ + struct mlx5_flow_dv_port_id_action_resource *cache_resource = + flow->dv.port_id_action; + + assert(cache_resource->action); + DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--", + (void *)cache_resource, + rte_atomic32_read(&cache_resource->refcnt)); + if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) { + claim_zero(mlx5_glue->destroy_flow_action + (cache_resource->action)); + LIST_REMOVE(cache_resource, next); + rte_free(cache_resource); + DRV_LOG(DEBUG, "port id action resource %p: removed", + (void *)cache_resource); + return 0; + } + return 1; +} + +/** * Remove the flow from the NIC but keeps it in memory. * * @param[in] dev @@ -4182,6 +4329,8 @@ struct field_modify_info modify_tcp[] = { flow_dv_modify_hdr_resource_release(dev_flow); if (dev_flow->dv.jump) flow_dv_jump_tbl_resource_release(dev_flow); + if (dev_flow->dv.port_id_action) + flow_dv_port_id_action_resource_release(dev_flow); rte_free(dev_flow); } } diff --git a/drivers/net/mlx5/mlx5_glue.c b/drivers/net/mlx5/mlx5_glue.c index a508faa..117190f 100644 --- a/drivers/net/mlx5/mlx5_glue.c +++ b/drivers/net/mlx5/mlx5_glue.c @@ -382,6 +382,18 @@ } static void * +mlx5_glue_dr_create_flow_action_dest_vport(void *ns, uint32_t vport) +{ +#ifdef HAVE_MLX5DV_DR_ESWITCH + return mlx5dv_dr_create_action_dest_vport(ns, vport); +#else + (void)ns; + (void)vport; + return NULL; +#endif +} + +static void * mlx5_glue_dr_create_flow_tbl(void *ns, uint32_t level) { #ifdef HAVE_MLX5DV_DR @@ -847,6 +859,8 @@ .cq_ex_to_cq = mlx5_glue_cq_ex_to_cq, .dr_create_flow_action_dest_flow_tbl = mlx5_glue_dr_create_flow_action_dest_flow_tbl, + .dr_create_flow_action_dest_vport = + mlx5_glue_dr_create_flow_action_dest_vport, .dr_create_flow_tbl = mlx5_glue_dr_create_flow_tbl, .dr_destroy_flow_tbl = mlx5_glue_dr_destroy_flow_tbl, .dr_create_ns = mlx5_glue_dr_create_ns, diff --git a/drivers/net/mlx5/mlx5_glue.h b/drivers/net/mlx5/mlx5_glue.h index 058e9b1..26f5cb3 100644 --- a/drivers/net/mlx5/mlx5_glue.h +++ b/drivers/net/mlx5/mlx5_glue.h @@ -146,6 +146,7 @@ struct mlx5_glue { const char *(*port_state_str)(enum ibv_port_state port_state); struct ibv_cq *(*cq_ex_to_cq)(struct ibv_cq_ex *cq); void *(*dr_create_flow_action_dest_flow_tbl)(void *tbl); + void *(*dr_create_flow_action_dest_vport)(void *ns, uint32_t vport); void *(*dr_create_flow_tbl)(void *ns, uint32_t level); int (*dr_destroy_flow_tbl)(void *tbl); void *(*dr_create_ns)(struct ibv_context *ctx, From patchwork Thu Apr 18 13:16:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ori Kam X-Patchwork-Id: 52939 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BA6661BAE4; Thu, 18 Apr 2019 15:16:38 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 89ED81BA5D for ; Thu, 18 Apr 2019 15:16:20 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Apr 2019 16:16:14 +0300 Received: from pegasus03.mtr.labs.mlnx (pegasus03.mtr.labs.mlnx [10.210.16.124]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3IDGDSE003631; Thu, 18 Apr 2019 16:16:14 +0300 From: Ori Kam To: yskoh@mellanox.com, shahafs@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com, motih@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Thu, 18 Apr 2019 13:16:06 +0000 Message-Id: <1555593367-144772-9-git-send-email-orika@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1555593367-144772-1-git-send-email-orika@mellanox.com> References: <1555276357-4892-1-git-send-email-orika@mellanox.com> <1555593367-144772-1-git-send-email-orika@mellanox.com> Subject: [dpdk-dev] [PATCH v3 8/9] net/mlx5: add Forward Database table type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Actions like encap/decap, modify header require setting the flow table type. Until now we supported only Nic RX and Nic TX, this commits adds the support for FDB table type for those actions. Signed-off-by: Ori Kam Acked-by: Yongseok Koh --- drivers/net/mlx5/mlx5_flow_dv.c | 56 +++++++++++++++++++++++++++++------------ 1 file changed, 40 insertions(+), 16 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 9c5826c..5997182 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -40,6 +40,10 @@ #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0 #endif +#ifndef HAVE_MLX5DV_DR_ESWITCH +#define MLX5DV_FLOW_TABLE_TYPE_FDB 0 +#endif + union flow_dv_attr { struct { uint32_t valid:1; @@ -939,7 +943,9 @@ struct field_modify_info modify_tcp[] = { struct mlx5dv_dr_ns *ns; resource->flags = flow->group ? 0 : 1; - if (flow->ingress) + if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) + ns = sh->fdb_ns; + else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX) ns = sh->rx_ns; else ns = sh->tx_ns; @@ -1360,6 +1366,8 @@ struct field_modify_info modify_tcp[] = { * Pointer to action structure. * @param[in, out] dev_flow * Pointer to the mlx5_flow. + * @param[in] transfer + * Mark if the flow is E-Switch flow. * @param[out] error * Pointer to the error structure. * @@ -1370,6 +1378,7 @@ struct field_modify_info modify_tcp[] = { flow_dv_create_action_l2_encap(struct rte_eth_dev *dev, const struct rte_flow_action *action, struct mlx5_flow *dev_flow, + uint8_t transfer, struct rte_flow_error *error) { const struct rte_flow_item *encap_data; @@ -1377,7 +1386,8 @@ struct field_modify_info modify_tcp[] = { struct mlx5_flow_dv_encap_decap_resource res = { .reformat_type = MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL, - .ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX, + .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB : + MLX5DV_FLOW_TABLE_TYPE_NIC_TX, }; if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) { @@ -1412,6 +1422,8 @@ struct field_modify_info modify_tcp[] = { * Pointer to rte_eth_dev structure. * @param[in, out] dev_flow * Pointer to the mlx5_flow. + * @param[in] transfer + * Mark if the flow is E-Switch flow. * @param[out] error * Pointer to the error structure. * @@ -1421,13 +1433,15 @@ struct field_modify_info modify_tcp[] = { static int flow_dv_create_action_l2_decap(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, + uint8_t transfer, struct rte_flow_error *error) { struct mlx5_flow_dv_encap_decap_resource res = { .size = 0, .reformat_type = MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2, - .ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX, + .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB : + MLX5DV_FLOW_TABLE_TYPE_NIC_RX, }; if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error)) @@ -1470,8 +1484,11 @@ struct field_modify_info modify_tcp[] = { res.reformat_type = attr->egress ? MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL : MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2; - res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX : - MLX5DV_FLOW_TABLE_TYPE_NIC_RX; + if (attr->transfer) + res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB; + else + res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX : + MLX5DV_FLOW_TABLE_TYPE_NIC_RX; if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error)) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, @@ -1806,11 +1823,14 @@ struct field_modify_info modify_tcp[] = { struct mlx5_priv *priv = dev->data->dev_private; struct mlx5_ibv_shared *sh = priv->sh; struct mlx5_flow_dv_modify_hdr_resource *cache_resource; + struct mlx5dv_dr_ns *ns; - struct mlx5dv_dr_ns *ns = - resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX ? - sh->tx_ns : sh->rx_ns; - + if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) + ns = sh->fdb_ns; + else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX) + ns = sh->tx_ns; + else + ns = sh->rx_ns; /* Lookup a matching resource from cache. */ LIST_FOREACH(cache_resource, &sh->modify_cmds, next) { if (resource->ft_type == cache_resource->ft_type && @@ -3604,6 +3624,8 @@ struct field_modify_info modify_tcp[] = { union flow_dv_attr flow_attr = { .attr = 0 }; struct mlx5_flow_dv_tag_resource tag_resource; + if (attr->transfer) + res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB; if (priority == MLX5_FLOW_PRIO_RSVD) priority = priv->config.flow_prio - 1; for (; !actions_end ; actions++) { @@ -3709,7 +3731,9 @@ struct field_modify_info modify_tcp[] = { case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: if (flow_dv_create_action_l2_encap(dev, actions, - dev_flow, error)) + dev_flow, + attr->transfer, + error)) return -rte_errno; dev_flow->dv.actions[actions_n++] = dev_flow->dv.encap_decap->verbs_action; @@ -3721,6 +3745,7 @@ struct field_modify_info modify_tcp[] = { case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: if (flow_dv_create_action_l2_decap(dev, dev_flow, + attr->transfer, error)) return -rte_errno; dev_flow->dv.actions[actions_n++] = @@ -3740,9 +3765,9 @@ struct field_modify_info modify_tcp[] = { dev_flow->dv.encap_decap->verbs_action; } else { /* Handle encap without preceding decap. */ - if (flow_dv_create_action_l2_encap(dev, actions, - dev_flow, - error)) + if (flow_dv_create_action_l2_encap + (dev, actions, dev_flow, attr->transfer, + error)) return -rte_errno; dev_flow->dv.actions[actions_n++] = dev_flow->dv.encap_decap->verbs_action; @@ -3757,9 +3782,8 @@ struct field_modify_info modify_tcp[] = { } /* Handle decap only if it isn't followed by encap. */ if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) { - if (flow_dv_create_action_l2_decap(dev, - dev_flow, - error)) + if (flow_dv_create_action_l2_decap + (dev, dev_flow, attr->transfer, error)) return -rte_errno; dev_flow->dv.actions[actions_n++] = dev_flow->dv.encap_decap->verbs_action; From patchwork Thu Apr 18 13:16:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ori Kam X-Patchwork-Id: 52940 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BAA581BB09; Thu, 18 Apr 2019 15:16:40 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 8D8841BA5E for ; Thu, 18 Apr 2019 15:16:20 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Apr 2019 16:16:14 +0300 Received: from pegasus03.mtr.labs.mlnx (pegasus03.mtr.labs.mlnx [10.210.16.124]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x3IDGDSF003631; Thu, 18 Apr 2019 16:16:14 +0300 From: Ori Kam To: yskoh@mellanox.com, shahafs@mellanox.com, matan@mellanox.com, viacheslavo@mellanox.com, motih@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Thu, 18 Apr 2019 13:16:07 +0000 Message-Id: <1555593367-144772-10-git-send-email-orika@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1555593367-144772-1-git-send-email-orika@mellanox.com> References: <1555276357-4892-1-git-send-email-orika@mellanox.com> <1555593367-144772-1-git-send-email-orika@mellanox.com> Subject: [dpdk-dev] [PATCH v3 9/9] net/mlx5: add drop action to Direct Verbs E-Switch X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This commit adds support for drop action when creating E-Switch flow using DV. Signed-off-by: Ori Kam Acked-by: Yongseok Koh --- drivers/net/mlx5/mlx5.c | 9 +++++++++ drivers/net/mlx5/mlx5.h | 1 + drivers/net/mlx5/mlx5_flow_dv.c | 22 ++++++++++++++-------- drivers/net/mlx5/mlx5_glue.c | 12 ++++++++++++ drivers/net/mlx5/mlx5_glue.h | 1 + 5 files changed, 37 insertions(+), 8 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index ff24e1d..65c69af 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -357,6 +357,7 @@ struct mlx5_dev_spawn_data { goto error; } sh->fdb_ns = ns; + sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop(); } #endif sh->dv_refcnt++; @@ -377,6 +378,10 @@ struct mlx5_dev_spawn_data { mlx5_glue->dr_destroy_ns(sh->fdb_ns); sh->fdb_ns = NULL; } + if (sh->esw_drop_action) { + mlx5_glue->destroy_flow_action(sh->esw_drop_action); + sh->esw_drop_action = NULL; + } return err; #else (void)priv; @@ -417,6 +422,10 @@ struct mlx5_dev_spawn_data { mlx5_glue->dr_destroy_ns(sh->fdb_ns); sh->fdb_ns = NULL; } + if (sh->esw_drop_action) { + mlx5_glue->destroy_flow_action(sh->esw_drop_action); + sh->esw_drop_action = NULL; + } #endif pthread_mutex_destroy(&sh->dv_mutex); #else diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 907d5c3..443625e 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -276,6 +276,7 @@ struct mlx5_ibv_shared { /* RX Direct Rules tables. */ void *tx_ns; /* TX Direct Rules name space handle. */ struct mlx5_flow_tbl_resource tx_tbl[MLX5_MAX_TABLES]; + void *esw_drop_action; /* Pointer to DR E-Switch drop action. */ /* TX Direct Rules tables/ */ LIST_HEAD(matchers, mlx5_flow_dv_matcher) matchers; LIST_HEAD(encap_decap, mlx5_flow_dv_encap_decap_resource) encaps_decaps; diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 5997182..4352d48 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -4049,6 +4049,7 @@ struct field_modify_info modify_tcp[] = { { struct mlx5_flow_dv *dv; struct mlx5_flow *dev_flow; + struct mlx5_priv *priv = dev->data->dev_private; int n; int err; @@ -4056,15 +4057,20 @@ struct field_modify_info modify_tcp[] = { dv = &dev_flow->dv; n = dv->actions_n; if (flow->actions & MLX5_FLOW_ACTION_DROP) { - dv->hrxq = mlx5_hrxq_drop_new(dev); - if (!dv->hrxq) { - rte_flow_error_set - (error, errno, - RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, - "cannot get drop hash queue"); - goto error; + if (flow->transfer) + dv->actions[n++] = priv->sh->esw_drop_action; + else { + dv->hrxq = mlx5_hrxq_drop_new(dev); + if (!dv->hrxq) { + rte_flow_error_set + (error, errno, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "cannot get drop hash queue"); + goto error; + } + dv->actions[n++] = dv->hrxq->action; } - dv->actions[n++] = dv->hrxq->action; } else if (flow->actions & (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) { struct mlx5_hrxq *hrxq; diff --git a/drivers/net/mlx5/mlx5_glue.c b/drivers/net/mlx5/mlx5_glue.c index 117190f..b32cd09c 100644 --- a/drivers/net/mlx5/mlx5_glue.c +++ b/drivers/net/mlx5/mlx5_glue.c @@ -394,6 +394,16 @@ } static void * +mlx5_glue_dr_create_flow_action_drop(void) +{ +#ifdef HAVE_MLX5DV_DR_ESWITCH + return mlx5dv_dr_create_action_drop(); +#else + return NULL; +#endif +} + +static void * mlx5_glue_dr_create_flow_tbl(void *ns, uint32_t level) { #ifdef HAVE_MLX5DV_DR @@ -861,6 +871,8 @@ mlx5_glue_dr_create_flow_action_dest_flow_tbl, .dr_create_flow_action_dest_vport = mlx5_glue_dr_create_flow_action_dest_vport, + .dr_create_flow_action_drop = + mlx5_glue_dr_create_flow_action_drop, .dr_create_flow_tbl = mlx5_glue_dr_create_flow_tbl, .dr_destroy_flow_tbl = mlx5_glue_dr_destroy_flow_tbl, .dr_create_ns = mlx5_glue_dr_create_ns, diff --git a/drivers/net/mlx5/mlx5_glue.h b/drivers/net/mlx5/mlx5_glue.h index 26f5cb3..1d06583 100644 --- a/drivers/net/mlx5/mlx5_glue.h +++ b/drivers/net/mlx5/mlx5_glue.h @@ -147,6 +147,7 @@ struct mlx5_glue { struct ibv_cq *(*cq_ex_to_cq)(struct ibv_cq_ex *cq); void *(*dr_create_flow_action_dest_flow_tbl)(void *tbl); void *(*dr_create_flow_action_dest_vport)(void *ns, uint32_t vport); + void *(*dr_create_flow_action_drop)(); void *(*dr_create_flow_tbl)(void *ns, uint32_t level); int (*dr_destroy_flow_tbl)(void *tbl); void *(*dr_create_ns)(struct ibv_context *ctx,