From patchwork Wed Jul 3 08:58:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Hu X-Patchwork-Id: 55993 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EEAE11BC07; Wed, 3 Jul 2019 10:58:58 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 83DD01B964 for ; Wed, 3 Jul 2019 10:58:55 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 08B1E360; Wed, 3 Jul 2019 01:58:55 -0700 (PDT) Received: from net-arm-thunderx2.shanghai.arm.com (net-arm-thunderx2.shanghai.arm.com [10.169.40.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 505703F718; Wed, 3 Jul 2019 01:58:54 -0700 (PDT) From: Gavin Hu To: dev@dpdk.org Cc: nd@arm.com Date: Wed, 3 Jul 2019 16:58:32 +0800 Message-Id: <1562144316-14687-2-git-send-email-gavin.hu@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1562144316-14687-1-git-send-email-gavin.hu@arm.com> References: <1562144316-14687-1-git-send-email-gavin.hu@arm.com> In-Reply-To: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> References: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> Subject: [dpdk-dev] [RFC v2 1/5] eal: add the APIs to wait until equal X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The rte_wait_until_equalxx APIs abstract the functionality of 'polling for a memory location to become equal to a given value'. Signed-off-by: Gavin Hu Reviewed-by: Ruifeng Wang Reviewed-by: Steve Capper Reviewed-by: Ola Liljedahl Reviewed-by: Honnappa Nagarahalli Acked-by: Pavan Nikhilesh --- .../common/include/arch/arm/rte_atomic_64.h | 4 + .../common/include/arch/arm/rte_pause_64.h | 106 +++++++++++++++++++++ lib/librte_eal/common/include/generic/rte_pause.h | 39 +++++++- 3 files changed, 148 insertions(+), 1 deletion(-) diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h index 97060e4..8d742c6 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h @@ -15,8 +15,12 @@ extern "C" { #include "generic/rte_atomic.h" +#ifndef dsb #define dsb(opt) asm volatile("dsb " #opt : : : "memory") +#endif +#ifndef dmb #define dmb(opt) asm volatile("dmb " #opt : : : "memory") +#endif #define rte_mb() dsb(sy) diff --git a/lib/librte_eal/common/include/arch/arm/rte_pause_64.h b/lib/librte_eal/common/include/arch/arm/rte_pause_64.h index 93895d3..1f7be0a 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_pause_64.h +++ b/lib/librte_eal/common/include/arch/arm/rte_pause_64.h @@ -17,6 +17,112 @@ static inline void rte_pause(void) asm volatile("yield" ::: "memory"); } +#ifdef RTE_USE_WFE +/* Wait for *addr to be updated with expected value */ +static __rte_always_inline void +rte_wait_until_equal16(volatile uint16_t *addr, uint16_t expected, int memorder) +{ + uint16_t tmp; + if (memorder == __ATOMIC_RELAXED) + asm volatile( + "ldxrh %w[tmp], %w[addr]\n" + "cmp %w[tmp], %w[expected]\n" + "b.eq 2f\n" + "sevl\n" + "1: wfe\n" + "ldxrh %w[tmp], %w[addr]\n" + "cmp %w[tmp], %w[expected]\n" + "bne 1b\n" + "2:\n" + : [tmp] "=&r" (tmp) + : [addr] "Q"(*addr), [expected] "r"(expected) + : "cc", "memory"); + else + asm volatile( + "ldaxrh %w[tmp], %w[addr]\n" + "cmp %w[tmp], %w[expected]\n" + "b.eq 2f\n" + "sevl\n" + "1: wfe\n" + "ldaxrh %w[tmp], %w[addr]\n" + "cmp %w[tmp], %w[expected]\n" + "bne 1b\n" + "2:\n" + : [tmp] "=&r" (tmp) + : [addr] "Q"(*addr), [expected] "r"(expected) + : "cc", "memory"); +} + +static __rte_always_inline void +rte_wait_until_equal32(volatile uint32_t *addr, uint32_t expected, int memorder) +{ + uint32_t tmp; + if (memorder == __ATOMIC_RELAXED) + asm volatile( + "ldxr %w[tmp], %w[addr]\n" + "cmp %w[tmp], %w[expected]\n" + "b.eq 2f\n" + "sevl\n" + "1: wfe\n" + "ldxr %w[tmp], %w[addr]\n" + "cmp %w[tmp], %w[expected]\n" + "bne 1b\n" + "2:\n" + : [tmp] "=&r" (tmp) + : [addr] "Q"(*addr), [expected] "r"(expected) + : "cc", "memory"); + else + asm volatile( + "ldaxr %w[tmp], %w[addr]\n" + "cmp %w[tmp], %w[expected]\n" + "b.eq 2f\n" + "sevl\n" + "1: wfe\n" + "ldaxr %w[tmp], %w[addr]\n" + "cmp %w[tmp], %w[expected]\n" + "bne 1b\n" + "2:\n" + : [tmp] "=&r" (tmp) + : [addr] "Q"(*addr), [expected] "r"(expected) + : "cc", "memory"); +} + +static __rte_always_inline void +rte_wait_until_equal64(volatile uint64_t *addr, uint64_t expected, int memorder) +{ + uint64_t tmp; + if (memorder == __ATOMIC_RELAXED) + asm volatile( + "ldxr %x[tmp], %x[addr]\n" + "cmp %x[tmp], %x[expected]\n" + "b.eq 2f\n" + "sevl\n" + "1: wfe\n" + "ldxr %x[tmp], %x[addr]\n" + "cmp %x[tmp], %x[expected]\n" + "bne 1b\n" + "2:\n" + : [tmp] "=&r" (tmp) + : [addr] "Q"(*addr), [expected] "r"(expected) + : "cc", "memory"); + else + asm volatile( + "ldaxr %x[tmp], %x[addr]\n" + "cmp %x[tmp], %x[expected]\n" + "b.eq 2f\n" + "sevl\n" + "1: wfe\n" + "ldaxr %x[tmp], %x[addr]\n" + "cmp %x[tmp], %x[expected]\n" + "bne 1b\n" + "2:\n" + : [tmp] "=&r" (tmp) + : [addr] "Q"(*addr), [expected] "r"(expected) + : "cc", "memory"); +} + +#endif + #ifdef __cplusplus } #endif diff --git a/lib/librte_eal/common/include/generic/rte_pause.h b/lib/librte_eal/common/include/generic/rte_pause.h index 52bd4db..8f5f025 100644 --- a/lib/librte_eal/common/include/generic/rte_pause.h +++ b/lib/librte_eal/common/include/generic/rte_pause.h @@ -4,7 +4,6 @@ #ifndef _RTE_PAUSE_H_ #define _RTE_PAUSE_H_ - /** * @file * @@ -12,6 +11,10 @@ * */ +#include +#include +#include + /** * Pause CPU execution for a short while * @@ -20,4 +23,38 @@ */ static inline void rte_pause(void); +#if !defined(RTE_USE_WFE) +#ifdef RTE_USE_C11_MEM_MODEL +#define __rte_wait_until_equal(addr, expected, memorder) do {\ + while (__atomic_load_n(addr, memorder) != expected) \ + rte_pause();\ +} while (0) +#else +#define __rte_wait_until_equal(addr, expected, memorder) do {\ + while (*addr != expected)\ + rte_pause();\ + if (memorder != __ATOMIC_RELAXED)\ + rte_smp_rmb();\ +} while (0) +#endif + +static __rte_always_inline void +rte_wait_until_equal16(volatile uint16_t *addr, uint16_t expected, int memorder) +{ + __rte_wait_until_equal(addr, expected, memorder); +} + +static __rte_always_inline void +rte_wait_until_equal32(volatile uint32_t *addr, uint32_t expected, int memorder) +{ + __rte_wait_until_equal(addr, expected, memorder); +} + +static __rte_always_inline void +rte_wait_until_equal64(volatile uint64_t *addr, uint64_t expected, int memorder) +{ + __rte_wait_until_equal(addr, expected, memorder); +} +#endif /* RTE_USE_WFE */ + #endif /* _RTE_PAUSE_H_ */ From patchwork Wed Jul 3 08:58:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Hu X-Patchwork-Id: 55994 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8322F1BDFB; Wed, 3 Jul 2019 10:59:01 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 8A90A1B964 for ; Wed, 3 Jul 2019 10:58:56 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1DE6ECFC; Wed, 3 Jul 2019 01:58:56 -0700 (PDT) Received: from net-arm-thunderx2.shanghai.arm.com (net-arm-thunderx2.shanghai.arm.com [10.169.40.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5A1E43F718; Wed, 3 Jul 2019 01:58:55 -0700 (PDT) From: Gavin Hu To: dev@dpdk.org Cc: nd@arm.com Date: Wed, 3 Jul 2019 16:58:33 +0800 Message-Id: <1562144316-14687-3-git-send-email-gavin.hu@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1562144316-14687-1-git-send-email-gavin.hu@arm.com> References: <1562144316-14687-1-git-send-email-gavin.hu@arm.com> In-Reply-To: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> References: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> Subject: [dpdk-dev] [RFC v2 2/5] ticketlock: use new API to reduce contention on aarch64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" While using ticket lock, cores repeatedly poll the lock variable. This is replaced by rte_wait_until_equal API. Running ticketlock_autotest on ThunderX2, with different numbers of cores and depths of rings, 3%~8% performance gains were measured. Signed-off-by: Gavin Hu Reviewed-by: Honnappa Nagarahalli Tested-by: Pavan Nikhilesh --- lib/librte_eal/common/include/generic/rte_ticketlock.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/librte_eal/common/include/generic/rte_ticketlock.h b/lib/librte_eal/common/include/generic/rte_ticketlock.h index 191146f..8fa1f62 100644 --- a/lib/librte_eal/common/include/generic/rte_ticketlock.h +++ b/lib/librte_eal/common/include/generic/rte_ticketlock.h @@ -64,8 +64,7 @@ static inline __rte_experimental void rte_ticketlock_lock(rte_ticketlock_t *tl) { uint16_t me = __atomic_fetch_add(&tl->s.next, 1, __ATOMIC_RELAXED); - while (__atomic_load_n(&tl->s.current, __ATOMIC_ACQUIRE) != me) - rte_pause(); + rte_wait_until_equal16(&tl->s.current, me, __ATOMIC_ACQUIRE); } /** From patchwork Wed Jul 3 08:58:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Hu X-Patchwork-Id: 55995 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 41F6E1BE3A; Wed, 3 Jul 2019 10:59:03 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 997D51B9B2 for ; Wed, 3 Jul 2019 10:58:57 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 28744344; Wed, 3 Jul 2019 01:58:57 -0700 (PDT) Received: from net-arm-thunderx2.shanghai.arm.com (net-arm-thunderx2.shanghai.arm.com [10.169.40.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 714523F718; Wed, 3 Jul 2019 01:58:56 -0700 (PDT) From: Gavin Hu To: dev@dpdk.org Cc: nd@arm.com Date: Wed, 3 Jul 2019 16:58:34 +0800 Message-Id: <1562144316-14687-4-git-send-email-gavin.hu@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1562144316-14687-1-git-send-email-gavin.hu@arm.com> References: <1562144316-14687-1-git-send-email-gavin.hu@arm.com> In-Reply-To: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> References: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> Subject: [dpdk-dev] [RFC v2 3/5] ring: use wfe to wait for ring tail update on aarch64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Instead of polling for tail to be updated, use wfe instruction. Signed-off-by: Gavin Hu Reviewed-by: Ruifeng Wang Reviewed-by: Steve Capper Reviewed-by: Ola Liljedahl Reviewed-by: Honnappa Nagarahalli --- lib/librte_ring/rte_ring_c11_mem.h | 4 ++-- lib/librte_ring/rte_ring_generic.h | 3 +-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/lib/librte_ring/rte_ring_c11_mem.h b/lib/librte_ring/rte_ring_c11_mem.h index 0fb73a3..037811e 100644 --- a/lib/librte_ring/rte_ring_c11_mem.h +++ b/lib/librte_ring/rte_ring_c11_mem.h @@ -2,6 +2,7 @@ * * Copyright (c) 2017,2018 HXT-semitech Corporation. * Copyright (c) 2007-2009 Kip Macy kmacy@freebsd.org + * Copyright (c) 2019 Arm Limited * All rights reserved. * Derived from FreeBSD's bufring.h * Used as BSD-3 Licensed with permission from Kip Macy. @@ -21,8 +22,7 @@ update_tail(struct rte_ring_headtail *ht, uint32_t old_val, uint32_t new_val, * we need to wait for them to complete */ if (!single) - while (unlikely(ht->tail != old_val)) - rte_pause(); + rte_wait_until_equal32(&ht->tail, old_val, __ATOMIC_RELAXED); __atomic_store_n(&ht->tail, new_val, __ATOMIC_RELEASE); } diff --git a/lib/librte_ring/rte_ring_generic.h b/lib/librte_ring/rte_ring_generic.h index 953cdbb..570765c 100644 --- a/lib/librte_ring/rte_ring_generic.h +++ b/lib/librte_ring/rte_ring_generic.h @@ -23,8 +23,7 @@ update_tail(struct rte_ring_headtail *ht, uint32_t old_val, uint32_t new_val, * we need to wait for them to complete */ if (!single) - while (unlikely(ht->tail != old_val)) - rte_pause(); + rte_wait_until_equal32(&ht->tail, old_val, __ATOMIC_RELAXED); ht->tail = new_val; } From patchwork Wed Jul 3 08:58:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Hu X-Patchwork-Id: 55996 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DF7291BE56; Wed, 3 Jul 2019 10:59:04 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id A9ACE1B9B2 for ; Wed, 3 Jul 2019 10:58:58 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3714B360; Wed, 3 Jul 2019 01:58:58 -0700 (PDT) Received: from net-arm-thunderx2.shanghai.arm.com (net-arm-thunderx2.shanghai.arm.com [10.169.40.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7C8FB3F718; Wed, 3 Jul 2019 01:58:57 -0700 (PDT) From: Gavin Hu To: dev@dpdk.org Cc: nd@arm.com Date: Wed, 3 Jul 2019 16:58:35 +0800 Message-Id: <1562144316-14687-5-git-send-email-gavin.hu@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1562144316-14687-1-git-send-email-gavin.hu@arm.com> References: <1562144316-14687-1-git-send-email-gavin.hu@arm.com> In-Reply-To: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> References: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> Subject: [dpdk-dev] [RFC v2 4/5] spinlock: use wfe to reduce contention on aarch64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In acquiring a spinlock, cores repeatedly poll the lock variable. This is replaced by rte_wait_until_equal API. 5~10% performance gain was measured by running spinlock_autotest on 14 isolated cores of ThunderX2. Signed-off-by: Gavin Hu Reviewed-by: Ruifeng Wang Reviewed-by: Phil Yang Reviewed-by: Steve Capper Reviewed-by: Ola Liljedahl Reviewed-by: Honnappa Nagarahalli Tested-by: Pavan Nikhilesh --- .../common/include/arch/arm/rte_spinlock.h | 25 ++++++++++++++++++++++ .../common/include/generic/rte_spinlock.h | 2 +- 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/lib/librte_eal/common/include/arch/arm/rte_spinlock.h b/lib/librte_eal/common/include/arch/arm/rte_spinlock.h index 1a6916b..f25d17f 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_spinlock.h +++ b/lib/librte_eal/common/include/arch/arm/rte_spinlock.h @@ -16,6 +16,31 @@ extern "C" { #include #include "generic/rte_spinlock.h" +/* armv7a does support WFE, but an explicit wake-up signal using SEV is + * required (must be preceded by DSB to drain the store buffer) and + * this is less performant, so keep armv7a implementation unchanged. + */ +#if defined(RTE_USE_WFE) && defined(RTE_ARCH_ARM64) +static inline void +rte_spinlock_lock(rte_spinlock_t *sl) +{ + unsigned int tmp; + /* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc. + * faqs/ka16809.html + */ + asm volatile( + "sevl\n" + "1: wfe\n" + "2: ldaxr %w[tmp], %w[locked]\n" + "cbnz %w[tmp], 1b\n" + "stxr %w[tmp], %w[one], %w[locked]\n" + "cbnz %w[tmp], 2b\n" + : [tmp] "=&r" (tmp), [locked] "+Q"(sl->locked) + : [one] "r" (1) + : "cc", "memory"); +} +#endif + static inline int rte_tm_supported(void) { return 0; diff --git a/lib/librte_eal/common/include/generic/rte_spinlock.h b/lib/librte_eal/common/include/generic/rte_spinlock.h index 87ae7a4..cf4f15b 100644 --- a/lib/librte_eal/common/include/generic/rte_spinlock.h +++ b/lib/librte_eal/common/include/generic/rte_spinlock.h @@ -57,7 +57,7 @@ rte_spinlock_init(rte_spinlock_t *sl) static inline void rte_spinlock_lock(rte_spinlock_t *sl); -#ifdef RTE_FORCE_INTRINSICS +#if defined(RTE_FORCE_INTRINSICS) && !defined(RTE_USE_WFE) static inline void rte_spinlock_lock(rte_spinlock_t *sl) { From patchwork Wed Jul 3 08:58:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Hu X-Patchwork-Id: 55997 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5B0F71BE6B; Wed, 3 Jul 2019 10:59:06 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id AF09C1BDEA for ; Wed, 3 Jul 2019 10:58:59 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3DE19142F; Wed, 3 Jul 2019 01:58:59 -0700 (PDT) Received: from net-arm-thunderx2.shanghai.arm.com (net-arm-thunderx2.shanghai.arm.com [10.169.40.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 872593F718; Wed, 3 Jul 2019 01:58:58 -0700 (PDT) From: Gavin Hu To: dev@dpdk.org Cc: nd@arm.com Date: Wed, 3 Jul 2019 16:58:36 +0800 Message-Id: <1562144316-14687-6-git-send-email-gavin.hu@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1562144316-14687-1-git-send-email-gavin.hu@arm.com> References: <1562144316-14687-1-git-send-email-gavin.hu@arm.com> In-Reply-To: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> References: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> Subject: [dpdk-dev] [RFC v2 5/5] config: add WFE config entry for aarch64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add the RTE_USE_WFE configuration entry for aarch64, disabled by default. It can be enabled selectively based on the performance benchmarking. Signed-off-by: Gavin Hu Reviewed-by: Ruifeng Wang Reviewed-by: Steve Capper Reviewed-by: Honnappa Nagarahalli Acked-by: Pavan Nikhilesh --- config/arm/meson.build | 1 + config/common_armv8a_linux | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/config/arm/meson.build b/config/arm/meson.build index 6fa06a1..939d60e 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -116,6 +116,7 @@ impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic] impl_dpaa2 = ['NXP DPAA2', flags_dpaa2, machine_args_generic] dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) +dpdk_conf.set('RTE_USE_WFE', 0) if not dpdk_conf.get('RTE_ARCH_64') dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) diff --git a/config/common_armv8a_linux b/config/common_armv8a_linux index 72091de..ae87a87 100644 --- a/config/common_armv8a_linux +++ b/config/common_armv8a_linux @@ -12,6 +12,12 @@ CONFIG_RTE_ARCH_64=y CONFIG_RTE_FORCE_INTRINSICS=y +# Use WFE instructions to implement the rte_wait_for_equal_xxx APIs, +# calling these APIs put the cores enter low power state while waiting +# for the memory address to be become equal to the expected value. +# This is supported only by aarch64. +CONFIG_RTE_USE_WFE=n + # Maximum available cache line size in arm64 implementations. # Setting to maximum available cache line size in generic config # to address minimum DMA alignment across all arm64 implementations.