From patchwork Thu Jul 11 17:27:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Haiyue" X-Patchwork-Id: 56346 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5A3635680; Thu, 11 Jul 2019 19:31:41 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id D3FBB2BAB; Thu, 11 Jul 2019 19:31:38 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Jul 2019 10:31:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,479,1557212400"; d="scan'208";a="156889085" Received: from npg-dpdk-haiyue-1.sh.intel.com ([10.67.119.204]) by orsmga007.jf.intel.com with ESMTP; 11 Jul 2019 10:31:36 -0700 From: Haiyue Wang To: dev@dpdk.org Cc: Haiyue Wang , stable@dpdk.org Date: Fri, 12 Jul 2019 01:27:06 +0800 Message-Id: <1562866026-99504-1-git-send-email-haiyue.wang@intel.com> X-Mailer: git-send-email 2.7.4 Subject: [dpdk-dev] [PATCH v1] net/ice: use rx/tx DMA iova instead of phys_addr which is deprecated X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The phys_addr concept is deprecated in rte_memzone, change it to access iova member, and use the type 'rte_iova_t'. Also rename the rx/tx_ring_phys_addr definitions to rx/tx_ring_dma that matches the IOVA concept design. Fixes: 50370662b727 ("net/ice: support device and queue ops") Cc: stable@dpdk.org Signed-off-by: Haiyue Wang --- drivers/net/ice/ice_rxtx.c | 8 ++++---- drivers/net/ice/ice_rxtx.h | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c index 035ed84..3353f23 100644 --- a/drivers/net/ice/ice_rxtx.c +++ b/drivers/net/ice/ice_rxtx.c @@ -70,7 +70,7 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq) memset(&rx_ctx, 0, sizeof(rx_ctx)); - rx_ctx.base = rxq->rx_ring_phys_addr / ICE_QUEUE_BASE_ADDR_UNIT; + rx_ctx.base = rxq->rx_ring_dma / ICE_QUEUE_BASE_ADDR_UNIT; rx_ctx.qlen = rxq->nb_rx_desc; rx_ctx.dbuf = rxq->rx_buf_len >> ICE_RLAN_CTX_DBUF_S; rx_ctx.hbuf = rxq->rx_hdr_len >> ICE_RLAN_CTX_HBUF_S; @@ -442,7 +442,7 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) txq_elem.num_txqs = 1; txq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx); - tx_ctx.base = txq->tx_ring_phys_addr / ICE_QUEUE_BASE_ADDR_UNIT; + tx_ctx.base = txq->tx_ring_dma / ICE_QUEUE_BASE_ADDR_UNIT; tx_ctx.qlen = txq->nb_tx_desc; tx_ctx.pf_num = hw->pf_id; tx_ctx.vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_PF; @@ -663,7 +663,7 @@ ice_rx_queue_setup(struct rte_eth_dev *dev, /* Zero all the descriptors in the ring. */ memset(rz->addr, 0, ring_size); - rxq->rx_ring_phys_addr = rz->phys_addr; + rxq->rx_ring_dma = rz->iova; rxq->rx_ring = (union ice_rx_desc *)rz->addr; #ifdef RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC @@ -881,7 +881,7 @@ ice_tx_queue_setup(struct rte_eth_dev *dev, txq->vsi = vsi; txq->tx_deferred_start = tx_conf->tx_deferred_start; - txq->tx_ring_phys_addr = tz->phys_addr; + txq->tx_ring_dma = tz->iova; txq->tx_ring = (struct ice_tx_desc *)tz->addr; /* Allocate software ring */ diff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h index 9040e3f..e921411 100644 --- a/drivers/net/ice/ice_rxtx.h +++ b/drivers/net/ice/ice_rxtx.h @@ -46,7 +46,7 @@ struct ice_rx_entry { struct ice_rx_queue { struct rte_mempool *mp; /* mbuf pool to populate RX ring */ volatile union ice_rx_desc *rx_ring;/* RX ring virtual address */ - uint64_t rx_ring_phys_addr; /* RX ring DMA address */ + rte_iova_t rx_ring_dma; /* RX ring DMA address */ struct ice_rx_entry *sw_ring; /* address of RX soft ring */ uint16_t nb_rx_desc; /* number of RX descriptors */ uint16_t rx_free_thresh; /* max free RX desc to hold */ @@ -87,7 +87,7 @@ struct ice_tx_entry { struct ice_tx_queue { uint16_t nb_tx_desc; /* number of TX descriptors */ - uint64_t tx_ring_phys_addr; /* TX ring DMA address */ + rte_iova_t tx_ring_dma; /* TX ring DMA address */ volatile struct ice_tx_desc *tx_ring; /* TX ring virtual address */ struct ice_tx_entry *sw_ring; /* virtual address of SW ring */ uint16_t tx_tail; /* current value of tail register */