From patchwork Sat Jul 20 17:01:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Xiao Zhang X-Patchwork-Id: 56801 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2F4AF322C; Sat, 20 Jul 2019 10:06:16 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 491C12BBD; Sat, 20 Jul 2019 10:06:14 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Jul 2019 01:06:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,285,1559545200"; d="scan'208";a="367909509" Received: from npg-dpdk-zhangxiao.sh.intel.com ([10.67.110.190]) by fmsmga006.fm.intel.com with ESMTP; 20 Jul 2019 01:06:11 -0700 From: Xiao Zhang To: dev@dpdk.org Cc: wenzhuo.lu@intel.com, wei.zhao1@intel.com, qi.z.zhang@intel.com, Xiao Zhang , stable@dpdk.org Date: Sun, 21 Jul 2019 01:01:37 +0800 Message-Id: <1563642097-61350-1-git-send-email-xiao.zhang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1562593002-36586-1-git-send-email-xiao.zhang@intel.com> References: <1562593002-36586-1-git-send-email-xiao.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [v2] net/e1000: fix buffer overrun while i219 processing DMA transactions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Intel® 100/200 Series Chipset platforms reduced the round-trip latency for the LAN Controller DMA accesses, causing in some high performance cases a buffer overrun while the I219 LAN Connected Device is processing the DMA transactions. I219LM and I219V devices can fall into unrecovered Tx hang under very stressfully UDP traffic and multiple reconnection of Ethernet cable. This Tx hang of the LAN Controller is only recovered if the system is rebooted. Slightly slow down DMA access by reducing the number of outstanding requests. This workaround could have an impact on TCP traffic performance on the platform. Disabling TSO eliminates performance loss for TCP traffic without a noticeable impact on CPU performance. Please, refer to I218/I219 specification update: https://www.intel.com/content/www/us/en/embedded/products/networking/ ethernet-connection-i218-family-documentation.html Cc: stable@dpdk.org Signed-off-by: Xiao Zhang Acked-by: Qi Zhang --- v2 Change the fix from igb_rxtx to em_rxtx, since i219 use em PMD. v1 Apply kernel fix to igb PMD driver. --- drivers/net/e1000/base/e1000_ich8lan.h | 1 + drivers/net/e1000/em_rxtx.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h index bc4ed1d..9ee94f6 100644 --- a/drivers/net/e1000/base/e1000_ich8lan.h +++ b/drivers/net/e1000/base/e1000_ich8lan.h @@ -133,6 +133,7 @@ POSSIBILITY OF SUCH DAMAGE. #define E1000_FLASH_BASE_ADDR 0xE000 /*offset of NVM access regs*/ #define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */ #define E1000_TARC0_CB_MULTIQ_3_REQ (1 << 28 | 1 << 29) +#define E1000_TARC0_CB_MULTIQ_2_REQ (1 << 29) #define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL #define E1000_ICH_RAR_ENTRIES 7 diff --git a/drivers/net/e1000/em_rxtx.c b/drivers/net/e1000/em_rxtx.c index 0d0d38e..d53ee80 100644 --- a/drivers/net/e1000/em_rxtx.c +++ b/drivers/net/e1000/em_rxtx.c @@ -1970,6 +1970,22 @@ eth_em_tx_init(struct rte_eth_dev *dev) tctl |= (E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT)); + /* SPT and CNP Si errata workaround to avoid data corruption */ + if (hw->mac.type == e1000_pch_spt) { + uint32_t reg_val; + reg_val = E1000_READ_REG(hw, E1000_IOSFPC); + reg_val |= E1000_RCTL_RDMTS_HEX; + E1000_WRITE_REG(hw, E1000_IOSFPC, reg_val); + + /* Dropping the number of outstanding requests from + * 3 to 2 in order to avoid a buffer overrun. + */ + reg_val = E1000_READ_REG(hw, E1000_TARC(0)); + reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ; + reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ; + E1000_WRITE_REG(hw, E1000_TARC(0), reg_val); + } + /* This write will effectively turn on the transmit unit. */ E1000_WRITE_REG(hw, E1000_TCTL, tctl); }