From patchwork Mon Jul 22 14:58:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kanas X-Patchwork-Id: 56915 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 34CFF1BE8E; Mon, 22 Jul 2019 16:59:30 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id E3FBD1BE90 for ; Mon, 22 Jul 2019 16:59:27 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x6MEtXjH017844 for ; Mon, 22 Jul 2019 07:59:27 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=J/QZMMAxG6fcAoD2NmBPP//oRJ8dpyOijXuoF92tJ3M=; b=Blj0FrbvL/hn/TgMejQZyHCnmuzu7u2kukVR5KmTClU9q5skUc512dtLzz5ly2P98YBL OlQ6upMZkPhMT8rEnr/B/29oWWD5PTAWQ4eZrtagEe0JgUBd7/hiKPkNJBQ3NdbDhXrt qhtv5Iej+dcvcgsU/9gcM/2NKF80tarC//rmnQZPCgqLRd6TdcUnXwUh51lu5FP8GayG LvzsBNdDO1377dqR0QNlLqTHimwYygRqnkQD7uLqHMyINeOOdGYnHPVh8Yo/dYZxChDi j108qm7MsktO8tBjPfzzzAcZ45z1xwxm8r8qmrqG9qoCrr8cCrwO+DPz+wVGHlpDEdGC zA== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0a-0016f401.pphosted.com with ESMTP id 2tv0anygm7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 22 Jul 2019 07:59:27 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 22 Jul 2019 07:59:25 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 22 Jul 2019 07:59:25 -0700 Received: from kk-box-0.marvell.com (unknown [10.95.131.152]) by maili.marvell.com (Postfix) with ESMTP id 2F4A53F703F; Mon, 22 Jul 2019 07:59:23 -0700 (PDT) From: To: , Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K CC: Krzysztof Kanas Date: Mon, 22 Jul 2019 16:58:51 +0200 Message-ID: <20190722145851.14886-1-kkanas@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:5.22.84,1.0.8 definitions=2019-07-22_11:2019-07-22,2019-07-22 signatures=0 Subject: [dpdk-dev] [PATCH v2] net/octeontx2: fix driver reconfiguration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Krzysztof Kanas When configure returns error, e.g. in case not supported offloads (outer ip and sctp) driver released Rx,Tx queues. Then in case of correct configuration the driver could not start due to queues already released but the driver thought it was configured correctly. Secondly if driver returns error from configuration librte_ethdev will release, rx queues and tx queues, without chaining driver configured state. Fix that by 'releasing' configuration and changing driver state when error is returned from otx2_nix_configure. Fixes: 548b5839a32b ("net/octeontx2: add device configure operation") Signed-off-by: Krzysztof Kanas Reviewed-by: Jerin Jacob Kollanukkaran Reviewed-by: Nithin Kumar Dabilpuram Acked-by: Jerin Jacob --- drivers/net/octeontx2/otx2_ethdev.c | 65 +++++++++++++++++------------ 1 file changed, 38 insertions(+), 27 deletions(-) diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index fcb1869d5871..c6e0a515f0c4 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -1185,38 +1185,46 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) /* Sanity checks */ if (rte_eal_has_hugepages() == 0) { otx2_err("Huge page is not configured"); - goto fail; + goto fail_configure; } if (rte_eal_iova_mode() != RTE_IOVA_VA) { otx2_err("iova mode should be va"); - goto fail; + goto fail_configure; } if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { otx2_err("Setting link speed/duplex not supported"); - goto fail; + goto fail_configure; } if (conf->dcb_capability_en == 1) { otx2_err("dcb enable is not supported"); - goto fail; + goto fail_configure; } if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { otx2_err("Flow director is not supported"); - goto fail; + goto fail_configure; } if (rxmode->mq_mode != ETH_MQ_RX_NONE && rxmode->mq_mode != ETH_MQ_RX_RSS) { otx2_err("Unsupported mq rx mode %d", rxmode->mq_mode); - goto fail; + goto fail_configure; } if (txmode->mq_mode != ETH_MQ_TX_NONE) { otx2_err("Unsupported mq tx mode %d", txmode->mq_mode); - goto fail; + goto fail_configure; + } + + if (otx2_dev_is_Ax(dev) && + (txmode->offloads & DEV_TX_OFFLOAD_SCTP_CKSUM) && + ((txmode->offloads & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM) || + (txmode->offloads & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM))) { + otx2_err("Outer IP and SCTP checksum unsupported"); + goto fail_configure; } /* Free the resources allocated from the previous configure */ @@ -1230,20 +1238,11 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) nix_set_nop_rxtx_function(eth_dev); rc = nix_store_queue_cfg_and_then_release(eth_dev); if (rc) - goto fail; + goto fail_configure; otx2_nix_tm_fini(eth_dev); nix_lf_free(dev); } - if (otx2_dev_is_Ax(dev) && - (txmode->offloads & DEV_TX_OFFLOAD_SCTP_CKSUM) && - ((txmode->offloads & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM) || - (txmode->offloads & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM))) { - otx2_err("Outer IP and SCTP checksum unsupported"); - rc = -EINVAL; - goto fail; - } - dev->rx_offloads = rxmode->offloads; dev->tx_offloads = txmode->offloads; dev->rx_offload_flags |= nix_rx_offload_flags(eth_dev); @@ -1257,7 +1256,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) rc = nix_lf_alloc(dev, nb_rxq, nb_txq); if (rc) { otx2_err("Failed to init nix_lf rc=%d", rc); - goto fail; + goto fail_offloads; } /* Configure RSS */ @@ -1277,14 +1276,14 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) rc = otx2_nix_vlan_offload_init(eth_dev); if (rc) { otx2_err("Failed to init vlan offload rc=%d", rc); - goto free_nix_lf; + goto tm_fini; } /* Register queue IRQs */ rc = oxt2_nix_register_queue_irqs(eth_dev); if (rc) { otx2_err("Failed to register queue interrupts rc=%d", rc); - goto free_nix_lf; + goto vlan_fini; } /* Register cq IRQs */ @@ -1292,7 +1291,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) if (eth_dev->data->nb_rx_queues > dev->cints) { otx2_err("Rx interrupt cannot be enabled, rxq > %d", dev->cints); - goto free_nix_lf; + goto q_irq_fini; } /* Rx interrupt feature cannot work with vector mode because, * vector mode doesn't process packets unless min 4 pkts are @@ -1304,7 +1303,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) rc = oxt2_nix_register_cq_irqs(eth_dev); if (rc) { otx2_err("Failed to register CQ interrupts rc=%d", rc); - goto free_nix_lf; + goto q_irq_fini; } } @@ -1312,13 +1311,13 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) rc = cgx_intlbk_enable(dev, eth_dev->data->dev_conf.lpbk_mode); if (rc) { otx2_err("Failed to configure cgx loop back mode rc=%d", rc); - goto free_nix_lf; + goto q_irq_fini; } rc = otx2_nix_rxchan_bpid_cfg(eth_dev, true); if (rc) { otx2_err("Failed to configure nix rx chan bpid cfg rc=%d", rc); - goto free_nix_lf; + goto q_irq_fini; } /* Enable PTP if it was requested by the app or if it is already @@ -1338,7 +1337,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) if (dev->configured == 1) { rc = nix_restore_queue_cfg(eth_dev); if (rc) - goto free_nix_lf; + goto cq_fini; } /* Update the mac address */ @@ -1362,9 +1361,21 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) dev->configured_nb_tx_qs = data->nb_tx_queues; return 0; +cq_fini: + oxt2_nix_unregister_cq_irqs(eth_dev); +q_irq_fini: + oxt2_nix_unregister_queue_irqs(eth_dev); +vlan_fini: + otx2_nix_vlan_fini(eth_dev); +tm_fini: + otx2_nix_tm_fini(eth_dev); free_nix_lf: - rc = nix_lf_free(dev); -fail: + nix_lf_free(dev); +fail_offloads: + dev->rx_offload_flags &= ~nix_rx_offload_flags(eth_dev); + dev->tx_offload_flags &= ~nix_tx_offload_flags(eth_dev); +fail_configure: + dev->configured = 0; return rc; }