From patchwork Thu Aug 8 08:22:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57556 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 492912B9E; Thu, 8 Aug 2019 10:22:56 +0200 (CEST) Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) by dpdk.org (Postfix) with ESMTP id 02B862082 for ; Thu, 8 Aug 2019 10:22:53 +0200 (CEST) Received: by mail-wm1-f67.google.com with SMTP id u25so1481905wmc.4 for ; Thu, 08 Aug 2019 01:22:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=8Zrz47bKGdm5AKYH7KFpcAgs3fa6BrxTmQEchj0jXOQ=; b=QVsZqWu5n8favSRilxqJ6SkS/QRXKeMFS/cIvOwOSPo3GIr6P/TyJ6pvYi6ufV37l/ oYs5hr/BesCNNEatY/75Z3ZrzUtvL0GYZTUObJK0qIUjChpLCNMQ0/D+mX6Y28/eSal+ MZD/tQmBALxNh1DC1KyyMEe69mtD9sds7I/seM2l+eB3bK1O9nlfz+ZwZte9AuejzXWf eT3Q3V+UxDP9kKPe0mUfBFFlF5xIR04aOSMdnLeD9HlXyGHhqMju7pEB08vFqAz097AD B7ockCIBoqUxAhlvJ0MD7Cbt7OdKlo0IWR5Uzswnk+oHBG2Y3paPqgYd8bKa7NceZ/ZU oHng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=8Zrz47bKGdm5AKYH7KFpcAgs3fa6BrxTmQEchj0jXOQ=; b=FBOcQ0w1ufNv1o+EV689cXKxoq4P1bInFQ6d0Y/nwYcwCKYR1B1/qegGXw/oUmcP+3 PSk61X26PADArXdt5HV3fiKcVuS+vk3l9NxST+izmP5/krjoSuZlZz0fKXg6zl/8Uw6w 3MZceYrJxsXnFbrDnmztXYysiG8VU/581X2WAlxx2wsSzQnqOQbPV++KGFI/678vsA6X 79Xn264OEZvFEhpbwm2HWMatJE8e0+TkBCyEpHvTKmStuEJPguV7OWl08/baOmEvIjsG kpQ1iCji4b57wc5MU3RfXoO2S63GBj2mv9B/ccq2YbFxYlMU1G4HCfJcdjq1ejDQDA8f S0lQ== X-Gm-Message-State: APjAAAW9qNUmTtKZzuGyRHJ4rQBJXhZo84w4MfBw2sie9vS4UhlrWV/o RL1SokCUMEGJWF+bOpTR9fG+a5417g== X-Google-Smtp-Source: APXvYqyK5w45XnMkVdku61tcOytCQLgI11sy84sJXik3Gk6tgvHfygY3D9F+sFHqT4WAyIUmQ3pSww== X-Received: by 2002:a1c:a101:: with SMTP id k1mr2965386wme.98.1565252572553; Thu, 08 Aug 2019 01:22:52 -0700 (PDT) Received: from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.22.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:22:51 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: Guo Fengtian , stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:06 +0200 Message-Id: <89560edc429c59b7f79c3633cc5e9e5987bbdd9b.1565252336.git.thierry.herbelot@6wind.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 01/12] net/ixgbevf: fix stats update after a PF reset X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Guo Fengtian When PF is set down, in VF, the value of stats register is zero. So only increase stats when it's non zero. Fixes: af75078fece3 ('first public release') Cc: stable@dpdk.org Signed-off-by: Guo Fengtian --- drivers/net/ixgbe/ixgbe_ethdev.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 03fc1f71799c..57f5bfa219c1 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -385,7 +385,8 @@ static void ixgbe_l2_tunnel_conf(struct rte_eth_dev *dev); #define UPDATE_VF_STAT(reg, last, cur) \ { \ uint32_t latest = IXGBE_READ_REG(hw, reg); \ - cur += (latest - last) & UINT_MAX; \ + if (latest) \ + cur += (latest - last) & UINT_MAX; \ last = latest; \ } @@ -394,7 +395,8 @@ static void ixgbe_l2_tunnel_conf(struct rte_eth_dev *dev); u64 new_lsb = IXGBE_READ_REG(hw, lsb); \ u64 new_msb = IXGBE_READ_REG(hw, msb); \ u64 latest = ((new_msb << 32) | new_lsb); \ - cur += (0x1000000000LL + latest - last) & 0xFFFFFFFFFLL; \ + if (latest) \ + cur += (0x1000000000LL + latest - last) & 0xFFFFFFFFFLL;\ last = latest; \ } From patchwork Thu Aug 8 08:22:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57557 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4A4D92B9C; Thu, 8 Aug 2019 10:22:59 +0200 (CEST) Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by dpdk.org (Postfix) with ESMTP id E1A7C2A6A for ; Thu, 8 Aug 2019 10:22:53 +0200 (CEST) Received: by mail-wr1-f65.google.com with SMTP id g17so93976320wrr.5 for ; Thu, 08 Aug 2019 01:22:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=1ap8Frg/Gf51xmOYNsf5m9BH5ZgczfUC5RTDt84nhnI=; b=W5CNif+OZ9ojBqOBx53h9zBcvK45SwhfPqrPXEBuxbAPAuMJOPY/sVujpFKyR/vPln 4UbhGYz/Vj6oh84x1ufMhIe2Jb4wumqAGMJNmSxplPIhi/FRiFd7+ZZnMmPx01eNswI/ hfU4ilN3PBKiBQXF+vY/BLa/quzVoZoBDKRcW7N6Bh1Gw2EQOOkXc2Vxi3JsmMi3eGqw d8qdP3/ol5Wt04dCh6HxYHaYa+rClj630ZXftaCGnyRq4Cn/LNHJr6h1gJ7IxUwyHsUJ voji1oJWeezsS8/yGX1xw/ia3ATk5PS+yFZg7J29bPnk3/RaqM/xnMxXSAZcUPlxkVuc xEoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=1ap8Frg/Gf51xmOYNsf5m9BH5ZgczfUC5RTDt84nhnI=; b=oS0kxdjjErIMO+ToAVGRm8goI0lQ6syG2Bf/FVRvzBuZU724DJcXv5fHucHUhwLAzt N7Mmo6tJPDfq+lHw7qdJTPTUwA+BwFfEPcCbkGp7lJUIaVYqkh9HNNSgHT7BASv7/r9y EHeMsdyjzRGoRVxUN5sBM/2Lv5dSTS4WsYYwVfTPiN+5PZ/TP/jxKguJNOdChgu6S0L1 D6BPJMFNa7wj9v16QuondRlRP8bpJkijm5DLq8EWrJytc3VBRmBEZE/60Naq87yHWxEo mRadkxGKhRSz4TACGXZLJ4lmzuuKgm15NVqYxGQolObh6bMUU9h3nXI108vYPwVr2UAi Mvvg== X-Gm-Message-State: APjAAAVmgrux1xLU6Twmf/HWzYFoRHYBLUBiNqyZk4e9tjwE4VuK+WV5 9G/C5gy0aWgemufePs5GvJDyr7kBCQ== X-Google-Smtp-Source: APXvYqzxAAjFc4ycT32534cBCULrWMEa2WN2EGfZquY0QkmhXGRPMmLKVlBVykg8o7CXqLb70JLX/g== X-Received: by 2002:a05:6000:1189:: with SMTP id g9mr16559011wrx.51.1565252573483; Thu, 08 Aug 2019 01:22:53 -0700 (PDT) Received: from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.22.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:22:52 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: Olivier Matz , stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:07 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 02/12] ethdev: fix description of tx descriptor status X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Olivier Matz The API comment of rte_eth_tx_descriptor_status() was incorrect. The reference descriptor (when offset = 0) is not where the next packet will be sent, but where the latest packet has been enqueued. Fixes: 52f5cdd2e897 ("ethdev: add descriptor status API") Cc: stable@dpdk.org Signed-off-by: Olivier Matz --- lib/librte_ethdev/rte_ethdev.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h index dc6596bc93b4..b423e71050e9 100644 --- a/lib/librte_ethdev/rte_ethdev.h +++ b/lib/librte_ethdev/rte_ethdev.h @@ -4245,8 +4245,8 @@ rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id, * @param queue_id * A valid Tx queue identifier on this port. * @param offset - * The offset of the descriptor starting from tail (0 is the place where - * the next packet will be send). + * The offset of the descriptor starting from tail (0 is the last written + * descriptor). * * @return * - (RTE_ETH_TX_DESC_FULL) Descriptor is being processed by the hw, i.e. From patchwork Thu Aug 8 08:22:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57558 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BA9F42BF1; Thu, 8 Aug 2019 10:23:02 +0200 (CEST) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by dpdk.org (Postfix) with ESMTP id BE53A2B87 for ; Thu, 8 Aug 2019 10:22:54 +0200 (CEST) Received: by mail-wr1-f68.google.com with SMTP id k2so8137890wrq.2 for ; Thu, 08 Aug 2019 01:22:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=gTFJzslpHYR9f3LHN3S3BY6ntDu6T1luGQ2TnkCujSw=; b=XY1n8fq7qCYaBAKR6OUoWyiUnO8h3/Ju2Yd2A+lwyf1+3MoHEVlb6aRqg4tilCiA5V FHkWfjRDNtNXdTL7QS1A/DPflmu6oyUFVz3Xm+QEiqwh8+l7Hx1S9i8rsMnisEYt48+b FhP7X2XgaZn1fgABsd+I5xKqxrni2W0F8fXE4JuRnFiIGc0yvjKOZENuK4YicgxIN+BS BpYrW5kObLHArCTy++goonYL7jDBaWxW/QeUlNW66sIQ8BJUWZWy6mAL/FhpoirkmSET PiO1KSVMvUpCxCl2okmMNgPMsfd6/OvQ9sxMaa5UD1uQjZjcUdCLW6fcgoAwHEc5d21M y3tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=gTFJzslpHYR9f3LHN3S3BY6ntDu6T1luGQ2TnkCujSw=; b=fLip2T5sJPQirhzNx5kakqyi0DT8TmELrfDtexSGVbPdnvMDK7KcUzATHbBgaveEoA 9SGtL5UOntcY+6MQhI79f72m8wot0eLRqQbJ1sTy3pZHUCcgjMJnl5BLkB7ksyyARMYQ 7AIBKUPSQDrCF2JdL1zvPOX//bIED6cfcnLwTnJpHmScjIREzzDKTCmkPgL8UnsZDjN7 hFUqSQf0fpAvIn31nX8Wuegbnher+8YzHUE6xjCgbtcX5IaUGKuNKdaQxUD5qRFlPq/7 xAzsW9BwbGbURMftmTpvqSDAg4wh7RrLzpx2gPpNteHVvpdd4jQbycJcRgbkuuP9hRLn h0Iw== X-Gm-Message-State: APjAAAXKNdJ3DKrAT+sFTSc22Fjycwsm1Ju8+ron6E3AOYL/xFSaAUsB h05jX4vZSqUhqmREJ7qcOAfpKiHBew== X-Google-Smtp-Source: APXvYqzxWFl9WIRxRdqmS8o3HxjO1MUP6qn5so92aYW1kf20LaYgqYRGa9AhuPH9YKA03E7+0BiUpA== X-Received: by 2002:a05:6000:152:: with SMTP id r18mr5161056wrx.41.1565252574335; Thu, 08 Aug 2019 01:22:54 -0700 (PDT) Received: from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.22.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:22:53 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: Olivier Matz , stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:08 +0200 Message-Id: <6fa4aa21b2ab176fcc767272f8ab3dc59907d5a1.1565252336.git.thierry.herbelot@6wind.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 03/12] net/e1000: fix Tx descriptor status api (igb) X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Olivier Matz The Tx descriptor status api was not behaving as expected. This API is used to inspect the content of the descriptors in the Tx ring to determine the length of the Tx queue. Since the software advances the tail pointer and the hardware advances the head pointer, the Tx queue is located before txq->tx_tail in the ring. Therefore, a call to rte_eth_tx_descriptor_status(..., offset=20) should inspect the 20th descriptor before the tail, not after. Fixes: 978f8eea1719 ("net/e1000: implement descriptor status API (igb)") Cc: stable@dpdk.org Signed-off-by: Olivier Matz --- drivers/net/e1000/igb_rxtx.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c index c5606de5d7a0..c22118e59a21 100644 --- a/drivers/net/e1000/igb_rxtx.c +++ b/drivers/net/e1000/igb_rxtx.c @@ -1835,14 +1835,15 @@ eth_igb_tx_descriptor_status(void *tx_queue, uint16_t offset) { struct igb_tx_queue *txq = tx_queue; volatile uint32_t *status; - uint32_t desc; + int32_t desc; if (unlikely(offset >= txq->nb_tx_desc)) return -EINVAL; - desc = txq->tx_tail + offset; - if (desc >= txq->nb_tx_desc) - desc -= txq->nb_tx_desc; + desc = txq->tx_tail - offset - 1; + if (desc < 0) + desc += txq->nb_tx_desc; + desc = txq->sw_ring[desc].last_id; status = &txq->tx_ring[desc].wb.status; if (*status & rte_cpu_to_le_32(E1000_TXD_STAT_DD)) From patchwork Thu Aug 8 08:22:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57559 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9BFB42C2F; Thu, 8 Aug 2019 10:23:04 +0200 (CEST) Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) by dpdk.org (Postfix) with ESMTP id BAFD02B87 for ; Thu, 8 Aug 2019 10:22:55 +0200 (CEST) Received: by mail-wr1-f67.google.com with SMTP id p17so93966558wrf.11 for ; Thu, 08 Aug 2019 01:22:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=kjmIHGsCfgqSzCSWzLj6cccbRySma6yWkdPueL4fIXk=; b=XrSoM7sWYMW5j5IWtXBl1iCLMJlzGsHmiPbeDmS+43JpPLJpeYOrefDDIrCks7+8wk 8jdWKXHmpCOGSEaoT12mYxvsITzrVJgH8i0aCo6uLXo66qkj2rorfEgaLATy5/7otaZ2 h4+A5222xF43dswxLL2QWoK+CVMHj9cc8nZosENMtkMxyvLkPjThUYTcbJdKKRSMxDwU f58t7bGrgoE0mqC5xA3eEK2S8Rg5QbHdgDUlvjCfZlQZEbhhlSocDfpz8eXg/w582jKZ UHqMhvuwjSxi4IKqMnlbDj9c8zoB5FIvXJEzhIEhZecJEeDTvCIQ58j5oVnrx/RcvV5S gxCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=kjmIHGsCfgqSzCSWzLj6cccbRySma6yWkdPueL4fIXk=; b=UXK1X8IeGoPnh5HbxOiNWmUQxJCFavLMb92aJNQdbtvUNs3bWPFK6GRgs/5ttRjXCH vzqwWKVWEGsRCIYGAX0o0Ec/Redys4rvbuut3gwaJ9v0T11LndqJI3+Bd75oMESdgb13 Wp/cPKRRUFk9Inu6wlYms5WmFZBuRaojBSLKYUY+Ny6iLRiw2S0Ol1atVGscitGBd6Eh nUYaD0F1Q7dvhmzWgUpQvbFMvWPNH4WQXV3cvdiYX8vHQgGWmTCH5Yz59+ZevgDQJrZs dxHCYak/b3AbeFpoDRRZTNtigTLyfmOv1A9ghZcxMkb5TTnXIVkguO7tbDEWTO4ixhM0 aDHw== X-Gm-Message-State: APjAAAWF5IbJqSSyhpTUJwqYpKbZIcaTXCPDLkLwT6FLqL9UV2GLrAk5 7YHXHV/VfrUTLN5W+8ip2iA84o37cg== X-Google-Smtp-Source: APXvYqxO0ia4eDa3gMWwuBVnKXeLBonG7tjHczT9hRAeiuCufZzH1B+/Ns7ex3eM0XPhYNEuvk5fKw== X-Received: by 2002:adf:ef10:: with SMTP id e16mr2981012wro.33.1565252575217; Thu, 08 Aug 2019 01:22:55 -0700 (PDT) Received: from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.22.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:22:54 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: Olivier Matz , stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:09 +0200 Message-Id: <60cc9d06e52d4a574be950720c37fd0dc6abc55f.1565252336.git.thierry.herbelot@6wind.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 04/12] net/e1000: fix Tx descriptor status api (em) X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Olivier Matz The Tx descriptor status api was not behaving as expected. This API is used to inspect the content of the descriptors in the Tx ring to determine the length of the Tx queue. Since the software advances the tail pointer and the hardware advances the head pointer, the Tx queue is located before txq->tx_tail in the ring. Therefore, a call to rte_eth_tx_descriptor_status(..., offset=20) should inspect the 20th descriptor before the tail, not after. As before, we still need to take care about only checking descriptors that have the RS bit. Additionally, we can avoid an access to the ring if offset is greater or equal to nb_tx_desc - nb_tx_free. Fixes: b9082317cab3 ("net/e1000: implement descriptor status API (em)") Cc: stable@dpdk.org Signed-off-by: Olivier Matz --- drivers/net/e1000/em_rxtx.c | 33 +++++++++++++++++++++++---------- 1 file changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/net/e1000/em_rxtx.c b/drivers/net/e1000/em_rxtx.c index 5925e490641b..3061998c7768 100644 --- a/drivers/net/e1000/em_rxtx.c +++ b/drivers/net/e1000/em_rxtx.c @@ -152,6 +152,7 @@ struct em_tx_queue { uint64_t tx_ring_phys_addr; /**< TX ring DMA address. */ struct em_tx_entry *sw_ring; /**< virtual address of SW ring. */ volatile uint32_t *tdt_reg_addr; /**< Address of TDT register. */ + volatile uint32_t *tdh_reg_addr; /**< Address of TDH register. */ uint16_t nb_tx_desc; /**< number of TX descriptors. */ uint16_t tx_tail; /**< Current value of TDT register. */ /**< Start freeing TX buffers if there are less free descriptors than @@ -1304,6 +1305,7 @@ eth_em_tx_queue_setup(struct rte_eth_dev *dev, txq->port_id = dev->data->port_id; txq->tdt_reg_addr = E1000_PCI_REG_ADDR(hw, E1000_TDT(queue_idx)); + txq->tdh_reg_addr = E1000_PCI_REG_ADDR(hw, E1000_TDH(queue_idx)); txq->tx_ring_phys_addr = tz->iova; txq->tx_ring = (struct e1000_data_desc *) tz->addr; @@ -1557,22 +1559,33 @@ eth_em_tx_descriptor_status(void *tx_queue, uint16_t offset) { struct em_tx_queue *txq = tx_queue; volatile uint8_t *status; - uint32_t desc; + int32_t desc, dd; if (unlikely(offset >= txq->nb_tx_desc)) return -EINVAL; + if (offset >= txq->nb_tx_desc - txq->nb_tx_free) + return RTE_ETH_TX_DESC_DONE; - desc = txq->tx_tail + offset; - /* go to next desc that has the RS bit */ - desc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) * - txq->tx_rs_thresh; - if (desc >= txq->nb_tx_desc) { - desc -= txq->nb_tx_desc; - if (desc >= txq->nb_tx_desc) - desc -= txq->nb_tx_desc; + desc = txq->tx_tail - offset - 1; + if (desc < 0) + desc += txq->nb_tx_desc; + + /* offset is too small, no other way than reading PCI reg */ + if (unlikely(offset < txq->tx_rs_thresh)) { + int16_t tx_head, queue_size; + tx_head = e1000_read_addr(txq->tdh_reg_addr); + queue_size = txq->tx_tail - tx_head; + if (queue_size < 0) + queue_size += txq->nb_tx_desc; + return queue_size > offset ? RTE_ETH_TX_DESC_FULL : + RTE_ETH_TX_DESC_DONE; } - status = &txq->tx_ring[desc].upper.fields.status; + /* index of the dd bit to look at */ + dd = (desc / txq->tx_rs_thresh + 1) * txq->tx_rs_thresh - 1; + dd = txq->sw_ring[dd].last_id; + + status = &txq->tx_ring[dd].upper.fields.status; if (*status & E1000_TXD_STAT_DD) return RTE_ETH_TX_DESC_DONE; From patchwork Thu Aug 8 08:22:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57560 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4B5A73253; Thu, 8 Aug 2019 10:23:06 +0200 (CEST) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by dpdk.org (Postfix) with ESMTP id 8DD472BA2 for ; Thu, 8 Aug 2019 10:22:56 +0200 (CEST) Received: by mail-wr1-f66.google.com with SMTP id n9so94105683wru.0 for ; Thu, 08 Aug 2019 01:22:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=8O5D8oaKajRKAycKCWBOPr1JPd+AjkcPPBYy+pLUd5Q=; b=Da64D8GakfVjCGz1+46dhpXw57VRQF4yJdcxD9OPXkdxX5Zw7BbhyIngAEtq75AeSZ tBlNSA8BSVgvy+chtVHfimndYDjDD2e/84iirbs2GQVLD3oHkidkLMTqyArQbSd29Qke g9IFLFP21fnusA/vVU6PY8+yOtfgKRuGZbMRMjAbvk+ChF24OmoN9rix4M5E0OnVitz6 n+HP50vHpJGuxhDCL4INeJwe1JVrtM18yGj6AgugZh7eujHN+/icIplWG2/pnl/TfVoA yyStOx4aDclHTxNF3v/xxBqBvS5NxO7Lmu38LTvPQZe/Z7axTT8Q8i/nCw/WW7EecyEa wFyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=8O5D8oaKajRKAycKCWBOPr1JPd+AjkcPPBYy+pLUd5Q=; b=OHO9Vjng0RznvQjqEYRdqjmbWusPwwwmviXCh8eRSlo8L2phrsREUut1AFBYOf3/hF BcxrsLGgXG8lnA9QlTZZMBMs1yFioSmO05abFDQ1551iKvTReJ/E+kftjH1pJyar24Ke OBMndXomDptOYAP0gdWvxwA+PEl0rV6dYb8Nc4/2hDvb/vFnnILTKeCd84Y+yO0u+MSm qWszo0weiJ5eckkKbdiIFNaFDgiTEE8V/KhibFLiRYTG+HNS+e1zSc8bMVLDLWCO74zz DdWG8dOci2CcTx1kdn0oyXf1Ry7cO6cCautsywl5gNBP07huZygCD8d7V61oenYSnWp0 aaaw== X-Gm-Message-State: APjAAAWJuI9vMv2kSmqXyTlgvYhRXD88PkBL1R4td0F5SfLoZPIyhn85 XN6wVH2HE+gR+2Z/J8gCYuaBD9P4WQ== X-Google-Smtp-Source: APXvYqz0G7NkO7YUKtQ8H1WN/9gHYkIhnQ9KNLp0qF9T5dZX5o1xrTYPA6lywhrPbhbc+FZ3s8OaOg== X-Received: by 2002:adf:e390:: with SMTP id e16mr6953998wrm.153.1565252576100; Thu, 08 Aug 2019 01:22:56 -0700 (PDT) Received: from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.22.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:22:55 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: Olivier Matz , stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:10 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 05/12] net/ixgbe: fix Tx descriptor status api X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Olivier Matz The Tx descriptor status api was not behaving as expected. This API is used to inspect the content of the descriptors in the Tx ring to determine the length of the Tx queue. Since the software advances the tail pointer and the hardware advances the head pointer, the Tx queue is located before txq->tx_tail in the ring. Therefore, a call to rte_eth_tx_descriptor_status(..., offset=20) should inspect the 20th descriptor before the tail, not after. As before, we still need to take care about only checking descriptors that have the RS bit. Additionally, we can avoid an access to the ring if offset is greater or equal to nb_tx_desc - nb_tx_free. Fixes: 5da8b8814178 ("net/ixgbe: implement descriptor status API") Cc: stable@dpdk.org Signed-off-by: Olivier Matz --- drivers/net/ixgbe/ixgbe_rxtx.c | 45 +++++++++++++++++++++++++++++++----------- drivers/net/ixgbe/ixgbe_rxtx.h | 1 + 2 files changed, 34 insertions(+), 12 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index edcfa60cec98..4abc2fe37488 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -2627,10 +2627,15 @@ ixgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, hw->mac.type == ixgbe_mac_X540_vf || hw->mac.type == ixgbe_mac_X550_vf || hw->mac.type == ixgbe_mac_X550EM_x_vf || - hw->mac.type == ixgbe_mac_X550EM_a_vf) + hw->mac.type == ixgbe_mac_X550EM_a_vf) { txq->tdt_reg_addr = IXGBE_PCI_REG_ADDR(hw, IXGBE_VFTDT(queue_idx)); - else + txq->tdh_reg_addr = IXGBE_PCI_REG_ADDR(hw, + IXGBE_VFTDH(queue_idx)); + } else { txq->tdt_reg_addr = IXGBE_PCI_REG_ADDR(hw, IXGBE_TDT(txq->reg_idx)); + txq->tdh_reg_addr = IXGBE_PCI_REG_ADDR(hw, + IXGBE_TDH(txq->reg_idx)); + } txq->tx_ring_phys_addr = tz->iova; txq->tx_ring = (union ixgbe_adv_tx_desc *) tz->addr; @@ -3163,22 +3168,38 @@ ixgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset) { struct ixgbe_tx_queue *txq = tx_queue; volatile uint32_t *status; - uint32_t desc; + int32_t desc, dd; if (unlikely(offset >= txq->nb_tx_desc)) return -EINVAL; + if (offset >= txq->nb_tx_desc - txq->nb_tx_free) + return RTE_ETH_TX_DESC_DONE; + + desc = txq->tx_tail - offset - 1; + if (desc < 0) + desc += txq->nb_tx_desc; - desc = txq->tx_tail + offset; - /* go to next desc that has the RS bit */ - desc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) * - txq->tx_rs_thresh; - if (desc >= txq->nb_tx_desc) { - desc -= txq->nb_tx_desc; - if (desc >= txq->nb_tx_desc) - desc -= txq->nb_tx_desc; + /* offset is too small, no other way than reading PCI reg */ + if (unlikely(offset < txq->tx_rs_thresh)) { + int16_t tx_head, queue_size; + tx_head = ixgbe_read_addr(txq->tdh_reg_addr); + queue_size = txq->tx_tail - tx_head; + if (queue_size < 0) + queue_size += txq->nb_tx_desc; + return queue_size > offset ? RTE_ETH_TX_DESC_FULL : + RTE_ETH_TX_DESC_DONE; } - status = &txq->tx_ring[desc].wb.status; + /* index of the dd bit to look at */ + dd = (desc / txq->tx_rs_thresh + 1) * txq->tx_rs_thresh - 1; + + /* In full featured mode, RS bit is only set in the last descriptor */ + /* of a multisegments packet */ + if (!(txq->offloads == 0 && + txq->tx_rs_thresh >= RTE_PMD_IXGBE_TX_MAX_BURST)) + dd = txq->sw_ring[dd].last_id; + + status = &txq->tx_ring[dd].wb.status; if (*status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD)) return RTE_ETH_TX_DESC_DONE; diff --git a/drivers/net/ixgbe/ixgbe_rxtx.h b/drivers/net/ixgbe/ixgbe_rxtx.h index 505d344b9cee..05fd4167576c 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.h +++ b/drivers/net/ixgbe/ixgbe_rxtx.h @@ -201,6 +201,7 @@ struct ixgbe_tx_queue { struct ixgbe_tx_entry_v *sw_ring_v; /**< address of SW ring for vector PMD */ }; volatile uint32_t *tdt_reg_addr; /**< Address of TDT register. */ + volatile uint32_t *tdh_reg_addr; /**< Address of TDH register. */ uint16_t nb_tx_desc; /**< number of TX descriptors. */ uint16_t tx_tail; /**< current value of TDT reg. */ /**< Start freeing TX buffers if there are less free descriptors than From patchwork Thu Aug 8 08:22:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57561 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1413834F2; Thu, 8 Aug 2019 10:23:09 +0200 (CEST) Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) by dpdk.org (Postfix) with ESMTP id 715E5276C for ; Thu, 8 Aug 2019 10:22:57 +0200 (CEST) Received: by mail-wr1-f67.google.com with SMTP id b3so1596319wro.4 for ; Thu, 08 Aug 2019 01:22:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=0GlbaRdccY54BFN5ZohRBC0g+CI7Vg9FEOu0cE4CYKM=; b=RlfGjRAG24JbrFWtkFWGwuCGAj2F3AUO1voLnHqpEE/SVP3STQeKPMolMsc/fOiX26 rEHAaurMZ5o4k1s/qtPw0GtjHlYFpg7Uz3cNFSbNwur/o3AezIWseTGh4oNqaOBMYECR 4LyGKRo7CDZd1/REfV4di0uGOthGM5J1m2MwIi51eCdxnuHpnB6dCh6bZ+2ulEbO0OAN v5BROrpNnqDo042G7IAtCfeyT+bwgPOpIV0jaqZsTwuE+/RA85Q8BFL3Ze0HQAQOBoWp YsL/lQN7MTe3/gbLK8NCgO9cl7BxhOzSoVHUnW1822eyloPusWAMnJKwyWvbK2srfeCc aFHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=0GlbaRdccY54BFN5ZohRBC0g+CI7Vg9FEOu0cE4CYKM=; b=cp2gR4VQaOc3dlYcmoOAccidivMHLVsWJ90wIBC5hjcDMjPsl9kXy9oX1CFLqZYgox 8EKUQy2qTovOUCXbdpd02BY+0NWiHgqu63D8CR7m/kF5xBDE4SHz+r7Vm8BzyR8eKfI+ LCDkHk/dRhE8PakWoyLXeBoMmU69LBmI4v3gT/lQap6gV1S34lJrA9zukiLuLcuV1r1m 920iPV4ZoMtvpugL3Yxsc87t2kbF2edQOi8Q7OVKN/7ZtSUMmIzkqXQh1rFtjVwzGzAd 3ObaA/+IKchWTsth5ATqcvRWz6fLAjvBb9m4h8yDzlJkRNnA1ZOa1iTKzkcjN7Hyvox7 Cn9w== X-Gm-Message-State: APjAAAWzNIb+lUqcRGcFTjjkHlQlLcpQdiKAubKQm/P78i1JZRCgozow GRUiBdPNgcYBbD73HPh5UNWBnnq7pQ== X-Google-Smtp-Source: APXvYqyAwHBzrH77dNHsxUb5bFSwesU8lsOW7tYNU1OYAK5BUpduSZ8bcoMvpdqW84ebkUeEhDcbCw== X-Received: by 2002:adf:ea4c:: with SMTP id j12mr16098540wrn.75.1565252576982; Thu, 08 Aug 2019 01:22:56 -0700 (PDT) Received: from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.22.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:22:56 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: Olivier Matz , stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:11 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 06/12] net/i40e: fix Tx descriptor status api X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Olivier Matz The Tx descriptor status api was not behaving as expected. This API is used to inspect the content of the descriptors in the Tx ring to determine the length of the Tx queue. Since the software advances the tail pointer and the hardware advances the head pointer, the Tx queue is located before txq->tx_tail in the ring. Therefore, a call to rte_eth_tx_descriptor_status(..., offset=20) should inspect the 20th descriptor before the tail, not after. As before, we still need to take care about only checking descriptors that have the RS bit. Additionally, we can avoid an access to the ring if offset is greater or equal to nb_tx_desc - nb_tx_free. Fixes: a9dd9af6f38e ("net/i40e: implement descriptor status API") Cc: stable@dpdk.org Signed-off-by: Olivier Matz --- drivers/net/i40e/i40e_rxtx.c | 37 +++++++++++++++++++++++++++---------- 1 file changed, 27 insertions(+), 10 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index 692c3bab4b5f..d84a97732f1e 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -2031,22 +2031,39 @@ i40e_dev_tx_descriptor_status(void *tx_queue, uint16_t offset) struct i40e_tx_queue *txq = tx_queue; volatile uint64_t *status; uint64_t mask, expect; - uint32_t desc; + int32_t desc, dd; if (unlikely(offset >= txq->nb_tx_desc)) return -EINVAL; + if (offset >= txq->nb_tx_desc - txq->nb_tx_free) + return RTE_ETH_TX_DESC_DONE; + + desc = txq->tx_tail - offset - 1; + if (desc < 0) + desc += txq->nb_tx_desc; - desc = txq->tx_tail + offset; - /* go to next desc that has the RS bit */ - desc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) * - txq->tx_rs_thresh; - if (desc >= txq->nb_tx_desc) { - desc -= txq->nb_tx_desc; - if (desc >= txq->nb_tx_desc) - desc -= txq->nb_tx_desc; + /* offset is too small, no other way than reading PCI reg */ + if (unlikely(offset < txq->tx_rs_thresh)) { + int16_t tx_head, queue_size; + tx_head = I40E_READ_REG(I40E_VSI_TO_HW(txq->vsi), + I40E_QTX_HEAD(txq->reg_idx)); + queue_size = txq->tx_tail - tx_head; + if (queue_size < 0) + queue_size += txq->nb_tx_desc; + return queue_size > offset ? RTE_ETH_TX_DESC_FULL : + RTE_ETH_TX_DESC_DONE; } - status = &txq->tx_ring[desc].cmd_type_offset_bsz; + /* index of the dd bit to look at */ + dd = (desc / txq->tx_rs_thresh + 1) * txq->tx_rs_thresh - 1; + + /* In full featured mode, RS bit is only set in the last descriptor */ + /* of a multisegments packet */ + if (!(txq->offloads == 0 && + txq->tx_rs_thresh >= RTE_PMD_I40E_TX_MAX_BURST)) + dd = txq->sw_ring[dd].last_id; + + status = &txq->tx_ring[dd].cmd_type_offset_bsz; mask = rte_le_to_cpu_64(I40E_TXD_QW1_DTYPE_MASK); expect = rte_cpu_to_le_64( I40E_TX_DESC_DTYPE_DESC_DONE << I40E_TXD_QW1_DTYPE_SHIFT); From patchwork Thu Aug 8 08:22:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57562 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C28F04C96; Thu, 8 Aug 2019 10:23:10 +0200 (CEST) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by dpdk.org (Postfix) with ESMTP id 569AF2BA2 for ; Thu, 8 Aug 2019 10:22:58 +0200 (CEST) Received: by mail-wr1-f66.google.com with SMTP id p17so93966681wrf.11 for ; Thu, 08 Aug 2019 01:22:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=afZoqfzpWQuC9ViJWMOoQR0Yyw87jibufsab0QXr4mA=; b=Lg5QVWrWsphZ8oq8POUxSgc06S1+GuewoDAUqA68NSZh6bd9gLm3cyaiP23qPA2MAn j8dBezwVFd29bIVmkvAt9ra5+krHrV23EqMpycjCoyHbMi299WBm3M3fHCc/XMCRSPYe O9CpwiTo/siSx1QWzAwEpTCzUsCk4xDbqPyAM0bfVpfLguR9kG8WA3hqM9cezuIghpA6 iu7QI6DkjKTlkJ7g5uxxbPFZtNpFL/RpmTqjaLHS8rtYwvo3m/Wvapy5IVL2UjyUN9YZ RXT62NbMwTQzOAU2hpflV0lK/kdo60sOAJ65GhbSmCx/TXdX/yN/7GB1tiNXVRY0l3eb 28pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=afZoqfzpWQuC9ViJWMOoQR0Yyw87jibufsab0QXr4mA=; b=TKFXHBa/45HDXemgLusvKj5kGtoj1JyemyIR1yB/+kYnQNyQPm7AJfR30pbQanrO9E mKz8Cvrp9rrO0J9tmkapSSOMyjyWTWULZ1yPjqbnspjt0nedNKXwY+h5eB313bWu5o9V DA4TuC7F3mY7O5Av+lMFFJovSQeHQF5k+ehf6PaeCb/puDUX62A0s5zhHZ4Q6TgdSLL/ 2onlIJo226hBjT5WAs4GUl8bb2kq8tAjZmlpyLTc3nHoQrZk6OUPazeHPMuXYWMSXjjp EtdWHs0GMqyCOtJQEDa3qabSQWICLhOjCn1CsaMcP8BmiB4X8RPJEPld0K3svGlc58+P ZAPA== X-Gm-Message-State: APjAAAVe2l6dEQPNoCotPFgRr2zAchnMcXX/w35H71QdzJ96CL36bOwU ZvUPuZTBRv4eFDH9tG0TItxzzJ3jGg== X-Google-Smtp-Source: APXvYqyu+5tOn+EhLPL+KXH/KekugAltuIBkPnvrK0MH4iXMYpBCyempLWtHIGWhFXSWDI2kFF1ZTg== X-Received: by 2002:adf:93a4:: with SMTP id 33mr11253789wrp.187.1565252577937; Thu, 08 Aug 2019 01:22:57 -0700 (PDT) Received: from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.22.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:22:57 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: Laurent Hardy , stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:12 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 07/12] net/i40e: set speed to undefined for default case in link update X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Laurent Hardy During PF/VF link update, a default speed value of 100M will be set if get_link_info has failed or speed is unknown. Consequently if PF is put in no-carrier state, VFs will switch to "in carrier" state due to a link up + a link speed set to 100M (default value if no speed detected). To be consistent with linux drivers on which PF and VFs are in same carrier state, sets default speed to undefined (instead of 100M) and updates a link status of VF only if link is up and speed is different from undefined. Fixes: 4861cde46116 ('i40e: new poll mode driver') Cc: stable@dpdk.org Signed-off-by: Laurent Hardy --- drivers/net/i40e/i40e_ethdev.c | 4 ++-- drivers/net/i40e/i40e_ethdev_vf.c | 8 +++++--- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 4e40b7ab5250..76abe8209a10 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -2743,7 +2743,7 @@ update_link_aq(struct i40e_hw *hw, struct rte_eth_link *link, status = i40e_aq_get_link_info(hw, enable_lse, &link_status, NULL); if (unlikely(status != I40E_SUCCESS)) { - link->link_speed = ETH_SPEED_NUM_100M; + link->link_speed = ETH_SPEED_NUM_NONE; link->link_duplex = ETH_LINK_FULL_DUPLEX; PMD_DRV_LOG(ERR, "Failed to get link info"); return; @@ -2777,7 +2777,7 @@ update_link_aq(struct i40e_hw *hw, struct rte_eth_link *link, link->link_speed = ETH_SPEED_NUM_40G; break; default: - link->link_speed = ETH_SPEED_NUM_100M; + link->link_speed = ETH_SPEED_NUM_NONE; break; } } diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c index 308fb9835ab1..bf707e57b29b 100644 --- a/drivers/net/i40e/i40e_ethdev_vf.c +++ b/drivers/net/i40e/i40e_ethdev_vf.c @@ -2143,13 +2143,15 @@ i40evf_dev_link_update(struct rte_eth_dev *dev, new_link.link_speed = ETH_SPEED_NUM_40G; break; default: - new_link.link_speed = ETH_SPEED_NUM_100M; + new_link.link_speed = ETH_SPEED_NUM_NONE; break; } /* full duplex only */ new_link.link_duplex = ETH_LINK_FULL_DUPLEX; - new_link.link_status = vf->link_up ? ETH_LINK_UP : - ETH_LINK_DOWN; + new_link.link_status = vf->link_up && + new_link.link_speed != ETH_SPEED_NUM_NONE + ? ETH_LINK_UP + : ETH_LINK_DOWN; new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED); From patchwork Thu Aug 8 08:22:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57563 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 696F84CA9; Thu, 8 Aug 2019 10:23:12 +0200 (CEST) Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by dpdk.org (Postfix) with ESMTP id 63F872082 for ; Thu, 8 Aug 2019 10:22:59 +0200 (CEST) Received: by mail-wm1-f65.google.com with SMTP id p74so1472533wme.4 for ; Thu, 08 Aug 2019 01:22:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=/wwyBWtHvE0iti6aeLOKXJyfmprdVMD/mYawrC3wwNg=; b=Yeukic7Pu3vN0/cjWS2WwWNutu7at0UWTMfcdIN0vARF2vG6kcweLx1uQxQOM1APWm V+whRfO/SZ/SLgNFEsSW6G8QrG+kq3vmoqwO05dBnaHYVwm9cCGh6GA5m5DGdlFHUF8I TPddNwq41AUMoyB7uUibKkhH6neHDzjcZYgOxrNub7K1t2NXb1qPevRc+rsxoLmr7zN9 nk0SJGVzkWjVUsn9YwQnBXtxHC9Egj1eeZkeAS/tu2oomxQqOQov2IwN4StCTXOGtca3 dLDVrALOTMo5dRh2M7oDUY4meGQ9JmqzULbMuj80z2/pNXTL8Zi0vG+6Dc7imMpKZ7s2 MOxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=/wwyBWtHvE0iti6aeLOKXJyfmprdVMD/mYawrC3wwNg=; b=L8yd3EBOhTzojVRB5BlmIkFcp6/C/rY0UmuQQdKvR+WdvH1XRsQfBzPJDW4jKsrbgc Sx4NcQvRDqrS3NTTP+yFqKmTUkmKMAL0Xcxj8/GcADpbYQNP28ipVya6FJfofScvSoji /r0wwJIEO8mdrnF34HnfkZ44KP+GdXWgChFSdK8UhALSa+/Jg/Y+iqcO45kRZyAcHoST lAdXb8Sccu/pPHpI8bajU20L1pIuCxMII+TfxaukUjr80am8PLn+H3UwoN1wDFc8GHzK SR7l9UayXHO1jmS/x0sej8XqO9I2qWlLtwOiuQzFd7Pcx4WF8BieVIIDRYRc2h1X1TQY gq/Q== X-Gm-Message-State: APjAAAXCWDMdfchNfnGcnn6Wy03jX7thMHVXO79G/JlOEVwy9dCDr2GC aMhy7OrYM3Guiv4gXmbSmTJzcfl+qA== X-Google-Smtp-Source: APXvYqz1xLgw6xGINocMEvV1m502E2Ri8dT5FHjVcBhm79GhIhHPYTPsqhR1iRYCtv357/9GEP9HZg== X-Received: by 2002:a1c:cb43:: with SMTP id b64mr2964363wmg.86.1565252578794; Thu, 08 Aug 2019 01:22:58 -0700 (PDT) Received: from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.22.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:22:58 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: Thibaut Collet , stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:13 +0200 Message-Id: <29a5fde9fc18b74c9893d003e652dd14b31369d0.1565252336.git.thierry.herbelot@6wind.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 08/12] virtio: fix rx stats with vectorized functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Thibaut Collet With vectorized functions, only the rx stats for number of packets is incremented. Update also the other statistics. Performance impact is about 2% Fixes: fc3d66212fed ("virtio: add vector Rx") Cc: stable@dpdk.org Signed-off-by: Thibaut Collet --- drivers/net/virtio/virtio_rxtx.c | 2 +- drivers/net/virtio/virtio_rxtx.h | 2 ++ drivers/net/virtio/virtio_rxtx_simple_neon.c | 5 +++++ drivers/net/virtio/virtio_rxtx_simple_sse.c | 5 +++++ 4 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/net/virtio/virtio_rxtx.c b/drivers/net/virtio/virtio_rxtx.c index 27ead19fbe81..6dd62bf51863 100644 --- a/drivers/net/virtio/virtio_rxtx.c +++ b/drivers/net/virtio/virtio_rxtx.c @@ -1083,7 +1083,7 @@ virtio_discard_rxbuf_inorder(struct virtqueue *vq, struct rte_mbuf *m) } } -static inline void +void virtio_update_packet_stats(struct virtnet_stats *stats, struct rte_mbuf *mbuf) { uint32_t s = mbuf->pkt_len; diff --git a/drivers/net/virtio/virtio_rxtx.h b/drivers/net/virtio/virtio_rxtx.h index 685cc4f8104c..1eb8dae227ee 100644 --- a/drivers/net/virtio/virtio_rxtx.h +++ b/drivers/net/virtio/virtio_rxtx.h @@ -59,5 +59,7 @@ struct virtnet_ctl { }; int virtio_rxq_vec_setup(struct virtnet_rx *rxvq); +void virtio_update_packet_stats(struct virtnet_stats *stats, + struct rte_mbuf *mbuf); #endif /* _VIRTIO_RXTX_H_ */ diff --git a/drivers/net/virtio/virtio_rxtx_simple_neon.c b/drivers/net/virtio/virtio_rxtx_simple_neon.c index cdc2a4d28ed5..70e89fc428e0 100644 --- a/drivers/net/virtio/virtio_rxtx_simple_neon.c +++ b/drivers/net/virtio/virtio_rxtx_simple_neon.c @@ -47,6 +47,7 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, struct vring_used_elem *rused; struct rte_mbuf **sw_ring; struct rte_mbuf **sw_ring_end; + struct rte_mbuf **ref_rx_pkts; uint16_t nb_pkts_received = 0; uint8x16_t shuf_msk1 = { @@ -105,6 +106,7 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, virtqueue_notify(vq); } + ref_rx_pkts = rx_pkts; for (nb_pkts_received = 0; nb_pkts_received < nb_used;) { uint64x2_t desc[RTE_VIRTIO_DESC_PER_LOOP / 2]; @@ -204,5 +206,8 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, vq->vq_used_cons_idx += nb_pkts_received; vq->vq_free_cnt += nb_pkts_received; rxvq->stats.packets += nb_pkts_received; + for (nb_used = 0; nb_used < nb_pkts_received; nb_used++) + virtio_update_packet_stats(&rxvq->stats, ref_rx_pkts[nb_used]); + return nb_pkts_received; } diff --git a/drivers/net/virtio/virtio_rxtx_simple_sse.c b/drivers/net/virtio/virtio_rxtx_simple_sse.c index af76708d66ae..cb1610e71563 100644 --- a/drivers/net/virtio/virtio_rxtx_simple_sse.c +++ b/drivers/net/virtio/virtio_rxtx_simple_sse.c @@ -48,6 +48,7 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, struct vring_used_elem *rused; struct rte_mbuf **sw_ring; struct rte_mbuf **sw_ring_end; + struct rte_mbuf **ref_rx_pkts; uint16_t nb_pkts_received = 0; __m128i shuf_msk1, shuf_msk2, len_adjust; @@ -107,6 +108,7 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, virtqueue_notify(vq); } + ref_rx_pkts = rx_pkts; for (nb_pkts_received = 0; nb_pkts_received < nb_used;) { __m128i desc[RTE_VIRTIO_DESC_PER_LOOP / 2]; @@ -190,5 +192,8 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, vq->vq_used_cons_idx += nb_pkts_received; vq->vq_free_cnt += nb_pkts_received; rxvq->stats.packets += nb_pkts_received; + for (nb_used = 0; nb_used < nb_pkts_received; nb_used++) + virtio_update_packet_stats(&rxvq->stats, ref_rx_pkts[nb_used]); + return nb_pkts_received; } From patchwork Thu Aug 8 08:22:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57564 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7DFCD5424; Thu, 8 Aug 2019 10:23:14 +0200 (CEST) Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by dpdk.org (Postfix) with ESMTP id 37D422BAE for ; Thu, 8 Aug 2019 10:23:00 +0200 (CEST) Received: by mail-wm1-f68.google.com with SMTP id p74so1472581wme.4 for ; Thu, 08 Aug 2019 01:23:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; 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(host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.22.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:22:59 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: Thibaut Collet , stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:14 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 09/12] virtio: get all pending rx packets with vectorized functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Thibaut Collet The loop to read packets does not take all packets as the number of available packets (nb_used) is decremented in the loop. Take all available packets provides a performance improvement of 3%. Fixes: fc3d66212fed ("virtio: add vector Rx") Cc: stable@dpdk.org Signed-off-by: Thibaut Collet --- drivers/net/virtio/virtio_rxtx_simple_neon.c | 5 +++-- drivers/net/virtio/virtio_rxtx_simple_sse.c | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/net/virtio/virtio_rxtx_simple_neon.c b/drivers/net/virtio/virtio_rxtx_simple_neon.c index 70e89fc428e0..992e71f010eb 100644 --- a/drivers/net/virtio/virtio_rxtx_simple_neon.c +++ b/drivers/net/virtio/virtio_rxtx_simple_neon.c @@ -42,7 +42,7 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, struct virtnet_rx *rxvq = rx_queue; struct virtqueue *vq = rxvq->vq; struct virtio_hw *hw = vq->hw; - uint16_t nb_used; + uint16_t nb_used, nb_total; uint16_t desc_idx; struct vring_used_elem *rused; struct rte_mbuf **sw_ring; @@ -106,9 +106,10 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, virtqueue_notify(vq); } + nb_total = nb_used; ref_rx_pkts = rx_pkts; for (nb_pkts_received = 0; - nb_pkts_received < nb_used;) { + nb_pkts_received < nb_total;) { uint64x2_t desc[RTE_VIRTIO_DESC_PER_LOOP / 2]; uint64x2_t mbp[RTE_VIRTIO_DESC_PER_LOOP / 2]; uint64x2_t pkt_mb[RTE_VIRTIO_DESC_PER_LOOP]; diff --git a/drivers/net/virtio/virtio_rxtx_simple_sse.c b/drivers/net/virtio/virtio_rxtx_simple_sse.c index cb1610e71563..f9ec4ae69986 100644 --- a/drivers/net/virtio/virtio_rxtx_simple_sse.c +++ b/drivers/net/virtio/virtio_rxtx_simple_sse.c @@ -43,7 +43,7 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, struct virtnet_rx *rxvq = rx_queue; struct virtqueue *vq = rxvq->vq; struct virtio_hw *hw = vq->hw; - uint16_t nb_used; + uint16_t nb_used, nb_total; uint16_t desc_idx; struct vring_used_elem *rused; struct rte_mbuf **sw_ring; @@ -108,9 +108,10 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, virtqueue_notify(vq); } + nb_total = nb_used; ref_rx_pkts = rx_pkts; for (nb_pkts_received = 0; - nb_pkts_received < nb_used;) { + nb_pkts_received < nb_total;) { __m128i desc[RTE_VIRTIO_DESC_PER_LOOP / 2]; __m128i mbp[RTE_VIRTIO_DESC_PER_LOOP / 2]; __m128i pkt_mb[RTE_VIRTIO_DESC_PER_LOOP]; From patchwork Thu Aug 8 08:22:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57565 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1013E5B34; Thu, 8 Aug 2019 10:23:15 +0200 (CEST) Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) by dpdk.org (Postfix) with ESMTP id 3F33B2BAF for ; Thu, 8 Aug 2019 10:23:01 +0200 (CEST) Received: by mail-wr1-f67.google.com with SMTP id q12so3715924wrj.12 for ; Thu, 08 Aug 2019 01:23:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=wgarJcXvidJ78ZEw1ta+Nge5CEfZ3EqDvpTZDWMalDE=; b=RfJZOt44eAJWzahOTXm56LtLjUObC2gAZnENTBo8NGFfoePsKZ9Ynbn4uPthI39pX7 rOsOwoeWrqOMj3CZdKYWD1cFeU11MjoszmDBHvXhpKpqGSy1GornlzCZi3+WYSPlVTUN PEX1xzanyk5kmx5Cj+gAHl4/ZSIrLVqTYUVrReWZ66lJIMI4YUj0ttjDmIErf5Q5SBRA pnqqCKdXjLimAJLjNLNw6ih60gkIbx42qMi/k46ovw79coy9Fki8DTv4Xb5xvP6Tn3wW QoZ4oSCBKzADAQO0d3k5RraESACCXPD/MYOw5p8nu+LwPy/lKSm6fX6p4jMzAvBdmE1n nBlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=wgarJcXvidJ78ZEw1ta+Nge5CEfZ3EqDvpTZDWMalDE=; b=QC5cLR0i9fmQwHRs8CNK4NuchjUG/znnGVcLB586ErSBvWLpjflGoLoVNtXfmE6kM2 E/toiVsdjAL6E2hmDWnuPTEh4ASLdMCDJwTiHqEOsr6/B6+MHBlM5ANjaN3wC3wiJ2qP oumbb0qPbaXuwoFcIa/vMmW+lKgzMG6ZNBu0VU0FW9J5U1+4akyuvYdmRrVOtVENnrz5 /wqv5syWFwHjbtiCiiq/YZO3X7k9UV20ST+J4Ui7yqp7DxIaSOO7/6HFbXvKQ+DOj1Ym mpg34iwg3zw82lmM2Q8kk6OZT8Gk540+e7jydXTOKblZ5xFm4sIUO7zWtURb0+DTlWhR UbEg== X-Gm-Message-State: APjAAAUkkcc02/KNp/jmfs++f/a4CtsK9jYCphvyFJ4CCJp6ADbjwrlY pyQnWJHTqpdHfXIa8GNqYfMtp2pWaw== X-Google-Smtp-Source: APXvYqzXMwGMEPGlFDkLDeNkUgyVOQ9gUf6hFyQbq/hoJ0jxbTtaI08+f3VurHaUmjn7L5/1TL4T5Q== X-Received: by 2002:adf:d081:: with SMTP id y1mr16244511wrh.34.1565252580728; Thu, 08 Aug 2019 01:23:00 -0700 (PDT) Received: from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.22.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:22:59 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:15 +0200 Message-Id: <98dc35313971d49c5f1f06f7a074b024eb974e90.1565252336.git.thierry.herbelot@6wind.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 10/12] drivers/crypto/openssl: use a local copy for the session contexts X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Session contexts are used for temporary storage when processing a packet. If packets for the same session are to be processed simultaneously on multiple cores, separate contexts must be used. Note: with openssl 1.1.1 EVP_CIPHER_CTX can no longer be defined as a variable on the stack: it must be allocated. This in turn reduces the performance. Fixes: d61f70b4c918 ('crypto/libcrypto: add driver for OpenSSL library') Cc: stable@dpdk.org Signed-off-by: Thierry Herbelot --- drivers/crypto/openssl/rte_openssl_pmd.c | 34 +++++++++++++++++++++++--------- 1 file changed, 25 insertions(+), 9 deletions(-) diff --git a/drivers/crypto/openssl/rte_openssl_pmd.c b/drivers/crypto/openssl/rte_openssl_pmd.c index 2f5552840741..ce2d12347737 100644 --- a/drivers/crypto/openssl/rte_openssl_pmd.c +++ b/drivers/crypto/openssl/rte_openssl_pmd.c @@ -1290,6 +1290,7 @@ process_openssl_combined_op int srclen, aadlen, status = -1; uint32_t offset; uint8_t taglen; + EVP_CIPHER_CTX *ctx_copy; /* * Segmented destination buffer is not supported for @@ -1326,6 +1327,8 @@ process_openssl_combined_op } taglen = sess->auth.digest_length; + ctx_copy = EVP_CIPHER_CTX_new(); + EVP_CIPHER_CTX_copy(ctx_copy, sess->cipher.ctx); if (sess->cipher.direction == RTE_CRYPTO_CIPHER_OP_ENCRYPT) { if (sess->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC || @@ -1333,12 +1336,12 @@ process_openssl_combined_op status = process_openssl_auth_encryption_gcm( mbuf_src, offset, srclen, aad, aadlen, iv, - dst, tag, sess->cipher.ctx); + dst, tag, ctx_copy); else status = process_openssl_auth_encryption_ccm( mbuf_src, offset, srclen, aad, aadlen, iv, - dst, tag, taglen, sess->cipher.ctx); + dst, tag, taglen, ctx_copy); } else { if (sess->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC || @@ -1346,14 +1349,15 @@ process_openssl_combined_op status = process_openssl_auth_decryption_gcm( mbuf_src, offset, srclen, aad, aadlen, iv, - dst, tag, sess->cipher.ctx); + dst, tag, ctx_copy); else status = process_openssl_auth_decryption_ccm( mbuf_src, offset, srclen, aad, aadlen, iv, - dst, tag, taglen, sess->cipher.ctx); + dst, tag, taglen, ctx_copy); } + EVP_CIPHER_CTX_free(ctx_copy); if (status != 0) { if (status == (-EFAULT) && sess->auth.operation == @@ -1372,6 +1376,7 @@ process_openssl_cipher_op { uint8_t *dst, *iv; int srclen, status; + EVP_CIPHER_CTX *ctx_copy; /* * Segmented destination buffer is not supported for @@ -1388,22 +1393,25 @@ process_openssl_cipher_op iv = rte_crypto_op_ctod_offset(op, uint8_t *, sess->iv.offset); + ctx_copy = EVP_CIPHER_CTX_new(); + EVP_CIPHER_CTX_copy(ctx_copy, sess->cipher.ctx); if (sess->cipher.mode == OPENSSL_CIPHER_LIB) if (sess->cipher.direction == RTE_CRYPTO_CIPHER_OP_ENCRYPT) status = process_openssl_cipher_encrypt(mbuf_src, dst, op->sym->cipher.data.offset, iv, - srclen, sess->cipher.ctx); + srclen, ctx_copy); else status = process_openssl_cipher_decrypt(mbuf_src, dst, op->sym->cipher.data.offset, iv, - srclen, sess->cipher.ctx); + srclen, ctx_copy); else status = process_openssl_cipher_des3ctr(mbuf_src, dst, op->sym->cipher.data.offset, iv, sess->cipher.key.data, srclen, - sess->cipher.ctx); + ctx_copy); + EVP_CIPHER_CTX_free(ctx_copy); if (status != 0) op->status = RTE_CRYPTO_OP_STATUS_ERROR; } @@ -1507,6 +1515,8 @@ process_openssl_auth_op(struct openssl_qp *qp, struct rte_crypto_op *op, { uint8_t *dst; int srclen, status; + EVP_MD_CTX *ctx_a; + HMAC_CTX *ctx_h; srclen = op->sym->auth.data.length; @@ -1514,14 +1524,20 @@ process_openssl_auth_op(struct openssl_qp *qp, struct rte_crypto_op *op, switch (sess->auth.mode) { case OPENSSL_AUTH_AS_AUTH: + ctx_a = EVP_MD_CTX_create(); + EVP_MD_CTX_copy_ex(ctx_a, sess->auth.auth.ctx); status = process_openssl_auth(mbuf_src, dst, op->sym->auth.data.offset, NULL, NULL, srclen, - sess->auth.auth.ctx, sess->auth.auth.evp_algo); + ctx_a, sess->auth.auth.evp_algo); + EVP_MD_CTX_destroy(ctx_a); break; case OPENSSL_AUTH_AS_HMAC: + ctx_h = HMAC_CTX_new(); + HMAC_CTX_copy(ctx_h, sess->auth.hmac.ctx); status = process_openssl_auth_hmac(mbuf_src, dst, op->sym->auth.data.offset, srclen, - sess->auth.hmac.ctx); + ctx_h); + HMAC_CTX_free(ctx_h); break; default: status = -1; From patchwork Thu Aug 8 08:22:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57566 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 125CF1B464; Thu, 8 Aug 2019 10:23:18 +0200 (CEST) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by dpdk.org (Postfix) with ESMTP id F21C92BAE for ; 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(host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.23.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:23:00 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:16 +0200 Message-Id: <0a38b175a96089fc9473fb14df78826d78966dd3.1565252336.git.thierry.herbelot@6wind.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 11/12] drivers/crypto/dpaa_sec: update DPAA iova table in dpaa_mem_vtop X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" dpaa_sec needs translations between physical and virtual addresses. V to P translation is relatively fast, as memory is managed in contiguous segments. The result of each V to P translation is used to update the DPAA iova table, which should be updated by a Mem event callback, but is not. Then the DPAA iova table has entries for all needed memory ranges. With this patch, dpaa_mem_ptov will always use dpaax_iova_table_get_va, which ensures optimal performance. Fixes: 5a7dbb934d75 ('dpaa: enable dpaax library') Cc: stable@dpdk.org Signed-off-by: Thierry Herbelot --- drivers/crypto/dpaa_sec/dpaa_sec.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c index 122c80a072ff..22b8b1d63ce0 100644 --- a/drivers/crypto/dpaa_sec/dpaa_sec.c +++ b/drivers/crypto/dpaa_sec/dpaa_sec.c @@ -38,6 +38,7 @@ #include #include #include +#include enum rta_sec_era rta_sec_era; @@ -100,8 +101,10 @@ dpaa_mem_vtop(void *vaddr) const struct rte_memseg *ms; ms = rte_mem_virt2memseg(vaddr, NULL); - if (ms) + if (ms) { + dpaax_iova_table_update(ms->iova, (void *)ms->addr_64, ms->len); return ms->iova + RTE_PTR_DIFF(vaddr, ms->addr); + } return (size_t)NULL; } From patchwork Thu Aug 8 08:22:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 57567 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A1FCD1B956; Thu, 8 Aug 2019 10:23:19 +0200 (CEST) Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by dpdk.org (Postfix) with ESMTP id BA5802BE1 for ; Thu, 8 Aug 2019 10:23:02 +0200 (CEST) Received: by mail-wm1-f65.google.com with SMTP id p74so1472727wme.4 for ; Thu, 08 Aug 2019 01:23:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=l/e2lobreFgY8/tp8VSoSDkLX5vQfNzhxpmxnCrZGkY=; b=JXHqfx4YLM1H2WQ25PgwnA6v3rOBanXH37KJC4QUKlMDFHT9z92OUsrI6VM8kjpss3 EvtI5ICFVmj4fROR3I5C4Pr8xWGdFKz9vq9NFRxvLuG1bVmZt/rUwUhTGap9SrRzLhF7 fQDRYg2Ni6JPemJnyYnXfKDns5JqgQcngk/5kcFpTaAoDw0vhCwX42e22/cydkO3DqXX nb43Bjb4rn+H3Du6LAwYvAt3XusncCY/uA7T8++xwlgd6NVqcV4Ed9BFIcrVOR9czay3 ydCkf97AYXuOSv7A91di9N3diSJENibz5KnzvnVpyjMUb5s+2dNMh2LqVNQU+rCn7+gV /eQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=l/e2lobreFgY8/tp8VSoSDkLX5vQfNzhxpmxnCrZGkY=; b=bSM/bt1yjrevql8GpsOwGeo83Kw5KoKdFTec4ybm9/eZrZjKy78NHwaYAtXIiO7n4u 2U4s1E5IR3JLgdnWNCR3r29KvM8GD/wxjHh5mW6f4FRzqw7jfES+kDTwF+oB17pVUCyx PNK1trnzOqDC1iV6khySPgs+ZR9SkiaQbaWO8PgqSi4WFbPmyMV0i+XX1V+B06KRs48o dQB0Cf8joZNYW27R7rLUI3oOb+XrEJTtBayxsQFzgvOsAUDH6Wb0IkGXTNPh4O+jX/j1 /vcnendTVgoV3eQyeGg3cPnDV/kyeEvy8CE2yg3b1qLPmvMZx/HHWs/GCgWmoKBXAwFH o1LQ== X-Gm-Message-State: APjAAAU16FB8cbQRE0ODv3BFne/P7ICvPpS1xsJiCFxUC+7zdqpjtUpl /JxsBAyrjQTQ8zbo/S27WTC09ukeGg== X-Google-Smtp-Source: APXvYqwcLf3FFsGjEtn74w4wajbbMmwN6olPpIKHyqsyPcL9JXYGgrI7H7VOrj3Bk0TnGo3TYTZweg== X-Received: by 2002:a1c:f415:: with SMTP id z21mr3011510wma.34.1565252582354; Thu, 08 Aug 2019 01:23:02 -0700 (PDT) Received: from ascain.dev.6wind.com. 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[62.23.145.78]) by smtp.gmail.com with ESMTPSA id t13sm111437018wrr.0.2019.08.08.01.23.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Aug 2019 01:23:01 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: stable@dpdk.org, Thomas Monjalon Date: Thu, 8 Aug 2019 10:22:17 +0200 Message-Id: <646b6286d102c92dafb3d06553fd4272ed17c41d.1565252336.git.thierry.herbelot@6wind.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH 19.11 V3 12/12] drivers/crypto/octeontx: enable unbinding for the OcteonTx crypto engines X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Like for Ethernet ports, the OcteonTx crypto engines must first be unbound from their kernel module, then rebound to vfio-pci, before being usable in DPDK. As this capability is detected at runtime by dpdk-pmdinfo, add the info in the PMD registering directives. Then an external script can be used for bind and unbind. Fixes: bfe2ae495ee268 ('crypto/octeontx: add PMD skeleton') Cc: stable@dpdk.org Signed-off-by: Thierry Herbelot --- drivers/crypto/octeontx/otx_cryptodev.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/crypto/octeontx/otx_cryptodev.c b/drivers/crypto/octeontx/otx_cryptodev.c index fc64a5f3041f..16f1909966d0 100644 --- a/drivers/crypto/octeontx/otx_cryptodev.c +++ b/drivers/crypto/octeontx/otx_cryptodev.c @@ -118,6 +118,7 @@ static struct cryptodev_driver otx_cryptodev_drv; RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_OCTEONTX_PMD, otx_cryptodev_pmd); RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_OCTEONTX_PMD, pci_id_cpt_table); +RTE_PMD_REGISTER_KMOD_DEP(CRYPTODEV_NAME_OCTEONTX_PMD, "* igb_uio | uio_pci_generic | vfio-pci"); RTE_PMD_REGISTER_CRYPTO_DRIVER(otx_cryptodev_drv, otx_cryptodev_pmd.driver, otx_cryptodev_driver_id);