From patchwork Fri Aug 30 20:51:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lance Richardson X-Patchwork-Id: 58321 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 90FB41EA1E; Fri, 30 Aug 2019 22:52:57 +0200 (CEST) Received: from mail-pg1-f195.google.com (mail-pg1-f195.google.com [209.85.215.195]) by dpdk.org (Postfix) with ESMTP id DF1021EA0D for ; Fri, 30 Aug 2019 22:52:55 +0200 (CEST) Received: by mail-pg1-f195.google.com with SMTP id p3so4098828pgb.9 for ; Fri, 30 Aug 2019 13:52:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wfXxNUwXqtHTCOM5HPRf0WYZOUEk2k0xIgWDG0HYmIo=; b=K1zDHXuXnKQLx3QuH84mryh+lKyF6FuM2QDYsOPqm944FV2XgV3BAr51vRVI8IlzBo GoeSFwGaWVJExRO3BWxuDenNuP5RhrIowMGIHAbWtcQz5PFjAzuBo1THeHb2uVTtHjur Db50J3VRMQDwW2n3QSJVOtEog+SRPDMEveffU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wfXxNUwXqtHTCOM5HPRf0WYZOUEk2k0xIgWDG0HYmIo=; b=do+gWZiDjnT/PaczjgD9u+iNXVN+M28N1OxFW/7Nv895z5ww4BcGtoTFeY+7P50h9r JukXpjl4x8ofeEXph8OdI0myFi1AcnAUVd58Yk5X6DlIX+UUvPDjw958q2kEeowzaZTf vYlqa3LL4S3bD0jVczSX3RmXcysONKqJX+GtSgss+2ohYJzC+TiW6x2t90VJy8KJZx5O lcKoSMOoWp/4EuxmuZKA+FfsqY3q5VUrllCecQoboziq1ctcxoLxoEq85EB4et0xNPSH jPZ4QkyCVhCTsOhZO9EGcdNwd3iM6TDZ4sK11PzwYexIBGA/AN4TblWcBG91Vb1CxqNN AneA== X-Gm-Message-State: APjAAAXdHxviOl1sqQmWjLa51J1Wj2lKh5oWlDURn8H1UvRSED4dcBFg xoTLEj04jRrEFlEaT6DM3qNeD/P1AbOysXkJHjtYlo1frOsJ/ZaBQSB5BJhlki1v8km6HO7TWgU k1uCqeKQ5tT67gecAwCdAGxZELxTj3PXIcqXDVxFWflQ3pldtIq2VQ0sgbmHi/UZF X-Google-Smtp-Source: APXvYqzNBADfxFA2F6YtclNPSX/2bzlTeFqkJWfFFXHyJ8xWhVsTPvHUgrxG5E9V5CF6hkiwLqu5xw== X-Received: by 2002:a17:90a:bf01:: with SMTP id c1mr503239pjs.30.1567198374865; Fri, 30 Aug 2019 13:52:54 -0700 (PDT) Received: from localhost.localdomain ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id i14sm3761369pfo.158.2019.08.30.13.52.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2019 13:52:54 -0700 (PDT) From: Lance Richardson To: dev@dpdk.org Cc: ajit.khaparde@broadcom.com, ferruh.yigit@intel.com, Lance Richardson Date: Fri, 30 Aug 2019 16:51:55 -0400 Message-Id: <20190830205201.26644-2-lance.richardson@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190830205201.26644-1-lance.richardson@broadcom.com> References: <20190830205201.26644-1-lance.richardson@broadcom.com> Subject: [dpdk-dev] [PATCH 1/7] net/bnxt: fix thor tqm entry allocation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The current TQM backing store size isn't sufficient to allow 512 transmit rings. Fix by correcting TQM SP queue size calculation. Fixes: f8168ca0e690 ("net/bnxt: support thor controller") Signed-off-by: Lance Richardson Reviewed-by: Ajit Kumar Khaparde --- drivers/net/bnxt/bnxt_ethdev.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index b94c9a122..e4c7b7c2a 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -4057,7 +4057,9 @@ int bnxt_alloc_ctx_mem(struct bnxt *bp) if (rc) return rc; - entries = ctx->qp_max_l2_entries; + entries = ctx->qp_max_l2_entries + + ctx->vnic_max_vnic_entries + + ctx->tqm_min_entries_per_ring; entries = bnxt_roundup(entries, ctx->tqm_entries_multiple); entries = clamp_t(uint32_t, entries, ctx->tqm_min_entries_per_ring, ctx->tqm_max_entries_per_ring); From patchwork Fri Aug 30 20:51:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lance Richardson X-Patchwork-Id: 58322 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9A5391EA32; Fri, 30 Aug 2019 22:53:00 +0200 (CEST) Received: from mail-pl1-f195.google.com (mail-pl1-f195.google.com [209.85.214.195]) by dpdk.org (Postfix) with ESMTP id 667A31EA12 for ; Fri, 30 Aug 2019 22:52:57 +0200 (CEST) Received: by mail-pl1-f195.google.com with SMTP id y1so3864778plp.9 for ; Fri, 30 Aug 2019 13:52:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mEZra6BKOEftucTKH/9qwR2k3AgZvIutfGcnT1HLWl0=; b=CpOZAnCd8mAWfAKJD/qZuybIJfEHnFb55KY2bW8VlkITSzFyd3srld5QM383N5zAjM ZSHTWCdmPozoNMsEVpUgqVd2wbFQrrINHxZXd4u5XSc09OoDok5N6/e6LWLKoghmwB4D 4ZtQ+z+U1SMImg8ka1qTZJOnngahV6RQ3/GPA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mEZra6BKOEftucTKH/9qwR2k3AgZvIutfGcnT1HLWl0=; b=qfB6XG4E+b05WrWuNwxB1VsQ8Ja7DCH8ZqKb96VagckrD9XT0SILHSyhawpPsjWKh8 MZCLK76DJ4fdTHhLsb+32M8WUsur8i/dzZrDnk45xLUYYadTBkT9x92FcpmQHUPNLlWA Zr/sfoTJVWLPe3eK5n9CnJl3HonEF96CjhkKt9l6WUDQUIdaL0MEJFmvj2Eo8kRHNWpn okbgq2bTcNHfRCgk81XDal4Wxv5DnrKVYoSl098WIN3koTGGHmIIY1E5irrAlCqs4MaK 3yT1mcMsN+Q6m3pr0Ukjx54gPx1+lSRiw8sINdSeQi1lk0OHmTH5iIvmnlJNJTJ9+o4l mgfw== X-Gm-Message-State: APjAAAXL8lhLgwsw8MLiUupigb70m0aSzEa2DVDk+qJHsjhAM/zhe6HG 8WwphLmke6iHJiwwUqdR9Kz9zcvYhxfX3AHEXrKa6lLbpvnJviFHiz3dqGSBVTOK/J153OZnCKN PRTGXUS9S9kSko0w275bI24iNvccramwcN39jWDiuW/POZaRqrjzoF2uxkf6l8lq/ X-Google-Smtp-Source: APXvYqzrvVGGSE8p5V4nqiXqrrniEaI7FAGguM4sM4AziAmjpmMW8iUvxlLLhvR90F/d6HRGOjA5vg== X-Received: by 2002:a17:902:524:: with SMTP id 33mr17912731plf.27.1567198376504; Fri, 30 Aug 2019 13:52:56 -0700 (PDT) Received: from localhost.localdomain ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id i14sm3761369pfo.158.2019.08.30.13.52.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2019 13:52:56 -0700 (PDT) From: Lance Richardson To: dev@dpdk.org Cc: ajit.khaparde@broadcom.com, ferruh.yigit@intel.com, Lance Richardson Date: Fri, 30 Aug 2019 16:51:56 -0400 Message-Id: <20190830205201.26644-3-lance.richardson@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190830205201.26644-1-lance.richardson@broadcom.com> References: <20190830205201.26644-1-lance.richardson@broadcom.com> Subject: [dpdk-dev] [PATCH 2/7] net/bnxt: fix ring alignment for thor-based adapters X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When using transmit/receive queue sizes smaller than 256, alignment requirements are not being met for Thor-based adapters. Fix by forcing memory addresses used for transmit/receive/aggregation ring allocations to be on 4K boundaries. Fixes: f8168ca0e690 ("net/bnxt: support thor controller") Signed-off-by: Lance Richardson Reviewed-by: Ajit Kumar Khaparde --- drivers/net/bnxt/bnxt_ring.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/bnxt/bnxt_ring.c b/drivers/net/bnxt/bnxt_ring.c index ec17783cf..bc8b92b04 100644 --- a/drivers/net/bnxt/bnxt_ring.c +++ b/drivers/net/bnxt/bnxt_ring.c @@ -162,18 +162,21 @@ int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx, int nq_ring_len = BNXT_CHIP_THOR(bp) ? cp_ring_len : 0; int tx_ring_start = nq_ring_start + nq_ring_len; + tx_ring_start = RTE_ALIGN(tx_ring_start, 4096); int tx_ring_len = tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size * sizeof(struct tx_bd_long)) : 0; tx_ring_len = RTE_ALIGN(tx_ring_len, 4096); int rx_ring_start = tx_ring_start + tx_ring_len; + rx_ring_start = RTE_ALIGN(rx_ring_start, 4096); int rx_ring_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size * sizeof(struct rx_prod_pkt_bd)) : 0; rx_ring_len = RTE_ALIGN(rx_ring_len, 4096); int ag_ring_start = rx_ring_start + rx_ring_len; + ag_ring_start = RTE_ALIGN(ag_ring_start, 4096); int ag_ring_len = rx_ring_len * AGG_RING_SIZE_FACTOR; ag_ring_len = RTE_ALIGN(ag_ring_len, 4096); From patchwork Fri Aug 30 20:51:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lance Richardson X-Patchwork-Id: 58323 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D1C431EA3E; Fri, 30 Aug 2019 22:53:02 +0200 (CEST) Received: from mail-pf1-f194.google.com (mail-pf1-f194.google.com [209.85.210.194]) by dpdk.org (Postfix) with ESMTP id D1C361EA12 for ; Fri, 30 Aug 2019 22:52:59 +0200 (CEST) Received: by mail-pf1-f194.google.com with SMTP id 196so5370020pfz.8 for ; Fri, 30 Aug 2019 13:52:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Gw0rrFG1Fm4taTaRUbrWcg72mKY2vbCImYVoa/jJ54g=; b=ZsprulO6HnPyCu1qRmcgQuJwjFyzKSH8IyEPiIQh3TilTecLAlS3S+vZ88/y54HQyu A8Nm/texN5eZxGyzdypVBvz8UBZYc8IcCO/JDlSzQjIxfaEekKvoKdYeutH+SKCaKGmj nLyxVs8sNcHZXdSqukJano+aOL6/TBTQ2ZhQ4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Gw0rrFG1Fm4taTaRUbrWcg72mKY2vbCImYVoa/jJ54g=; b=jTv5PPtIqWY0xIrJC5yOH+kUx8LE6HN+NbkdS3LR8z0PmtZbMGiaCoqj5+/u79SDbz GPyVdEKBkleORkYQakpiHd0I5TBuzi/IZdjV9ZwKxU2kjZpOVgCFD01Jh9QTJcHWR94A 8tL/Dnam0TZ9MU+tBKzCKbZ58lHlScAl6KP7tkDMZ/UMUIE95BZSDxgkRh010UNCjyBb MAE9l0BwBHf/eeniDd6KlsfDRwzvtZMArXDVFjYy+a2czx8EFdVRU/qxJXWF1GhnKjVM SQ/4Zc5ewEeInIdbBR1KBYrqhNNrMKWalTfZ1zpxLwHspAWJMgW8fjmzXtN63H/ZnqdL zw4A== X-Gm-Message-State: APjAAAXBYRaBprttakqaLa4OwesBJ3FxEaYCUqMKzD8SsmoVJjVhnvKj zoVQKrH5XxgSMN9ehfwHH+ezCeqFDEDtNxg3lnO0y3M0H0+9dZqwrZLsR+pwVRopOkNLKT2Y4LN skXNwHrBJWtuOTgGDDER3D+D1fLwQeMtPMdTx0GHVo5iRRGroyYB/xXDCpOm3asYP X-Google-Smtp-Source: APXvYqycaJx+ereRmWNPcoYAmII+FinUciT5zoy+2Kj0E7oGFCj2C18lNX/BCAaCQjaLA4E+4ULNCQ== X-Received: by 2002:a63:e54:: with SMTP id 20mr14175419pgo.244.1567198378362; Fri, 30 Aug 2019 13:52:58 -0700 (PDT) Received: from localhost.localdomain ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id i14sm3761369pfo.158.2019.08.30.13.52.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2019 13:52:58 -0700 (PDT) From: Lance Richardson To: dev@dpdk.org Cc: ajit.khaparde@broadcom.com, ferruh.yigit@intel.com, Lance Richardson Date: Fri, 30 Aug 2019 16:51:57 -0400 Message-Id: <20190830205201.26644-4-lance.richardson@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190830205201.26644-1-lance.richardson@broadcom.com> References: <20190830205201.26644-1-lance.richardson@broadcom.com> Subject: [dpdk-dev] [PATCH 3/7] net/bnxt: use common receive/transmit NQ ring X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Thor queue scaling is currently limited by the number of NQs that can be allocated. Fix by using a common NQ for all receive/transmit rings instead of allocating a separate NQ for each ring. Fixes: f8168ca0e690 ("net/bnxt: support thor controller") Signed-off-by: Lance Richardson Reviewed-by: Somnath Kotur Reviewed-by: Ajit Kumar Khaparde --- drivers/net/bnxt/bnxt.h | 1 + drivers/net/bnxt/bnxt_ethdev.c | 5 ++ drivers/net/bnxt/bnxt_hwrm.c | 7 +-- drivers/net/bnxt/bnxt_ring.c | 107 ++++++++++++++++++++++----------- drivers/net/bnxt/bnxt_ring.h | 2 + drivers/net/bnxt/bnxt_rxq.c | 4 +- drivers/net/bnxt/bnxt_rxq.h | 1 - drivers/net/bnxt/bnxt_rxr.c | 27 --------- drivers/net/bnxt/bnxt_txq.c | 4 +- drivers/net/bnxt/bnxt_txq.h | 1 - drivers/net/bnxt/bnxt_txr.c | 25 -------- 11 files changed, 84 insertions(+), 100 deletions(-) diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index ac602fe52..3e508ca1f 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -459,6 +459,7 @@ struct bnxt { /* Default completion ring */ struct bnxt_cp_ring_info *async_cp_ring; + struct bnxt_cp_ring_info *rxtx_nq_ring; uint32_t max_ring_grps; struct bnxt_ring_grp_info *grp_info; diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index e4c7b7c2a..c2ab8df7b 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -220,6 +220,7 @@ static void bnxt_free_mem(struct bnxt *bp, bool reconfig) bnxt_free_rx_rings(bp); } bnxt_free_async_cp_ring(bp); + bnxt_free_rxtx_nq_ring(bp); } static int bnxt_alloc_mem(struct bnxt *bp, bool reconfig) @@ -250,6 +251,10 @@ static int bnxt_alloc_mem(struct bnxt *bp, bool reconfig) if (rc) goto alloc_mem_err; + rc = bnxt_alloc_rxtx_nq_ring(bp); + if (rc) + goto alloc_mem_err; + return 0; alloc_mem_err: diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index bd2cc01e1..4b1230453 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -2175,11 +2175,8 @@ void bnxt_free_hwrm_rx_ring(struct bnxt *bp, int queue_index) bp->grp_info[queue_index].ag_fw_ring_id = INVALID_HW_RING_ID; } - if (cpr->cp_ring_struct->fw_ring_id != INVALID_HW_RING_ID) { + if (cpr->cp_ring_struct->fw_ring_id != INVALID_HW_RING_ID) bnxt_free_cp_ring(bp, cpr); - if (rxq->nq_ring) - bnxt_free_nq_ring(bp, rxq->nq_ring); - } if (BNXT_HAS_RING_GRPS(bp)) bp->grp_info[queue_index].cp_fw_ring_id = INVALID_HW_RING_ID; @@ -2211,8 +2208,6 @@ int bnxt_free_all_hwrm_rings(struct bnxt *bp) if (cpr->cp_ring_struct->fw_ring_id != INVALID_HW_RING_ID) { bnxt_free_cp_ring(bp, cpr); cpr->cp_ring_struct->fw_ring_id = INVALID_HW_RING_ID; - if (txq->nq_ring) - bnxt_free_nq_ring(bp, txq->nq_ring); } } diff --git a/drivers/net/bnxt/bnxt_ring.c b/drivers/net/bnxt/bnxt_ring.c index bc8b92b04..85a10c584 100644 --- a/drivers/net/bnxt/bnxt_ring.c +++ b/drivers/net/bnxt/bnxt_ring.c @@ -125,7 +125,7 @@ int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx, int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size); cp_vmem_len = RTE_ALIGN(cp_vmem_len, 128); - int nq_vmem_len = BNXT_CHIP_THOR(bp) ? + int nq_vmem_len = nq_ring_info ? RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size) : 0; nq_vmem_len = RTE_ALIGN(nq_vmem_len, 128); @@ -159,7 +159,7 @@ int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx, nq_ring_start = cp_ring_start + cp_ring_len; nq_ring_start = RTE_ALIGN(nq_ring_start, 4096); - int nq_ring_len = BNXT_CHIP_THOR(bp) ? cp_ring_len : 0; + int nq_ring_len = nq_ring_info ? cp_ring_len : 0; int tx_ring_start = nq_ring_start + nq_ring_len; tx_ring_start = RTE_ALIGN(tx_ring_start, 4096); @@ -399,12 +399,12 @@ static void bnxt_set_db(struct bnxt *bp, } static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index, - struct bnxt_cp_ring_info *cpr, - struct bnxt_cp_ring_info *nqr) + struct bnxt_cp_ring_info *cpr) { struct bnxt_ring *cp_ring = cpr->cp_ring_struct; uint32_t nq_ring_id = HWRM_NA_SIGNATURE; int cp_ring_index = queue_index + BNXT_NUM_ASYNC_CPR(bp); + struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring; uint8_t ring_type; int rc = 0; @@ -432,31 +432,85 @@ static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index, return 0; } -static int bnxt_alloc_nq_ring(struct bnxt *bp, int queue_index, - struct bnxt_cp_ring_info *nqr) +int bnxt_alloc_rxtx_nq_ring(struct bnxt *bp) { - struct bnxt_ring *nq_ring = nqr->cp_ring_struct; - int nq_ring_index = queue_index + BNXT_NUM_ASYNC_CPR(bp); + struct bnxt_cp_ring_info *nqr; + struct bnxt_ring *ring; + int ring_index = BNXT_NUM_ASYNC_CPR(bp); + unsigned int socket_id; uint8_t ring_type; int rc = 0; - if (!BNXT_HAS_NQ(bp)) - return -EINVAL; + if (!BNXT_HAS_NQ(bp) || bp->rxtx_nq_ring) + return 0; + + socket_id = rte_lcore_to_socket_id(rte_get_master_lcore()); + + nqr = rte_zmalloc_socket("nqr", + sizeof(struct bnxt_cp_ring_info), + RTE_CACHE_LINE_SIZE, socket_id); + if (nqr == NULL) + return -ENOMEM; + + ring = rte_zmalloc_socket("bnxt_cp_ring_struct", + sizeof(struct bnxt_ring), + RTE_CACHE_LINE_SIZE, socket_id); + if (ring == NULL) { + rte_free(nqr); + return -ENOMEM; + } + + ring->bd = (void *)nqr->cp_desc_ring; + ring->bd_dma = nqr->cp_desc_mapping; + ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE); + ring->ring_mask = ring->ring_size - 1; + ring->vmem_size = 0; + ring->vmem = NULL; + + nqr->cp_ring_struct = ring; + rc = bnxt_alloc_rings(bp, 0, NULL, NULL, nqr, NULL, "l2_nqr"); + if (rc) { + rte_free(ring); + rte_free(nqr); + return -ENOMEM; + } ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ; - rc = bnxt_hwrm_ring_alloc(bp, nq_ring, ring_type, nq_ring_index, + rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, ring_index, HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE); - if (rc) + if (rc) { + rte_free(ring); + rte_free(nqr); return rc; + } - bnxt_set_db(bp, &nqr->cp_db, ring_type, nq_ring_index, - nq_ring->fw_ring_id); + bnxt_set_db(bp, &nqr->cp_db, ring_type, ring_index, + ring->fw_ring_id); bnxt_db_nq(nqr); + bp->rxtx_nq_ring = nqr; + return 0; } +/* Free RX/TX NQ ring. */ +void bnxt_free_rxtx_nq_ring(struct bnxt *bp) +{ + struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring; + + if (!nqr) + return; + + bnxt_free_nq_ring(bp, nqr); + + bnxt_free_ring(nqr->cp_ring_struct); + rte_free(nqr->cp_ring_struct); + nqr->cp_ring_struct = NULL; + rte_free(nqr); + bp->rxtx_nq_ring = NULL; +} + static int bnxt_alloc_rx_ring(struct bnxt *bp, int queue_index) { struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index]; @@ -525,17 +579,10 @@ int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index) struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index]; struct bnxt_cp_ring_info *cpr = rxq->cp_ring; struct bnxt_ring *cp_ring = cpr->cp_ring_struct; - struct bnxt_cp_ring_info *nqr = rxq->nq_ring; struct bnxt_rx_ring_info *rxr = rxq->rx_ring; int rc; - if (BNXT_HAS_NQ(bp)) { - rc = bnxt_alloc_nq_ring(bp, queue_index, nqr); - if (rc) - goto err_out; - } - - rc = bnxt_alloc_cmpl_ring(bp, queue_index, cpr, nqr); + rc = bnxt_alloc_cmpl_ring(bp, queue_index, cpr); if (rc) goto err_out; @@ -607,16 +654,10 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp) for (i = 0; i < bp->rx_cp_nr_rings; i++) { struct bnxt_rx_queue *rxq = bp->rx_queues[i]; struct bnxt_cp_ring_info *cpr = rxq->cp_ring; - struct bnxt_cp_ring_info *nqr = rxq->nq_ring; struct bnxt_ring *cp_ring = cpr->cp_ring_struct; struct bnxt_rx_ring_info *rxr = rxq->rx_ring; - if (BNXT_HAS_NQ(bp)) { - if (bnxt_alloc_nq_ring(bp, i, nqr)) - goto err_out; - } - - if (bnxt_alloc_cmpl_ring(bp, i, cpr, nqr)) + if (bnxt_alloc_cmpl_ring(bp, i, cpr)) goto err_out; if (BNXT_HAS_RING_GRPS(bp)) { @@ -662,17 +703,11 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp) struct bnxt_tx_queue *txq = bp->tx_queues[i]; struct bnxt_cp_ring_info *cpr = txq->cp_ring; struct bnxt_ring *cp_ring = cpr->cp_ring_struct; - struct bnxt_cp_ring_info *nqr = txq->nq_ring; struct bnxt_tx_ring_info *txr = txq->tx_ring; struct bnxt_ring *ring = txr->tx_ring_struct; unsigned int idx = i + bp->rx_cp_nr_rings; - if (BNXT_HAS_NQ(bp)) { - if (bnxt_alloc_nq_ring(bp, idx, nqr)) - goto err_out; - } - - if (bnxt_alloc_cmpl_ring(bp, idx, cpr, nqr)) + if (bnxt_alloc_cmpl_ring(bp, idx, cpr)) goto err_out; /* Tx ring */ diff --git a/drivers/net/bnxt/bnxt_ring.h b/drivers/net/bnxt/bnxt_ring.h index a31d59ea3..200d85532 100644 --- a/drivers/net/bnxt/bnxt_ring.h +++ b/drivers/net/bnxt/bnxt_ring.h @@ -79,6 +79,8 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp); int bnxt_alloc_async_cp_ring(struct bnxt *bp); void bnxt_free_async_cp_ring(struct bnxt *bp); int bnxt_alloc_async_ring_struct(struct bnxt *bp); +int bnxt_alloc_rxtx_nq_ring(struct bnxt *bp); +void bnxt_free_rxtx_nq_ring(struct bnxt *bp); static inline void bnxt_db_write(struct bnxt_db_info *db, uint32_t idx) { diff --git a/drivers/net/bnxt/bnxt_rxq.c b/drivers/net/bnxt/bnxt_rxq.c index d5fc5268d..eb45436c3 100644 --- a/drivers/net/bnxt/bnxt_rxq.c +++ b/drivers/net/bnxt/bnxt_rxq.c @@ -347,8 +347,8 @@ int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev, eth_dev->data->rx_queues[queue_idx] = rxq; /* Allocate RX ring hardware descriptors */ - if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq, rxq->cp_ring, - rxq->nq_ring, "rxr")) { + if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq, rxq->cp_ring, NULL, + "rxr")) { PMD_DRV_LOG(ERR, "ring_dma_zone_reserve for rx_ring failed!\n"); bnxt_rx_queue_release_op(rxq); diff --git a/drivers/net/bnxt/bnxt_rxq.h b/drivers/net/bnxt/bnxt_rxq.h index b5e42d01c..7c6b4dec9 100644 --- a/drivers/net/bnxt/bnxt_rxq.h +++ b/drivers/net/bnxt/bnxt_rxq.h @@ -39,7 +39,6 @@ struct bnxt_rx_queue { uint32_t rx_buf_use_size; /* useable size */ struct bnxt_rx_ring_info *rx_ring; struct bnxt_cp_ring_info *cp_ring; - struct bnxt_cp_ring_info *nq_ring; rte_atomic64_t rx_mbuf_alloc_fail; const struct rte_memzone *mz; }; diff --git a/drivers/net/bnxt/bnxt_rxr.c b/drivers/net/bnxt/bnxt_rxr.c index 12313dd53..95750367d 100644 --- a/drivers/net/bnxt/bnxt_rxr.c +++ b/drivers/net/bnxt/bnxt_rxr.c @@ -677,7 +677,6 @@ void bnxt_free_rx_rings(struct bnxt *bp) int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id) { struct bnxt_cp_ring_info *cpr; - struct bnxt_cp_ring_info *nqr; struct bnxt_rx_ring_info *rxr; struct bnxt_ring *ring; @@ -726,32 +725,6 @@ int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id) ring->vmem_size = 0; ring->vmem = NULL; - if (BNXT_HAS_NQ(rxq->bp)) { - nqr = rte_zmalloc_socket("bnxt_rx_ring_cq", - sizeof(struct bnxt_cp_ring_info), - RTE_CACHE_LINE_SIZE, socket_id); - if (nqr == NULL) - return -ENOMEM; - - rxq->nq_ring = nqr; - - ring = rte_zmalloc_socket("bnxt_rx_ring_struct", - sizeof(struct bnxt_ring), - RTE_CACHE_LINE_SIZE, socket_id); - if (ring == NULL) - return -ENOMEM; - - nqr->cp_ring_struct = ring; - ring->ring_size = - rte_align32pow2(rxr->rx_ring_struct->ring_size * - (2 + AGG_RING_SIZE_FACTOR)); - ring->ring_mask = ring->ring_size - 1; - ring->bd = (void *)nqr->cp_desc_ring; - ring->bd_dma = nqr->cp_desc_mapping; - ring->vmem_size = 0; - ring->vmem = NULL; - } - /* Allocate Aggregator rings */ ring = rte_zmalloc_socket("bnxt_rx_ring_struct", sizeof(struct bnxt_ring), diff --git a/drivers/net/bnxt/bnxt_txq.c b/drivers/net/bnxt/bnxt_txq.c index 090132479..8f43c1755 100644 --- a/drivers/net/bnxt/bnxt_txq.c +++ b/drivers/net/bnxt/bnxt_txq.c @@ -140,8 +140,8 @@ int bnxt_tx_queue_setup_op(struct rte_eth_dev *eth_dev, txq->port_id = eth_dev->data->port_id; /* Allocate TX ring hardware descriptors */ - if (bnxt_alloc_rings(bp, queue_idx, txq, NULL, txq->cp_ring, - txq->nq_ring, "txr")) { + if (bnxt_alloc_rings(bp, queue_idx, txq, NULL, txq->cp_ring, NULL, + "txr")) { PMD_DRV_LOG(ERR, "ring_dma_zone_reserve for tx_ring failed!"); bnxt_tx_queue_release_op(txq); rc = -ENOMEM; diff --git a/drivers/net/bnxt/bnxt_txq.h b/drivers/net/bnxt/bnxt_txq.h index 9190e3f73..a0d4678d9 100644 --- a/drivers/net/bnxt/bnxt_txq.h +++ b/drivers/net/bnxt/bnxt_txq.h @@ -32,7 +32,6 @@ struct bnxt_tx_queue { unsigned int cp_nr_rings; struct bnxt_cp_ring_info *cp_ring; - struct bnxt_cp_ring_info *nq_ring; const struct rte_memzone *mz; struct rte_mbuf **free; }; diff --git a/drivers/net/bnxt/bnxt_txr.c b/drivers/net/bnxt/bnxt_txr.c index 35e7166be..b24dcfc2e 100644 --- a/drivers/net/bnxt/bnxt_txr.c +++ b/drivers/net/bnxt/bnxt_txr.c @@ -57,7 +57,6 @@ int bnxt_init_one_tx_ring(struct bnxt_tx_queue *txq) int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq, unsigned int socket_id) { struct bnxt_cp_ring_info *cpr; - struct bnxt_cp_ring_info *nqr; struct bnxt_tx_ring_info *txr; struct bnxt_ring *ring; @@ -101,30 +100,6 @@ int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq, unsigned int socket_id) ring->vmem_size = 0; ring->vmem = NULL; - if (BNXT_HAS_NQ(txq->bp)) { - nqr = rte_zmalloc_socket("bnxt_tx_ring_nq", - sizeof(struct bnxt_cp_ring_info), - RTE_CACHE_LINE_SIZE, socket_id); - if (nqr == NULL) - return -ENOMEM; - - txq->nq_ring = nqr; - - ring = rte_zmalloc_socket("bnxt_tx_ring_struct", - sizeof(struct bnxt_ring), - RTE_CACHE_LINE_SIZE, socket_id); - if (ring == NULL) - return -ENOMEM; - - nqr->cp_ring_struct = ring; - ring->ring_size = txr->tx_ring_struct->ring_size; - ring->ring_mask = ring->ring_size - 1; - ring->bd = (void *)nqr->cp_desc_ring; - ring->bd_dma = nqr->cp_desc_mapping; - ring->vmem_size = 0; - ring->vmem = NULL; - } - return 0; } From patchwork Fri Aug 30 20:51:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lance Richardson X-Patchwork-Id: 58324 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 224981EA46; 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Fri, 30 Aug 2019 13:52:59 -0700 (PDT) Received: from localhost.localdomain ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id i14sm3761369pfo.158.2019.08.30.13.52.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2019 13:52:59 -0700 (PDT) From: Lance Richardson To: dev@dpdk.org Cc: ajit.khaparde@broadcom.com, ferruh.yigit@intel.com, Lance Richardson Date: Fri, 30 Aug 2019 16:51:58 -0400 Message-Id: <20190830205201.26644-5-lance.richardson@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190830205201.26644-1-lance.richardson@broadcom.com> References: <20190830205201.26644-1-lance.richardson@broadcom.com> Subject: [dpdk-dev] [PATCH 4/7] net/bnxt: use correct default Rx queue for thor X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Use first receive queue assigned to VNIC as the default receive queue when configuring Thor VNICs. This is necessary e.g. in order for flow redirection to a specific receive queue to work correctly. Fixes: f8168ca0e690 ("net/bnxt: support thor controller") Signed-off-by: Lance Richardson Reviewed-by: Ajit Kumar Khaparde --- drivers/net/bnxt/bnxt_hwrm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 4b1230453..4d8866ac1 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -1580,7 +1580,8 @@ int bnxt_hwrm_vnic_cfg(struct bnxt *bp, struct bnxt_vnic_info *vnic) HWRM_PREP(req, VNIC_CFG, BNXT_USE_CHIMP_MB); if (BNXT_CHIP_THOR(bp)) { - struct bnxt_rx_queue *rxq = bp->eth_dev->data->rx_queues[0]; + struct bnxt_rx_queue *rxq = + bp->eth_dev->data->rx_queues[vnic->start_grp_id]; struct bnxt_rx_ring_info *rxr = rxq->rx_ring; struct bnxt_cp_ring_info *cpr = rxq->cp_ring; From patchwork Fri Aug 30 20:51:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lance Richardson X-Patchwork-Id: 58325 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8237C1EA56; Fri, 30 Aug 2019 22:53:07 +0200 (CEST) Received: from mail-pf1-f196.google.com (mail-pf1-f196.google.com [209.85.210.196]) by dpdk.org (Postfix) with ESMTP id A46E21EA39 for ; Fri, 30 Aug 2019 22:53:02 +0200 (CEST) Received: by mail-pf1-f196.google.com with SMTP id 196so5370084pfz.8 for ; Fri, 30 Aug 2019 13:53:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=94bur20oG7ch/pxcNgKxL4v0LgkNYeOULHU9ryZ8MEg=; b=UN2ALS54WpuTO9qW2lVKib4UldGmW2t0nroOmle490QSIQEwTgnv54+IX3OodBAZxz OD1TkfU4zN7NdFUJMQyZtVrYrKx/IgeGNf5CWM3x6pm5pad7tck6PGYQBEqCXtfLda4F AMSxuSUudgVM91SEsoiM/hFOz50fz3/3QdSVE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=94bur20oG7ch/pxcNgKxL4v0LgkNYeOULHU9ryZ8MEg=; b=CXrLrMKt/mbWBb7gFrOpGeOEDEbGYr7HOptpFRy7PWrkuK8sPievSwt57ZXZaXSK0P Sdfa65czNxNZr4HSdfArOEXMuNOHsrSw8Nvgal/Ln3BXogVr8BttloirdHQ+C9xYDj+w Jv/Hl2IWPNsw06Q/BgkuEc8aSWDThF+ykS+oMwKwEvKePMLXspoubx2gawbHX2m0HdZN oMIhr+OeR3pp6IUSIMQdF9pn+LUX7Mdm+jBBZl9oBX3WNIVKWfIVGr59zTXjO2UDc9rJ jurjHZn7zAqy1ym6digkWudmLHrUBuscJhGFI70oDKujkfZg+YcllUAFUMg+MC72rHEi V/Og== X-Gm-Message-State: APjAAAXiRfh1K5UeIErAOWKC4BFGDUBQF8r8njztTVTX1SdTTRie9Qdv O0Ma1O4uxfBqNfUbmU60vXVX0FBAkFEgnN0Z+bzlYFnNG17x2S7Z/eJu88goD555HqVruIMW8FZ jhm74bkLcQUGksPgxkXVDTTkG3VaaCtRgRD27Tg4q8xLAoixQpA2Z6J5zlYE3EzBw X-Google-Smtp-Source: APXvYqyTQ6Sliw0khjdE4B8vomRYezFY/a3L0iAtkwUf1UctMVrfbChs9r7UDDaj89MXo5XTzlq//w== X-Received: by 2002:a17:90a:f986:: with SMTP id cq6mr503314pjb.48.1567198381578; Fri, 30 Aug 2019 13:53:01 -0700 (PDT) Received: from localhost.localdomain ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id i14sm3761369pfo.158.2019.08.30.13.53.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2019 13:53:01 -0700 (PDT) From: Lance Richardson To: dev@dpdk.org Cc: ajit.khaparde@broadcom.com, ferruh.yigit@intel.com, Lance Richardson Date: Fri, 30 Aug 2019 16:51:59 -0400 Message-Id: <20190830205201.26644-6-lance.richardson@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190830205201.26644-1-lance.richardson@broadcom.com> References: <20190830205201.26644-1-lance.richardson@broadcom.com> Subject: [dpdk-dev] [PATCH 5/7] net/bnxt: add support for LRO for thor adapters X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for LRO for adapters based on Thor (BCM57500). Signed-off-by: Lance Richardson Reviewed-by: Ajit Kumar Khaparde --- doc/guides/rel_notes/release_19_11.rst | 6 +++ drivers/net/bnxt/bnxt.h | 16 ++++++ drivers/net/bnxt/bnxt_ethdev.c | 4 ++ drivers/net/bnxt/bnxt_hwrm.c | 33 ++++++++++-- drivers/net/bnxt/bnxt_hwrm.h | 1 + drivers/net/bnxt/bnxt_ring.c | 14 +++-- drivers/net/bnxt/bnxt_ring.h | 1 - drivers/net/bnxt/bnxt_rxq.c | 4 +- drivers/net/bnxt/bnxt_rxr.c | 72 +++++++++++++++++++------- drivers/net/bnxt/bnxt_rxr.h | 41 ++++++++++++--- 10 files changed, 155 insertions(+), 37 deletions(-) diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_notes/release_19_11.rst index 27cfbd9e3..a044db46f 100644 --- a/doc/guides/rel_notes/release_19_11.rst +++ b/doc/guides/rel_notes/release_19_11.rst @@ -56,6 +56,12 @@ New Features Also, make sure to start the actual text at the margin. ========================================================= +* **Updated the Broadcom bnxt PMD.** + + Updated the Broadcom bnxt PMD. The major enhancements include: + + * Added LRO support for BCM57500 adapters. + Removed Items ------------- diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index 3e508ca1f..6da5126a8 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -34,6 +34,21 @@ #define BNXT_MAX_RX_RING_DESC 8192 #define BNXT_DB_SIZE 0x80 +#define TPA_MAX_AGGS 64 +#define TPA_MAX_AGGS_TH 1024 + +#define TPA_MAX_NUM_SEGS 32 +#define TPA_MAX_SEGS_TH 8 /* 32 segments in 4-segment units */ +#define TPA_MAX_SEGS 5 /* 32 segments in log2 units */ + +#define BNXT_TPA_MAX_AGGS(bp) \ + (BNXT_CHIP_THOR(bp) ? TPA_MAX_AGGS_TH : \ + TPA_MAX_AGGS) + +#define BNXT_TPA_MAX_SEGS(bp) \ + (BNXT_CHIP_THOR(bp) ? TPA_MAX_SEGS_TH : \ + TPA_MAX_SEGS) + #ifdef RTE_ARCH_ARM64 #define BNXT_NUM_ASYNC_CPR(bp) (BNXT_STINGRAY(bp) ? 0 : 1) #else @@ -506,6 +521,7 @@ struct bnxt { uint16_t max_rx_em_flows; uint16_t max_vnics; uint16_t max_stat_ctx; + uint16_t max_tpa_v2; uint16_t first_vf_id; uint16_t vlan; struct bnxt_pf_info pf; diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index c2ab8df7b..227960d4e 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -4303,6 +4303,10 @@ static int bnxt_init_fw(struct bnxt *bp) if (rc) return rc; + rc = bnxt_hwrm_vnic_qcaps(bp); + if (rc) + return rc; + rc = bnxt_hwrm_func_qcfg(bp, &mtu); if (rc) return rc; diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 4d8866ac1..404e52491 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -656,6 +656,27 @@ int bnxt_hwrm_func_qcaps(struct bnxt *bp) return rc; } +int bnxt_hwrm_vnic_qcaps(struct bnxt *bp) +{ + int rc = 0; + struct hwrm_vnic_qcaps_input req = {.req_type = 0 }; + struct hwrm_vnic_qcaps_output *resp = bp->hwrm_cmd_resp_addr; + + HWRM_PREP(req, VNIC_QCAPS, BNXT_USE_CHIMP_MB); + + req.target_id = rte_cpu_to_le_16(0xffff); + + rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB); + + HWRM_CHECK_RESULT(); + + bp->max_tpa_v2 = rte_le_to_cpu_16(resp->max_aggs_supported); + + HWRM_UNLOCK(); + + return rc; +} + int bnxt_hwrm_func_reset(struct bnxt *bp) { int rc = 0; @@ -1878,8 +1899,11 @@ int bnxt_hwrm_vnic_tpa_cfg(struct bnxt *bp, struct hwrm_vnic_tpa_cfg_input req = {.req_type = 0 }; struct hwrm_vnic_tpa_cfg_output *resp = bp->hwrm_cmd_resp_addr; - if (BNXT_CHIP_THOR(bp)) - return 0; + if (BNXT_CHIP_THOR(bp) && !bp->max_tpa_v2) { + if (enable) + PMD_DRV_LOG(ERR, "No HW support for LRO\n"); + return -ENOTSUP; + } HWRM_PREP(req, VNIC_TPA_CFG, BNXT_USE_CHIMP_MB); @@ -1895,9 +1919,8 @@ int bnxt_hwrm_vnic_tpa_cfg(struct bnxt *bp, HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO | HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_ECN | HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_SAME_GRE_SEQ); - req.max_agg_segs = rte_cpu_to_le_16(5); - req.max_aggs = - rte_cpu_to_le_16(HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_MAX); + req.max_agg_segs = rte_cpu_to_le_16(BNXT_TPA_MAX_AGGS(bp)); + req.max_aggs = rte_cpu_to_le_16(BNXT_TPA_MAX_SEGS(bp)); req.min_agg_len = rte_cpu_to_le_32(512); } req.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id); diff --git a/drivers/net/bnxt/bnxt_hwrm.h b/drivers/net/bnxt/bnxt_hwrm.h index db25ad591..a26698ce3 100644 --- a/drivers/net/bnxt/bnxt_hwrm.h +++ b/drivers/net/bnxt/bnxt_hwrm.h @@ -105,6 +105,7 @@ int bnxt_hwrm_vnic_alloc(struct bnxt *bp, struct bnxt_vnic_info *vnic); int bnxt_hwrm_vnic_cfg(struct bnxt *bp, struct bnxt_vnic_info *vnic); int bnxt_hwrm_vnic_qcfg(struct bnxt *bp, struct bnxt_vnic_info *vnic, int16_t fw_vf_id); +int bnxt_hwrm_vnic_qcaps(struct bnxt *bp); int bnxt_hwrm_vnic_ctx_alloc(struct bnxt *bp, struct bnxt_vnic_info *vnic, uint16_t ctx_idx); int bnxt_hwrm_vnic_ctx_free(struct bnxt *bp, struct bnxt_vnic_info *vnic, diff --git a/drivers/net/bnxt/bnxt_ring.c b/drivers/net/bnxt/bnxt_ring.c index 85a10c584..77a3c8ba1 100644 --- a/drivers/net/bnxt/bnxt_ring.c +++ b/drivers/net/bnxt/bnxt_ring.c @@ -187,13 +187,17 @@ int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx, AGG_RING_SIZE_FACTOR)) : 0; int tpa_info_start = ag_bitmap_start + ag_bitmap_len; - int tpa_info_len = rx_ring_info ? - RTE_CACHE_LINE_ROUNDUP(BNXT_TPA_MAX * - sizeof(struct bnxt_tpa_info)) : 0; + int tpa_info_len = 0; + + if (rx_ring_info && (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)) { + int tpa_max = BNXT_TPA_MAX_AGGS(bp); + + tpa_info_len = tpa_max * sizeof(struct bnxt_tpa_info); + tpa_info_len = RTE_CACHE_LINE_ROUNDUP(tpa_info_len); + } int total_alloc_len = tpa_info_start; - if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO) - total_alloc_len += tpa_info_len; + total_alloc_len += tpa_info_len; snprintf(mz_name, RTE_MEMZONE_NAMESIZE, "bnxt_%04x:%02x:%02x:%02x-%04x_%s", pdev->addr.domain, diff --git a/drivers/net/bnxt/bnxt_ring.h b/drivers/net/bnxt/bnxt_ring.h index 200d85532..833118391 100644 --- a/drivers/net/bnxt/bnxt_ring.h +++ b/drivers/net/bnxt/bnxt_ring.h @@ -27,7 +27,6 @@ #define DEFAULT_RX_RING_SIZE 256 #define DEFAULT_TX_RING_SIZE 256 -#define BNXT_TPA_MAX 64 #define AGG_RING_SIZE_FACTOR 2 #define AGG_RING_MULTIPLIER 2 diff --git a/drivers/net/bnxt/bnxt_rxq.c b/drivers/net/bnxt/bnxt_rxq.c index eb45436c3..d2f899106 100644 --- a/drivers/net/bnxt/bnxt_rxq.c +++ b/drivers/net/bnxt/bnxt_rxq.c @@ -235,7 +235,9 @@ void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq) /* Free up mbufs in TPA */ tpa_info = rxq->rx_ring->tpa_info; if (tpa_info) { - for (i = 0; i < BNXT_TPA_MAX; i++) { + int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp); + + for (i = 0; i < max_aggs; i++) { if (tpa_info[i].mbuf) { rte_pktmbuf_free_seg(tpa_info[i].mbuf); tpa_info[i].mbuf = NULL; diff --git a/drivers/net/bnxt/bnxt_rxr.c b/drivers/net/bnxt/bnxt_rxr.c index 95750367d..3b98e26d8 100644 --- a/drivers/net/bnxt/bnxt_rxr.c +++ b/drivers/net/bnxt/bnxt_rxr.c @@ -121,12 +121,13 @@ static void bnxt_tpa_start(struct bnxt_rx_queue *rxq, struct rx_tpa_start_cmpl_hi *tpa_start1) { struct bnxt_rx_ring_info *rxr = rxq->rx_ring; - uint8_t agg_id = rte_le_to_cpu_32(tpa_start->agg_id & - RX_TPA_START_CMPL_AGG_ID_MASK) >> RX_TPA_START_CMPL_AGG_ID_SFT; + uint16_t agg_id; uint16_t data_cons; struct bnxt_tpa_info *tpa_info; struct rte_mbuf *mbuf; + agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start); + data_cons = tpa_start->opaque; tpa_info = &rxr->tpa_info[agg_id]; @@ -134,6 +135,7 @@ static void bnxt_tpa_start(struct bnxt_rx_queue *rxq, bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf); + tpa_info->agg_count = 0; tpa_info->mbuf = mbuf; tpa_info->len = rte_le_to_cpu_32(tpa_start->len); @@ -203,7 +205,7 @@ static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq) static int bnxt_rx_pages(struct bnxt_rx_queue *rxq, struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons, - uint8_t agg_buf) + uint8_t agg_buf, struct bnxt_tpa_info *tpa_info) { struct bnxt_cp_ring_info *cpr = rxq->cp_ring; struct bnxt_rx_ring_info *rxr = rxq->rx_ring; @@ -211,14 +213,20 @@ static int bnxt_rx_pages(struct bnxt_rx_queue *rxq, uint16_t cp_cons, ag_cons; struct rx_pkt_cmpl *rxcmp; struct rte_mbuf *last = mbuf; + bool is_thor_tpa = tpa_info && BNXT_CHIP_THOR(rxq->bp); for (i = 0; i < agg_buf; i++) { struct bnxt_sw_rx_bd *ag_buf; struct rte_mbuf *ag_mbuf; - *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons); - cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons); - rxcmp = (struct rx_pkt_cmpl *) + + if (is_thor_tpa) { + rxcmp = (void *)&tpa_info->agg_arr[i]; + } else { + *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons); + cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons); + rxcmp = (struct rx_pkt_cmpl *) &cpr->cp_desc_ring[cp_cons]; + } #ifdef BNXT_DEBUG bnxt_dump_cmpl(cp_cons, rxcmp); @@ -255,29 +263,42 @@ static inline struct rte_mbuf *bnxt_tpa_end( struct bnxt_rx_queue *rxq, uint32_t *raw_cp_cons, struct rx_tpa_end_cmpl *tpa_end, - struct rx_tpa_end_cmpl_hi *tpa_end1 __rte_unused) + struct rx_tpa_end_cmpl_hi *tpa_end1) { struct bnxt_cp_ring_info *cpr = rxq->cp_ring; struct bnxt_rx_ring_info *rxr = rxq->rx_ring; - uint8_t agg_id = (tpa_end->agg_id & RX_TPA_END_CMPL_AGG_ID_MASK) - >> RX_TPA_END_CMPL_AGG_ID_SFT; + uint16_t agg_id; struct rte_mbuf *mbuf; uint8_t agg_bufs; + uint8_t payload_offset; struct bnxt_tpa_info *tpa_info; + if (BNXT_CHIP_THOR(rxq->bp)) { + struct rx_tpa_v2_end_cmpl *th_tpa_end; + struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1; + + th_tpa_end = (void *)tpa_end; + th_tpa_end1 = (void *)tpa_end1; + agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end); + agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1); + payload_offset = th_tpa_end1->payload_offset; + } else { + agg_id = BNXT_TPA_END_AGG_ID(tpa_end); + agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end); + if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons)) + return NULL; + payload_offset = tpa_end->payload_offset; + } + tpa_info = &rxr->tpa_info[agg_id]; mbuf = tpa_info->mbuf; RTE_ASSERT(mbuf != NULL); rte_prefetch0(mbuf); - agg_bufs = (rte_le_to_cpu_32(tpa_end->agg_bufs_v1) & - RX_TPA_END_CMPL_AGG_BUFS_MASK) >> RX_TPA_END_CMPL_AGG_BUFS_SFT; if (agg_bufs) { - if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons)) - return NULL; - bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs); + bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info); } - mbuf->l4_len = tpa_end->payload_offset; + mbuf->l4_len = payload_offset; struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool); RTE_ASSERT(new_data != NULL); @@ -367,6 +388,20 @@ static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt, rxcmp = (struct rx_pkt_cmpl *) &cpr->cp_desc_ring[cp_cons]; + cmp_type = CMP_TYPE(rxcmp); + + if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) { + struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp; + uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id); + struct bnxt_tpa_info *tpa_info; + + tpa_info = &rxr->tpa_info[agg_id]; + RTE_ASSERT(tpa_info->agg_count < 16); + tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg; + rc = -EINVAL; /* Continue w/o new mbuf */ + goto next_rx; + } + tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons); cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons); rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons]; @@ -378,7 +413,6 @@ static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt, cpr->cp_ring_struct->ring_mask, cpr->valid); - cmp_type = CMP_TYPE(rxcmp); if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) { bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp, (struct rx_tpa_start_cmpl_hi *)rxcmp1); @@ -431,7 +465,7 @@ static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt, mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST; if (agg_buf) - bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf); + bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL); if (rxcmp1->flags2 & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) { mbuf->vlan_tci = rxcmp1->metadata & @@ -806,7 +840,9 @@ int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq) PMD_DRV_LOG(DEBUG, "AGG Done!\n"); if (rxr->tpa_info) { - for (i = 0; i < BNXT_TPA_MAX; i++) { + unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp); + + for (i = 0; i < max_aggs; i++) { rxr->tpa_info[i].mbuf = __bnxt_alloc_rx_data(rxq->mb_pool); if (!rxr->tpa_info[i].mbuf) { diff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h index 493b75406..76bf88d70 100644 --- a/drivers/net/bnxt/bnxt_rxr.h +++ b/drivers/net/bnxt/bnxt_rxr.h @@ -5,6 +5,7 @@ #ifndef _BNXT_RXR_H_ #define _BNXT_RXR_H_ +#include "hsi_struct_def_dpdk.h" #define B_RX_DB(db, prod) \ (*(uint32_t *)db = (DB_KEY_RX | (prod))) @@ -110,6 +111,36 @@ IS_L4_TUNNEL_PKT_ONLY_INNER_L4_CS(flags2_f) \ ) +#define BNXT_TPA_START_AGG_ID_PRE_TH(cmp) \ + ((rte_le_to_cpu_16((cmp)->agg_id) & RX_TPA_START_CMPL_AGG_ID_MASK) >> \ + RX_TPA_START_CMPL_AGG_ID_SFT) + +#define BNXT_TPA_START_AGG_ID_TH(cmp) \ + rte_le_to_cpu_16((cmp)->agg_id) + +static inline uint16_t bnxt_tpa_start_agg_id(struct bnxt *bp, + struct rx_tpa_start_cmpl *cmp) +{ + if (BNXT_CHIP_THOR(bp)) + return BNXT_TPA_START_AGG_ID_TH(cmp); + else + return BNXT_TPA_START_AGG_ID_PRE_TH(cmp); +} + +#define BNXT_TPA_END_AGG_BUFS(cmp) \ + (((cmp)->agg_bufs_v1 & RX_TPA_END_CMPL_AGG_BUFS_MASK) \ + >> RX_TPA_END_CMPL_AGG_BUFS_SFT) + +#define BNXT_TPA_END_AGG_BUFS_TH(cmp) \ + ((cmp)->tpa_agg_bufs) + +#define BNXT_TPA_END_AGG_ID(cmp) \ + (((cmp)->agg_id & RX_TPA_END_CMPL_AGG_ID_MASK) >> \ + RX_TPA_END_CMPL_AGG_ID_SFT) + +#define BNXT_TPA_END_AGG_ID_TH(cmp) \ + rte_le_to_cpu_16((cmp)->agg_id) + #define RX_CMP_L4_CS_BITS \ rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_L4_CS_CALC) @@ -144,14 +175,10 @@ enum pkt_hash_types { }; struct bnxt_tpa_info { - struct rte_mbuf *mbuf; + struct rte_mbuf *mbuf; uint16_t len; - unsigned short gso_type; - uint32_t flags2; - uint32_t metadata; - enum pkt_hash_types hash_type; - uint32_t rss_hash; - uint32_t hdr_info; + uint32_t agg_count; + struct rx_tpa_v2_abuf_cmpl agg_arr[TPA_MAX_NUM_SEGS]; }; struct bnxt_sw_rx_bd { From patchwork Fri Aug 30 20:52:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lance Richardson X-Patchwork-Id: 58326 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C94951EA6D; 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Fri, 30 Aug 2019 13:53:03 -0700 (PDT) Received: from localhost.localdomain ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id i14sm3761369pfo.158.2019.08.30.13.53.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2019 13:53:02 -0700 (PDT) From: Lance Richardson To: dev@dpdk.org Cc: ajit.khaparde@broadcom.com, ferruh.yigit@intel.com, Lance Richardson Date: Fri, 30 Aug 2019 16:52:00 -0400 Message-Id: <20190830205201.26644-7-lance.richardson@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190830205201.26644-1-lance.richardson@broadcom.com> References: <20190830205201.26644-1-lance.richardson@broadcom.com> Subject: [dpdk-dev] [PATCH 6/7] net/bnxt: fix scatter receive offload capability X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Scattered receive is supported but not included in receive offload capabilities. Fix by adding it and including in scattered receive calculation. Fixes: 9c1507d96ab8 ("net/bnxt: switch to the new offload API") Signed-off-by: Lance Richardson Reviewed-by: Ajit Kumar Khaparde --- drivers/net/bnxt/bnxt_ethdev.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 227960d4e..7e756ea45 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -161,7 +161,8 @@ static const struct rte_pci_id bnxt_pci_id_map[] = { DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \ DEV_RX_OFFLOAD_JUMBO_FRAME | \ DEV_RX_OFFLOAD_KEEP_CRC | \ - DEV_RX_OFFLOAD_TCP_LRO) + DEV_RX_OFFLOAD_TCP_LRO | \ + DEV_RX_OFFLOAD_SCATTER) static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask); static void bnxt_print_link_info(struct rte_eth_dev *eth_dev); @@ -725,6 +726,9 @@ static int bnxt_scattered_rx(struct rte_eth_dev *eth_dev) uint16_t buf_size; int i; + if (eth_dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) + return 1; + for (i = 0; i < eth_dev->data->nb_rx_queues; i++) { struct bnxt_rx_queue *rxq = eth_dev->data->rx_queues[i]; From patchwork Fri Aug 30 20:52:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lance Richardson X-Patchwork-Id: 58327 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 419C91EA7D; Fri, 30 Aug 2019 22:53:11 +0200 (CEST) Received: from mail-pf1-f195.google.com (mail-pf1-f195.google.com [209.85.210.195]) by dpdk.org (Postfix) with ESMTP id C1CF81EA4A for ; Fri, 30 Aug 2019 22:53:05 +0200 (CEST) Received: by mail-pf1-f195.google.com with SMTP id w26so5354287pfq.12 for ; Fri, 30 Aug 2019 13:53:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=85x7vnVNVUNvGglsLikIjABTc6BmhWB8Z2Btc4WadC0=; b=I/X/O14O/W8dcdpIoQjKjvrYsl0O6l5HPgitm8naMVhiVDcv+L4ECwb6/8JmJymKEO BYLGk02geiYfNNQjP7zFp5gkuDSWRKF+mDmyBibYiGrkGDIHsE9iIunUj9UX4V6TWWEF aDap0DRvP6J0L5IO0sj6QibyI/Z6HVRIQ+9Gg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=85x7vnVNVUNvGglsLikIjABTc6BmhWB8Z2Btc4WadC0=; b=HPlhWROj5ERrgqNbj8lv2QNoj71ojVMXmKlotTktIiUSc3ZdxrFwExyYO0rc2ryiRM wl4Ioki6pXtgcHwODhJMzyQ9VaAgzsMnbpO5lMiN3CfZOXs0PSNnwOF9mlWMnysWzK1E 2CaLmWTxn7682WtuYY3xKT3m+kZjRPPH+uV7rHrpDYqOuJorFsw60VWa5uqWZ01tsfzR pSbWYmM6/Pn7d3az432Sj1VXmPdmcoXrRYTn/mIgn0BfTH33Aa2xAYsBASUTmekpKx7t k27foTX8ql8M0xpO0ksiWAt4//JSC1P+nZ274sn9BYo+uygsCPYQJMsGCyHC1FhPIhph r+ew== X-Gm-Message-State: APjAAAXaKn1P8jh1sEu8ODK5WOK2MR7oZx6/9hCWS6zzW9WNHhZZLsU1 8xbVSY4F4OZDT6GJr/BkPJOg1yd6dNHQneMhbf7o4MWnJEfUoUMTK+eYQ07fOS4NqemXyvUN0GS 7FWFda4otXMjB3GFy6SdeZ0D0/KGL9tgmjLub7LNFT8+JeZwt8a39AlkufeMGsAqH X-Google-Smtp-Source: APXvYqxI+4ZCFZSp0woNbbsygoPHlfLFquvP+VLSkYkKmzvnYBfLuGRkEh7ijKeHpqNODH6Q8ArcUg== X-Received: by 2002:a62:ac0d:: with SMTP id v13mr19931081pfe.129.1567198384856; Fri, 30 Aug 2019 13:53:04 -0700 (PDT) Received: from localhost.localdomain ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id i14sm3761369pfo.158.2019.08.30.13.53.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2019 13:53:04 -0700 (PDT) From: Lance Richardson To: dev@dpdk.org Cc: ajit.khaparde@broadcom.com, ferruh.yigit@intel.com, Lance Richardson Date: Fri, 30 Aug 2019 16:52:01 -0400 Message-Id: <20190830205201.26644-8-lance.richardson@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190830205201.26644-1-lance.richardson@broadcom.com> References: <20190830205201.26644-1-lance.richardson@broadcom.com> Subject: [dpdk-dev] [PATCH 7/7] net/bnxt: improve CPR handling in vector PMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Reduce overhead of CPR descriptor validity checking in vector receive and transmit functions. Preserve raw cpr consumer index in vector transmit completion function. Remove an unneeded prefetch (per benchmarking) from vector transmit completion function. Fixes: bc4a000f2f53 ("net/bnxt: implement SSE vector mode") Signed-off-by: Lance Richardson Reviewed-by: Ajit Kumar Khaparde --- drivers/net/bnxt/bnxt_rxtx_vec_sse.c | 26 ++++---------------------- 1 file changed, 4 insertions(+), 22 deletions(-) diff --git a/drivers/net/bnxt/bnxt_rxtx_vec_sse.c b/drivers/net/bnxt/bnxt_rxtx_vec_sse.c index 2e6e83c94..980fddb1f 100644 --- a/drivers/net/bnxt/bnxt_rxtx_vec_sse.c +++ b/drivers/net/bnxt/bnxt_rxtx_vec_sse.c @@ -245,10 +245,6 @@ bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct)) break; - cpr->valid = FLIP_VALID(cons, - cpr->cp_ring_struct->ring_mask, - cpr->valid); - if (likely(CMP_TYPE(rxcmp) == RX_PKT_CMPL_TYPE_RX_L2)) { struct rx_pkt_cmpl_hi *rxcmp1; uint32_t tmp_raw_cons; @@ -272,10 +268,6 @@ bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, rte_prefetch0(mbuf); rxr->rx_buf_ring[cons].mbuf = NULL; - cpr->valid = FLIP_VALID(cp_cons, - cpr->cp_ring_struct->ring_mask, - cpr->valid); - /* Set constant fields from mbuf initializer. */ _mm_store_si128((__m128i *)&mbuf->rearm_data, mbuf_init); @@ -318,22 +310,13 @@ bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, rxq->rxrearm_nb += nb_rx_pkts; cpr->cp_raw_cons = raw_cons; + cpr->valid = !!(cpr->cp_raw_cons & cpr->cp_ring_struct->ring_size); if (nb_rx_pkts || evt) bnxt_db_cq(cpr); return nb_rx_pkts; } -static inline void bnxt_next_cmpl(struct bnxt_cp_ring_info *cpr, uint32_t *idx, - bool *v, uint32_t inc) -{ - *idx += inc; - if (unlikely(*idx == cpr->cp_ring_struct->ring_size)) { - *v = !*v; - *idx = 0; - } -} - static void bnxt_tx_cmp_vec(struct bnxt_tx_queue *txq, int nr_pkts) { @@ -379,10 +362,8 @@ bnxt_handle_tx_cp_vec(struct bnxt_tx_queue *txq) cons = RING_CMPL(ring_mask, raw_cons); txcmp = (struct tx_cmpl *)&cp_desc_ring[cons]; - if (!CMPL_VALID(txcmp, cpr->valid)) + if (!CMP_VALID(txcmp, raw_cons, cp_ring_struct)) break; - bnxt_next_cmpl(cpr, &cons, &cpr->valid, 1); - rte_prefetch0(&cp_desc_ring[cons]); if (likely(CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2)) nb_tx_pkts += txcmp->opaque; @@ -390,9 +371,10 @@ bnxt_handle_tx_cp_vec(struct bnxt_tx_queue *txq) RTE_LOG_DP(ERR, PMD, "Unhandled CMP type %02x\n", CMP_TYPE(txcmp)); - raw_cons = cons; + raw_cons = NEXT_RAW_CMP(raw_cons); } while (nb_tx_pkts < ring_mask); + cpr->valid = !!(raw_cons & cp_ring_struct->ring_size); if (nb_tx_pkts) { bnxt_tx_cmp_vec(txq, nb_tx_pkts); cpr->cp_raw_cons = raw_cons;