From patchwork Mon Mar 30 19:21:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladislav Zolotarov X-Patchwork-Id: 4200 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id CD6136A95; Mon, 30 Mar 2015 21:21:18 +0200 (CEST) Received: from mail-wg0-f45.google.com (mail-wg0-f45.google.com [74.125.82.45]) by dpdk.org (Postfix) with ESMTP id 712A25FEB for ; Mon, 30 Mar 2015 21:21:16 +0200 (CEST) Received: by wgbgs4 with SMTP id gs4so95238293wgb.0 for ; Mon, 30 Mar 2015 12:21:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=j/OPO+bYXQyihSfHTzlxHjht9bFtvTlluNqT6Yt56YM=; b=ikR1ViJhp4TDI3oEE7D6ZRAezr0oTJVSPfzrsQj5VxrVH9fVxZhlNJa/nLMFw00kyq H52oO89HMOnppVrhlkh8lbu0WmyzK+WDoHMG4mMwu0TbDXL1bCrgd10RB/SUGBlwm0ee kFLx5wlHSEV27/juBvLA8p/8CD1X92JWIoVFBy6WPwAwYDI/wmKa5Rsx67foCPlLS18k N6xrSqVu5bQpdrj++DGLcWFE6D8CXysxNaNy0tb6bEYivw2AMHG0pB4xMA+IHirNGg+G AdAPQKLNTM0urFyVkpCtD85ov80E/+44pQ09MaU54ZpGM/CmYLoxSb2bjppR2/RHMvaV MA5Q== X-Gm-Message-State: ALoCoQmo3WoOUrupPiOFz59ZdKpdqjnVblYQeBZs42WvIU5hWUMiQo0KVzkITQCYG9Xqf7Rg/BhJ X-Received: by 10.180.103.170 with SMTP id fx10mr25536928wib.57.1427743276225; Mon, 30 Mar 2015 12:21:16 -0700 (PDT) Received: from vladz-laptop.localdomain (bzq-109-65-117-109.red.bezeqint.net. [109.65.117.109]) by mx.google.com with ESMTPSA id q6sm17005691wix.3.2015.03.30.12.21.14 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 30 Mar 2015 12:21:15 -0700 (PDT) From: Vlad Zolotarov To: dev@dpdk.org Date: Mon, 30 Mar 2015 22:21:09 +0300 Message-Id: <1427743271-14448-2-git-send-email-vladz@cloudius-systems.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1427743271-14448-1-git-send-email-vladz@cloudius-systems.com> References: <1427743271-14448-1-git-send-email-vladz@cloudius-systems.com> Subject: [dpdk-dev] [PATCH v9 1/3] ixgbe: Cleanups X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" - Removed the not needed casting. - ixgbe_dev_rx_init(): shorten the lines by defining a local alias variable to access &dev->data->dev_conf.rxmode. Signed-off-by: Vlad Zolotarov --- New in v6: - Fixed a compilation error caused by a patches recomposition during series separation. --- lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 29 +++++++++++++---------------- 1 file changed, 13 insertions(+), 16 deletions(-) diff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c index 9da2c7e..7173db8 100644 --- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c +++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c @@ -1031,8 +1031,7 @@ ixgbe_rx_alloc_bufs(struct ixgbe_rx_queue *rxq) int diag, i; /* allocate buffers in bulk directly into the S/W ring */ - alloc_idx = (uint16_t)(rxq->rx_free_trigger - - (rxq->rx_free_thresh - 1)); + alloc_idx = rxq->rx_free_trigger - (rxq->rx_free_thresh - 1); rxep = &rxq->sw_ring[alloc_idx]; diag = rte_mempool_get_bulk(rxq->mb_pool, (void *)rxep, rxq->rx_free_thresh); @@ -1060,10 +1059,9 @@ ixgbe_rx_alloc_bufs(struct ixgbe_rx_queue *rxq) IXGBE_PCI_REG_WRITE(rxq->rdt_reg_addr, rxq->rx_free_trigger); /* update state of internal queue structure */ - rxq->rx_free_trigger = (uint16_t)(rxq->rx_free_trigger + - rxq->rx_free_thresh); + rxq->rx_free_trigger = rxq->rx_free_trigger + rxq->rx_free_thresh; if (rxq->rx_free_trigger >= rxq->nb_rx_desc) - rxq->rx_free_trigger = (uint16_t)(rxq->rx_free_thresh - 1); + rxq->rx_free_trigger = rxq->rx_free_thresh - 1; /* no errors */ return 0; @@ -3590,6 +3588,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev) uint32_t rxcsum; uint16_t buf_size; uint16_t i; + struct rte_eth_rxmode *rx_conf = &dev->data->dev_conf.rxmode; PMD_INIT_FUNC_TRACE(); hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); @@ -3612,7 +3611,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev) * Configure CRC stripping, if any. */ hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); - if (dev->data->dev_conf.rxmode.hw_strip_crc) + if (rx_conf->hw_strip_crc) hlreg0 |= IXGBE_HLREG0_RXCRCSTRP; else hlreg0 &= ~IXGBE_HLREG0_RXCRCSTRP; @@ -3620,11 +3619,11 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev) /* * Configure jumbo frame support, if any. */ - if (dev->data->dev_conf.rxmode.jumbo_frame == 1) { + if (rx_conf->jumbo_frame == 1) { hlreg0 |= IXGBE_HLREG0_JUMBOEN; maxfrs = IXGBE_READ_REG(hw, IXGBE_MAXFRS); maxfrs &= 0x0000FFFF; - maxfrs |= (dev->data->dev_conf.rxmode.max_rx_pkt_len << 16); + maxfrs |= (rx_conf->max_rx_pkt_len << 16); IXGBE_WRITE_REG(hw, IXGBE_MAXFRS, maxfrs); } else hlreg0 &= ~IXGBE_HLREG0_JUMBOEN; @@ -3648,9 +3647,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev) * Reset crc_len in case it was changed after queue setup by a * call to configure. */ - rxq->crc_len = (uint8_t) - ((dev->data->dev_conf.rxmode.hw_strip_crc) ? 0 : - ETHER_CRC_LEN); + rxq->crc_len = rx_conf->hw_strip_crc ? 0 : ETHER_CRC_LEN; /* Setup the Base and Length of the Rx Descriptor Rings */ bus_addr = rxq->rx_ring_phys_addr; @@ -3668,7 +3665,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev) /* * Configure Header Split */ - if (dev->data->dev_conf.rxmode.header_split) { + if (rx_conf->header_split) { if (hw->mac.type == ixgbe_mac_82599EB) { /* Must setup the PSRTYPE register */ uint32_t psrtype; @@ -3678,7 +3675,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev) IXGBE_PSRTYPE_IPV6HDR; IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(rxq->reg_idx), psrtype); } - srrctl = ((dev->data->dev_conf.rxmode.split_hdr_size << + srrctl = ((rx_conf->split_hdr_size << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) & IXGBE_SRRCTL_BSIZEHDR_MASK); srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; @@ -3712,7 +3709,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev) dev->data->scattered_rx = 1; } - if (dev->data->dev_conf.rxmode.enable_scatter) + if (rx_conf->enable_scatter) dev->data->scattered_rx = 1; ixgbe_set_rx_function(dev); @@ -3729,7 +3726,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev) */ rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); rxcsum |= IXGBE_RXCSUM_PCSD; - if (dev->data->dev_conf.rxmode.hw_ip_checksum) + if (rx_conf->hw_ip_checksum) rxcsum |= IXGBE_RXCSUM_IPPCSE; else rxcsum &= ~IXGBE_RXCSUM_IPPCSE; @@ -3739,7 +3736,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev) if (hw->mac.type == ixgbe_mac_82599EB || hw->mac.type == ixgbe_mac_X540) { rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); - if (dev->data->dev_conf.rxmode.hw_strip_crc) + if (rx_conf->hw_strip_crc) rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP; else rdrxctl &= ~IXGBE_RDRXCTL_CRCSTRIP;