[dpdk-dev,v2,07/33] i40e: replacement of 'i40e_debug_read_register()'
Commit Message
As base driver provides 'i40e_aq_debug_read_register()', the same
functional interface of 'i40e_debug_read_register()' can be replaced.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
---
lib/librte_pmd_i40e/i40e/i40e_common.c | 35 +++++++++++++++++++++++++++++++
lib/librte_pmd_i40e/i40e/i40e_prototype.h | 3 +++
lib/librte_pmd_i40e/i40e_ethdev.c | 22 ++-----------------
3 files changed, 40 insertions(+), 20 deletions(-)
Comments
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
> -----Original Message-----
> From: Zhang, Helin
> Sent: Thursday, April 30, 2015 11:03 PM
> To: dev@dpdk.org
> Cc: Cao, Min; Xu, Qian Q; Wu, Jingjing; Liu, Jijiang; Kenguva, Monica; Patel,
> Rashmin N; Murray, Steven J; Nelson, Shannon; Zhang, Helin
> Subject: [PATCH v2 07/33] i40e: replacement of
> 'i40e_debug_read_register()'
>
> As base driver provides 'i40e_aq_debug_read_register()', the same
> functional interface of 'i40e_debug_read_register()' can be replaced.
>
> Signed-off-by: Helin Zhang <helin.zhang@intel.com>
> ---
> lib/librte_pmd_i40e/i40e/i40e_common.c | 35
> +++++++++++++++++++++++++++++++
> lib/librte_pmd_i40e/i40e/i40e_prototype.h | 3 +++
> lib/librte_pmd_i40e/i40e_ethdev.c | 22 ++-----------------
> 3 files changed, 40 insertions(+), 20 deletions(-)
>
> diff --git a/lib/librte_pmd_i40e/i40e/i40e_common.c
> b/lib/librte_pmd_i40e/i40e/i40e_common.c
> index db24b36..4722614 100644
> --- a/lib/librte_pmd_i40e/i40e/i40e_common.c
> +++ b/lib/librte_pmd_i40e/i40e/i40e_common.c
> @@ -2358,6 +2358,41 @@ enum i40e_status_code
> i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid, }
>
> /**
> + * i40e_aq_debug_read_register
> + * @hw: pointer to the hw struct
> + * @reg_addr: register address
> + * @reg_val: register value
> + * @cmd_details: pointer to command details structure or NULL
> + *
> + * Read the register using the admin queue commands **/ enum
> +i40e_status_code i40e_aq_debug_read_register(struct i40e_hw *hw,
> + u32 reg_addr, u64 *reg_val,
> + struct i40e_asq_cmd_details *cmd_details) {
> + struct i40e_aq_desc desc;
> + struct i40e_aqc_debug_reg_read_write *cmd_resp =
> + (struct i40e_aqc_debug_reg_read_write
> *)&desc.params.raw;
> + enum i40e_status_code status;
> +
> + if (reg_val == NULL)
> + return I40E_ERR_PARAM;
> +
> + i40e_fill_default_direct_cmd_desc(&desc,
> i40e_aqc_opc_debug_read_reg);
> +
> + cmd_resp->address = CPU_TO_LE32(reg_addr);
> +
> + status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
> +
> + if (status == I40E_SUCCESS) {
> + *reg_val = ((u64)LE32_TO_CPU(cmd_resp->value_high) <<
> 32) |
> + (u64)LE32_TO_CPU(cmd_resp->value_low);
> + }
> +
> + return status;
> +}
> +
> +/**
> * i40e_aq_debug_write_register
> * @hw: pointer to the hw struct
> * @reg_addr: register address
> diff --git a/lib/librte_pmd_i40e/i40e/i40e_prototype.h
> b/lib/librte_pmd_i40e/i40e/i40e_prototype.h
> index 755733d..2165ac8 100644
> --- a/lib/librte_pmd_i40e/i40e/i40e_prototype.h
> +++ b/lib/librte_pmd_i40e/i40e/i40e_prototype.h
> @@ -91,6 +91,9 @@ enum i40e_status_code
> i40e_aq_get_firmware_version(struct i40e_hw *hw, enum
> i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw,
> u32 reg_addr, u64 reg_val,
> struct i40e_asq_cmd_details *cmd_details);
> +enum i40e_status_code i40e_aq_debug_read_register(struct i40e_hw *hw,
> + u32 reg_addr, u64 *reg_val,
> + struct i40e_asq_cmd_details *cmd_details);
> enum i40e_status_code i40e_aq_set_phy_debug(struct i40e_hw *hw, u8
> cmd_flags,
> struct i40e_asq_cmd_details *cmd_details);
> enum i40e_status_code i40e_aq_set_default_vsi(struct i40e_hw *hw, u16
> vsi_id, diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c
> b/lib/librte_pmd_i40e/i40e_ethdev.c
> index 3d45429..96700e4 100644
> --- a/lib/librte_pmd_i40e/i40e_ethdev.c
> +++ b/lib/librte_pmd_i40e/i40e_ethdev.c
> @@ -5623,25 +5623,6 @@ i40e_pctype_to_flowtype(enum
> i40e_filter_pctype pctype)
> return flowtype_table[pctype];
> }
>
> -static int
> -i40e_debug_read_register(struct i40e_hw *hw, uint32_t addr, uint64_t *val)
> -{
> - struct i40e_aq_desc desc;
> - enum i40e_status_code status;
> -
> - i40e_fill_default_direct_cmd_desc(&desc,
> i40e_aqc_opc_debug_read_reg);
> - desc.params.internal.param1 = rte_cpu_to_le_32(addr);
> - status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
> - if (status < 0)
> - return status;
> -
> - *val = ((uint64_t)(rte_le_to_cpu_32(desc.params.internal.param2))
> <<
> - (CHAR_BIT * sizeof(uint32_t))) +
> -
> rte_le_to_cpu_32(desc.params.internal.param3);
> -
> - return status;
> -}
> -
> /*
> * On X710, performance number is far from the expectation on recent
> firmware
> * versions; on XL710, performance number is also far from the expectation
> on @@ -5692,7 +5673,8 @@ i40e_configure_registers(struct i40e_hw *hw)
>
> I40E_GL_SWR_PM_UP_THR_EF_VALUE;
> }
>
> - ret = i40e_debug_read_register(hw, reg_table[i].addr, ®);
> + ret = i40e_aq_debug_read_register(hw, reg_table[i].addr,
> + ®, NULL);
> if (ret < 0) {
> PMD_DRV_LOG(ERR, "Failed to read from
> 0x%"PRIx32,
> reg_table[i].addr);
> --
> 1.8.1.4
@@ -2358,6 +2358,41 @@ enum i40e_status_code i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
}
/**
+ * i40e_aq_debug_read_register
+ * @hw: pointer to the hw struct
+ * @reg_addr: register address
+ * @reg_val: register value
+ * @cmd_details: pointer to command details structure or NULL
+ *
+ * Read the register using the admin queue commands
+ **/
+enum i40e_status_code i40e_aq_debug_read_register(struct i40e_hw *hw,
+ u32 reg_addr, u64 *reg_val,
+ struct i40e_asq_cmd_details *cmd_details)
+{
+ struct i40e_aq_desc desc;
+ struct i40e_aqc_debug_reg_read_write *cmd_resp =
+ (struct i40e_aqc_debug_reg_read_write *)&desc.params.raw;
+ enum i40e_status_code status;
+
+ if (reg_val == NULL)
+ return I40E_ERR_PARAM;
+
+ i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_debug_read_reg);
+
+ cmd_resp->address = CPU_TO_LE32(reg_addr);
+
+ status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
+
+ if (status == I40E_SUCCESS) {
+ *reg_val = ((u64)LE32_TO_CPU(cmd_resp->value_high) << 32) |
+ (u64)LE32_TO_CPU(cmd_resp->value_low);
+ }
+
+ return status;
+}
+
+/**
* i40e_aq_debug_write_register
* @hw: pointer to the hw struct
* @reg_addr: register address
@@ -91,6 +91,9 @@ enum i40e_status_code i40e_aq_get_firmware_version(struct i40e_hw *hw,
enum i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw,
u32 reg_addr, u64 reg_val,
struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code i40e_aq_debug_read_register(struct i40e_hw *hw,
+ u32 reg_addr, u64 *reg_val,
+ struct i40e_asq_cmd_details *cmd_details);
enum i40e_status_code i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags,
struct i40e_asq_cmd_details *cmd_details);
enum i40e_status_code i40e_aq_set_default_vsi(struct i40e_hw *hw, u16 vsi_id,
@@ -5623,25 +5623,6 @@ i40e_pctype_to_flowtype(enum i40e_filter_pctype pctype)
return flowtype_table[pctype];
}
-static int
-i40e_debug_read_register(struct i40e_hw *hw, uint32_t addr, uint64_t *val)
-{
- struct i40e_aq_desc desc;
- enum i40e_status_code status;
-
- i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_debug_read_reg);
- desc.params.internal.param1 = rte_cpu_to_le_32(addr);
- status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
- if (status < 0)
- return status;
-
- *val = ((uint64_t)(rte_le_to_cpu_32(desc.params.internal.param2)) <<
- (CHAR_BIT * sizeof(uint32_t))) +
- rte_le_to_cpu_32(desc.params.internal.param3);
-
- return status;
-}
-
/*
* On X710, performance number is far from the expectation on recent firmware
* versions; on XL710, performance number is also far from the expectation on
@@ -5692,7 +5673,8 @@ i40e_configure_registers(struct i40e_hw *hw)
I40E_GL_SWR_PM_UP_THR_EF_VALUE;
}
- ret = i40e_debug_read_register(hw, reg_table[i].addr, ®);
+ ret = i40e_aq_debug_read_register(hw, reg_table[i].addr,
+ ®, NULL);
if (ret < 0) {
PMD_DRV_LOG(ERR, "Failed to read from 0x%"PRIx32,
reg_table[i].addr);